JPH06105226A - Picture synthesis device - Google Patents

Picture synthesis device

Info

Publication number
JPH06105226A
JPH06105226A JP4247009A JP24700992A JPH06105226A JP H06105226 A JPH06105226 A JP H06105226A JP 4247009 A JP4247009 A JP 4247009A JP 24700992 A JP24700992 A JP 24700992A JP H06105226 A JPH06105226 A JP H06105226A
Authority
JP
Japan
Prior art keywords
image
frame
section
display
picture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4247009A
Other languages
Japanese (ja)
Inventor
Takashi Sato
貴志 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4247009A priority Critical patent/JPH06105226A/en
Publication of JPH06105226A publication Critical patent/JPH06105226A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide the inexpensive picture synthesis device whose control is simple without need for a transparent frame memory by selecting display priority of plural picture data outputted from plural picture frame memories and controlling a picture output. CONSTITUTION:A selection section 1 has a changeover circuit and a setting section 2 decides display priority for each picture frame according to the setting set based on a control signal and implements control to set forcibly a least significant bit with less effect on visual observation. A detection section 3 outputs picture data to a synthesis section 4 when display is allowed from a frame with higher display priority and all bits of the frame are ORed and when no bit is set, display is allowed to a subordinate detection section 3. When no display permission comes from a host detection section 3, the detection section 3 clears all bits of the frame. Then the synthesis section 4 ORs inputs from the detection section 3 to synthesize the picture data.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は画像合成装置に関し、特
にコンピュータにより複数画像を合成する画像合成装置
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image synthesizing device, and more particularly to an image synthesizing device for synthesizing a plurality of images by a computer.

【0002】[0002]

【従来の技術】従来の画像合成装置は、図2に示すよう
に、3枚の画像フレームを有する場合の例では、画像フ
レームメモリの他に各フレームの画素に対応して画素単
位で表示の有無を設定する3つの透明フレームメモリ5
と、画像フレームメモリから出力される3つの画像デー
タを、このデータに対応する透明フレームメモリ5のデ
ータにより表示の有無の制御を行なうマスク部6と、マ
スク部6の出力を合成する合成部4とを有している。
2. Description of the Related Art In a conventional image synthesizing apparatus having three image frames as shown in FIG. 2, in addition to the image frame memory, a display is made in pixel units corresponding to pixels in each frame. Three transparent frame memories 5 to set presence / absence
And a mask section 6 for controlling the presence / absence of display of three image data output from the image frame memory by the data of the transparent frame memory 5 corresponding to this data, and a synthesizing section 4 for synthesizing the output of the mask section 6. And have.

【0003】[0003]

【発明が解決しようとする課題】この従来の画像合成装
置では、合成すべき画像フレームの画素数と同数のビッ
ト数の透明フレームメモリが必要なため、使用するメモ
リ数が多くなり、制御が複雑になるとともに、高価にな
ることが避けられないという問題点があった。
In this conventional image synthesizing apparatus, since a transparent frame memory having the same number of bits as the number of pixels of the image frame to be synthesized is required, the number of memories to be used becomes large and the control is complicated. However, there is a problem in that it becomes unavoidable that it becomes expensive.

【0004】本発明の問題は上述した欠点を除去し、画
像を合成する場合に透明フレームメモリを不要とし、制
御が簡単かつ安価な構成の画像合成装置を提供すること
にある。
An object of the present invention is to eliminate the above-mentioned drawbacks and to provide an image synthesizing apparatus which does not require a transparent frame memory when synthesizing images and which is simple and inexpensive to control.

【0005】[0005]

【課題を解決するための手段】本発明の画像合成装置
は、外部から制御信号を受け複数の画像用フレームメモ
リから出力される複数の画像データの表示優先度を選択
する選択部と、外部から制御信号を受け前記選択部で選
択された画像データの有無を検出し画像出力を制御する
検出部と、前記検出部の出力にもとづいて画像の合成を
行なう画像合成部と、上位機器から前記複数の画像デー
タの表示優先度と選択に必要な選択信号入力を受けて前
記制御信号を出力する設定部とを備えた構成を有する。
An image synthesizing apparatus according to the present invention includes a selection unit which receives a control signal from the outside and selects a display priority of a plurality of image data output from a plurality of image frame memories, and an external unit. A detection unit that receives a control signal and detects the presence or absence of image data selected by the selection unit and controls image output; an image composition unit that combines images based on the output of the detection unit; And a setting unit for receiving the selection signal input required for selection and outputting the control signal.

【0006】また本発明の画像合成装置は、前記検出部
が、前記選択部で選択された画像データの有無の検出結
果にもとづいて表示優先度が下位の画像フレームに対す
るマスク信号を出力して画像出力を制御するものとした
構成を有する。
Further, in the image synthesizing apparatus of the present invention, the detecting section outputs a mask signal for an image frame having a lower display priority based on the detection result of the presence or absence of the image data selected by the selecting section, and outputs the image. It has a configuration for controlling the output.

【0007】[0007]

【実施例】次に、図面を参照して本発明を説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

【0008】図1は、本発明の一実施例の構成を示すブ
ロック図である。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

【0009】図1に示す実施例は、図示しない複数の画
像用フレームメモリから出力する複数の画像データ,本
実施例では3つの画像フレームの3つの画像データの表
示優先度を選択する選択部1と、コンピュータ等の上位
機器から選択信号入力を受け、選択部1の選択内容を制
御する制御信号を出力する設定部2と、設定部2の制御
信号の制御のもとに選択部1の画像データの有無を選出
し、画像出力を制御する検出部3と、検出部3の出力に
もとづいて画像データを合成する合成部4とを備えた構
成を有する。
In the embodiment shown in FIG. 1, a selection unit 1 for selecting the display priority of a plurality of image data output from a plurality of image frame memories (not shown), in this embodiment three image data of three image frames. And a setting unit 2 that receives a selection signal input from a host device such as a computer and outputs a control signal that controls the selection content of the selection unit 1, and an image of the selection unit 1 under the control of the control signal of the setting unit 2. It has a configuration including a detection unit 3 that selects the presence or absence of data and controls image output, and a combining unit 4 that combines image data based on the output of the detection unit 3.

【0010】次に、本実施例の動作について説明する。Next, the operation of this embodiment will be described.

【0011】選択部1は、切替回路を有し、設定部2が
制御信号にもとづいて設定する設定に従って画像フレー
ムごとの表示優先度を決定し、また目視上では影響の少
ない最下位ビットを強制的に立てる様な制御を行なう。
The selecting unit 1 has a switching circuit, determines the display priority for each image frame according to the setting set by the setting unit 2 based on the control signal, and forces the least significant bit which has little visual effect. The control is performed so that it stands up.

【0012】次に、検出部3は、表示優先順位が上位の
フレームから表示の許可があれば画像データを合成部4
に出力するとともに当該フレームの全ビットの論理和を
とり、どのビットも立っていなければ下位の検出部3に
対し表示の許可を与える。この許可を点線矢印で表現す
る。
Next, the detecting section 3 synthesizes the image data if there is a display permission from a frame having a higher display priority.
And the logical sum of all the bits of the frame, and if none of the bits are set, the display permission is given to the lower detection unit 3. This permission is represented by a dotted arrow.

【0013】上位の検出部36より表示の許可が無けれ
ば、検出部3にて当該フレームの全ビットをおろす。
If the display is not permitted by the upper detector 36, the detector 3 drops all the bits of the frame.

【0014】次に、合成部4では、検出部3からの入力
の論理和をとり、画像データの合成を行なう。
Next, the synthesizing section 4 takes the logical sum of the inputs from the detecting section 3 to synthesize the image data.

【0015】こうして、透明フレームメモリを省略した
画像合成が可能となる。
In this way, image composition without the transparent frame memory becomes possible.

【0016】[0016]

【発明の効果】以上説明したように本発明によれば、画
像フレームの合成において透明フレームメモリを省略す
ることを可能とし、制御が簡単で、安価な画像合成装置
が実現できる効果がある。
As described above, according to the present invention, it is possible to omit the transparent frame memory when synthesizing image frames, and it is possible to realize an inexpensive image synthesizing apparatus which is easy to control.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の画像合成装置の構成を示す
ブロック図である。
FIG. 1 is a block diagram showing a configuration of an image synthesizing apparatus according to an exemplary embodiment of the present invention.

【図2】従来の画像合成装置の構成を示すブロック図で
ある。
FIG. 2 is a block diagram showing a configuration of a conventional image synthesizing device.

【符号の説明】[Explanation of symbols]

1 選択部 2 設定部 3 検出部 4 合成部 5 透明フレームメモリ 6 マスク部 1 selection unit 2 setting unit 3 detection unit 4 composition unit 5 transparent frame memory 6 mask unit

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 外部から制御信号を受け複数の画像用フ
レームメモリから出力される複数の画像データの表示優
先度を選択する選択部と、外部から制御信号を受け前記
選択部で選択された画像データの有無を検出し画像出力
を制御する検出部と、前記検出部の出力にもとづいて画
像の合成を行なう画像合成部と、上位機器から前記複数
の画像データの表示優先度と選択に必要な選択信号入力
を受けて前記制御信号を出力する設定部とを備えて成る
ことを特徴とする画像合成装置。
1. A selection unit that receives a control signal from the outside and selects display priorities of a plurality of image data output from a plurality of image frame memories; and an image that receives a control signal from the outside and is selected by the selection unit. A detection unit that detects the presence or absence of data and controls image output, an image combination unit that combines images based on the output of the detection unit, and a display priority and selection required for the plurality of image data from a higher-level device. An image synthesizing apparatus comprising: a setting unit that receives the selection signal and outputs the control signal.
【請求項2】 前記検出部が、前記選択部で選択された
画像データの有無の検出結果にもとづいて表示優先度が
下位の画像フレームに対するマスク信号を出力して画像
出力を制御することを特徴とする請求項1記載の画像合
成装置。
2. The detection unit outputs a mask signal for an image frame having a lower display priority based on the detection result of the presence or absence of the image data selected by the selection unit to control the image output. The image synthesizing apparatus according to claim 1.
JP4247009A 1992-09-17 1992-09-17 Picture synthesis device Pending JPH06105226A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4247009A JPH06105226A (en) 1992-09-17 1992-09-17 Picture synthesis device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4247009A JPH06105226A (en) 1992-09-17 1992-09-17 Picture synthesis device

Publications (1)

Publication Number Publication Date
JPH06105226A true JPH06105226A (en) 1994-04-15

Family

ID=17157035

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4247009A Pending JPH06105226A (en) 1992-09-17 1992-09-17 Picture synthesis device

Country Status (1)

Country Link
JP (1) JPH06105226A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998006222A1 (en) 1996-08-07 1998-02-12 Matsushita Electric Industrial Co., Ltd. Picture and sound decoding device, picture and sound encoding device, and information transmission system
WO2001005144A1 (en) * 1999-07-08 2001-01-18 Matsushita Electric Industrial Co., Ltd. Video display control method, video display processing system, video display processing device, screen display device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998006222A1 (en) 1996-08-07 1998-02-12 Matsushita Electric Industrial Co., Ltd. Picture and sound decoding device, picture and sound encoding device, and information transmission system
US7006575B2 (en) 1996-08-07 2006-02-28 Matsushita Electric Industrial Co., Ltd. Picture and sound decoding apparatus picture and sound encoding apparatus and information transmission system
WO2001005144A1 (en) * 1999-07-08 2001-01-18 Matsushita Electric Industrial Co., Ltd. Video display control method, video display processing system, video display processing device, screen display device

Similar Documents

Publication Publication Date Title
US4394688A (en) Video system having an adjustable digital gamma correction for contrast enhancement
JPH087567B2 (en) Image display device
KR20020001361A (en) Pivot apparatus in a digital video display system with a PIP funtion
JP2003015617A (en) Method and device for video signal processing
US5880741A (en) Method and apparatus for transferring video data using mask data
JPH0783454B2 (en) Video signal processor
JPH0771226B2 (en) Interpolator for television special effect device
JPH01296879A (en) Teletext receiving device
JP2009276557A (en) Video processing device, video processing lsi, display, car navigation system, mixing ratio information generating method, program, and recording medium
JPH0429479A (en) Picture output controller
US7227584B2 (en) Video signal processing system
JPH06105226A (en) Picture synthesis device
US6008854A (en) Reduced video signal processing circuit
JP2001103392A (en) Image frame generating circuit and digital television system using it
JP3154741B2 (en) Image processing apparatus and system
JP3016291B2 (en) Multimedia frame buffer
JPH0778720B2 (en) Image synthesizer
JP2001117693A (en) Display device and display control method for the same and storage medium
JPH02137070A (en) Picture processor
JPH04198987A (en) Image processor
JP2001169311A (en) Image comparator
JP3118285B2 (en) Frame shift display device for multiple monitors
JP2746724B2 (en) Display image signal processing device
JP2000125284A (en) Monitor camera system
KR100744519B1 (en) Device for an on screen display scaling and the method thereof

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 19990622