JPH06104569A - Multilayer wiring board and production thereof - Google Patents

Abstract

PURPOSE:To produce a high density wiring board at low cost by composing the wiring conductor of a surface wiring located on the outer surface of a multilayer wiring layer and an internal wiring formed of thick film thereby reducing transmission loss of signal. CONSTITUTION:A multilayer wiring layer 3 is composed of a plurality of wiring layers, each having a wiring conductor 4 and a dielectric ceramic film 5, wherein an internal wiring 41 located in the multilayer wiring layer 3 is formed of a thick film of Cu including a conductive via. On the contrary, a surface wiring 42 located on the uppermost surface is formed of a thin film having three layer structure of Ti, Pd and Au. Transmission loss of signal can be sustained low because the internal wiring has a stabilized low resistance and a high density wiring board can be produced at low cost because the internal wiring is formed of a thick film.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board in which a ceramic substrate and a multilayer wiring layer are integrated, and can be suitably used for a high density IC package.

[0002]

2. Description of the Related Art A high density IC package is composed of a ceramic substrate which also serves as a support and a thin film wiring portion formed on the main surface of the ceramic substrate. The sealing frame made of is bonded, or a large number of I / O pins made of Kovar or the like are bonded to the back surface of the multilayer wiring board.

The ceramic substrate is made of ceramics containing alumina as a main component, and is provided with a plurality of plate-shaped insulating layers and various wiring patterns formed of refractory metal on the main surface of each insulating layer. In forming the thin film wiring, the uppermost layer is polished to remove surface waviness in order to prevent defocusing during exposure.

The thin film wiring portion comprises a plurality of insulating films made of an organic insulating material such as polyimide or an inorganic insulating material such as glass or crystallized glass, and an active metal such as titanium or chromium on the main surface of each insulating film. And various wiring conductors made of a low resistance metal such as gold or copper and formed by a thin film technique such as vapor deposition, sputtering or plating. And
A conductive via is appropriately provided in each insulating film in order to achieve conduction between layers. Here, the active metal is vapor-deposited or sputtered in order to improve the adhesion to the insulating film, but it is difficult to secure a sufficient conductor thickness only by vapor-deposition or sputtering. The low resistance metal is plated.

[0005]

However, in the above-mentioned conventional technique, the insulating film is made of an organic insulating material such as polyimide, the organic insulating material itself is very expensive, and the wiring conductor is Must necessarily be formed by thin film technology. As described above, the thin-film wiring in which the wiring conductor is formed by the thin-film technology and the wiring pattern is formed by the so-called photolithography technology is a long process and a high cost method. Therefore, the polishing cost and the cost associated with the increase in the number of thin film wiring layers are added, resulting in a significant cost increase.

In the case where the insulating film is made of an inorganic insulating material such as glass or crystallized glass, the active metal in the wiring conductor and the low resistance metal are applied when the paste containing the inorganic insulating material is applied and fired. And are diffused with each other, leading to an increase in resistance of the wiring conductor and deterioration of the fixing strength. An object of the present invention is to solve such problems of the conventional art and to provide a multilayer wiring board having a high-density wiring layer at low cost.

[0007]

Means for Solving the Problem The means is a multilayer wiring board in which a ceramic substrate and a multilayer wiring layer in which a plurality of wiring layers each having a wiring conductor and a ceramic insulating film are laminated are integrated. A multilayer wiring board is characterized in that it has surface wiring positioned on the outer surface of the multilayer wiring layer and internal wiring positioned inside, and the internal wiring is formed of a thick film.

What is desirable in this multilayer wiring board is
The surface wiring is formed of a thin film. Equally desirable is that the ceramic insulating film is cordierite,
The main component is at least one selected from mullite and crystallized glass.

One means for manufacturing such a multilayer wiring board is to include the following steps in laminating and integrating a plurality of wiring layers having wiring conductors and ceramic insulating films on a ceramic substrate. Characterize. (A) A metallized ink that becomes a wiring conductor by firing,
A step of baking after screen-printing a predetermined wiring pattern. (B) A photosensitive paste to be a ceramic insulating film is applied by firing, exposed through a photomask and developed,
Step of firing. Desirable in the above manufacturing means is the step (A) to
This is a method of forming a predetermined wiring pattern as a thin film on the surface after repeating (B).

Here, the metallization ink which becomes the thick film conductor of the internal wiring is Cu, Ag, Ag / Pd mixture, Au,
It is desirable that the main component is an Au / Pd mixture. As the thin film conductor of the surface wiring, Ti and Pd are sequentially sputtered, and Au plating is applied thereon,
Ti and Cu are sequentially sputtered, and Cu,
It is preferable that Ni and Au are plated in this order, and that Mo is sputtered between the Ti and Cu.

In each of the above manufacturing methods, the mask used for screen printing has a line width of 15 to 25 μm and a mesh thickness of 2
0-45 μm, 300-400 mesh, hole pitch 60
~ 90 μm, emulsion thickness 10-20 μm, aperture ratio 40-60
The range of% is good.

[0012]

Since the internal wiring of the multi-layered wiring layer is formed of a thick film, the internal wiring conductor does not diffuse and the resistance does not increase even if it receives a thermal history due to firing. Further, since the wiring pattern is formed by screen-printing the metallized ink, the process is short and the cost is low. Furthermore, when a photosensitive paste is used as the raw material of the ceramic insulating film, conductive vias penetrating in the thickness direction can be formed finely and highly accurately by a photolithography technique such as exposure and development. By screen-printing the metallization ink using the above mask, it is possible to easily form a fine wiring pattern of the ceramic insulating film formed by the photolithography technique and a wiring pattern matching the high precision.

On the other hand, unlike the internal wiring, when the surface wiring is formed of a thin film, the conductor surface becomes flat, and a bonding wire or TA is used during IC bonding, TAB bonding or the like.
B lead does not slip. Since the surface wiring is not subjected to heat history, even if it is formed of a thin film, there is no risk of resistance increase due to thermal diffusion between the active metal and the low resistance metal.

[0014]

【Example】

-Example 1- [Structure of Multilayer Wiring Board] A multilayer wiring board according to an example of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a multilayer wiring board.

The multilayer wiring board 1 includes a ceramic board 2 and
It is integrated with the multilayer wiring layer 3 thereon, and its characteristic impedance is designed to be 50Ω. The ceramic substrate 2 may be a multilayer wiring substrate having internal wiring, or may be a single plate having no internal wiring.

The multilayer wiring layer 3 is formed by laminating a plurality of wiring layers 6 each having a wiring conductor 4 and a ceramic insulating film 5. In the wiring conductor 4, the internal wiring 41 located inside the multilayer wiring layer 3 is formed of a thick film of Cu having a thickness of 10 μm and a width of 50 μm including a conductive via having a diameter of 50 μm.

On the other hand, of the wiring conductors 4, the surface wiring 42 located at the uppermost surface has the same width as the internal wiring 41 and the thickness of 20.
It is formed of a thin film of a three-layer structure (not shown) of Ti of 00 angstrom, Pd of 5000 angstrom and Au of 2 μm in thickness, and its flatness is
> 90%. Here, the flatness means the wiring conductor 42 in the bonding pad cross-sectional shape as shown in FIG.
Where t is the thickness, B is the width of the ceramic insulating film 5 from the surface of 0.8 t, and A is the total width of the pad, (B
/ A) × 100. By the way, in the case of the normal thick film method, the flatness is as low as 60 to 80%. Further, the ceramic insulating film 5 is formed of crystallized glass having a dielectric constant of 8.8 made of lead borosilicate glass and alumina,
Its thickness is 60 μm.

[Manufacturing Method of Multilayer Wiring Board] Next, a specific manufacturing method of the above multilayer wiring board will be described. First, punching out a conductive via that interconnects each wiring of the five green sheets whose main component is ceramics such as alumina.
The via is filled with a metal paste such as tungsten W or molybdenum Mo. A metal paste is screen-printed in a predetermined pattern on the surface of the via-filled green sheet to form various wiring patterns such as signal wiring, power wiring, and ground wiring, and a blaze pad (not shown).
Then, these green sheets were laminated, thermocompression-bonded, and then fired at a high temperature of about 1500 degrees to form the ceramic substrate 2.

Next, the average grain size of 2 is formed on the main surface of the ceramic substrate.
After forming a ground wiring pattern by screen-printing a conductive paste containing Cu as a main component of μm, it is fired at a temperature of 900 ° C. On top of that, a photosensitive insulating paste containing lead borosilicate glass and alumina powder as main components and also containing a photosensitive emulsion is applied. Exposure is performed through a photomask having a predetermined pattern, and the photosensitive insulating paste in the portion that will become the conductive via is removed with a developing solution. Then, it is fired at a temperature of about 920 ° C. As a result, the first wiring layer 61 is formed.

Similarly, a conductor paste is screen-printed on the first wiring layer 61 to form a signal wiring pattern, which is baked, and the photosensitive insulating paste is applied thereon, exposed and developed, and baked. By doing so, the second wiring layer 62 was formed.

In this way, printing and firing of the conductor paste,
In addition, application, exposure, development and baking of the photosensitive insulating paste were repeated four times in this example. At this time, as a screen mask for printing the conductor paste, the line width is 20 μm.
m, gauze thickness 20 μm, 400 mesh, hole pitch 60 μ
m, emulsion thickness 15 μm, and aperture ratio 47%. The conductor paste was the internal wiring 4, and the photosensitive insulating paste was the ceramic insulating film 5.

Then, Ti and Pd are formed on the surface of the fourth wiring layer.
After being sputtered to the above thickness, photoresist is applied. Next, a photomask on which the surface wiring pattern is formed is placed above it, exposed to light, and the photoresist in the portion to be the surface wiring pattern is removed with a developing solution. In addition, 2 in the area where the photoresist is removed.
After applying Au plating of about μm, the photoresist is removed with a solvent, and Ti and Pd in unnecessary portions (portions not plated with Au) are removed with an etching solution.
Surface wiring is formed. Thus, the multilayer wiring board 1 is completed.

[Evaluation] FIG. 3 shows the results of measuring the specific resistance of the internal wiring of the multilayer wiring board 1. In the figure, the horizontal axis represents the number of times the multilayer wiring board 1 was heat-treated under the conditions of a temperature of 900 ° C. and a holding time of 5 minutes, and the vertical axis represents the specific resistance (unit: μΩ · c
m) is shown. From this figure, it can be seen that the internal wiring of this embodiment does not change in resistance even when subjected to thermal history.

[Effects of the Embodiment] In the multilayer wiring board of this embodiment, the resistance of the internal wiring is stable at a low value, so that the signal transmission loss can be kept small. It therefore is thin thickness of the ceramic insulating layer, closer distance between the signal line and the ground line, to reduce near-end crosstalk noise (K _B) 7% at a pitch 100 [mu] m, to about 2% at a pitch 150μm You can

On the other hand, since the surface wiring is formed of a thin film unlike the internal wiring, the conductor surface is flat and the bonding wires and TAB leads do not slip during IC bonding, TAB bonding, etc. Can be prevented.

-Comparative Example- [Structure of Multilayer Wiring Board] For comparison, the internal wiring is C
A multilayer wiring board having the same structure as that of the above-described example was prepared except that the thin film shown in Table 1 was used instead of the thick film of u.

[0027]

[Table 1] [Manufacturing Method of Multilayer Wiring Board] A multilayer wiring board for comparison is prepared in the same manner as in the above-mentioned embodiment except that the internal wiring is formed by a photolithography process as in the case of the surface wiring instead of the screen printing of the conductor paste. Manufactured.

[Evaluation] FIG. 4 shows the results of measuring the specific resistance of the internal wiring under the same conditions as in the examples for the comparative multilayer wiring board. From this figure, it can be seen that the internal wiring of this comparative example initially has a low resistance, but the resistance sharply increases due to the thermal history. Moreover, the greater the thickness of the sputtered metal portion of Ti or Pd, the higher the rate of increase. Incidentally, in the figure, the resistance value decreases at the number of heat treatments of 15 times, but this is due to the fully diffused state, and the adhesion is poor.

Example 2 The multilayer wiring substrate of this example is different from the multilayer substrate except that the materials of the ceramic substrate 2 and the ceramic insulating film 5 are cordierite.
It has the same shape and quality as the multilayer wiring board of the first embodiment. In this way, when the material of the ceramic substrate 2 and the ceramic insulating film 5 is cordierite, the dielectric constant thereof is as low as 5.0, so that the signal propagation speed is further increased. In addition, since the ceramic substrate 2 and the ceramic insulating film 5 are made of the same material, they have the same coefficient of thermal expansion and good adhesion between them.

[0030]

In the multilayer wiring board of the present invention, the resistance of the internal wiring is stable at a low value, so that the signal transmission loss can be kept small. Moreover, since the internal wiring is formed of a thick film, a high-density wiring board can be manufactured at low cost.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a main part of a multilayer wiring board according to an embodiment.

FIG. 2 is a cross-sectional view for explaining the definition of flatness of surface wiring.

FIG. 3 is a graph showing the results of measuring the specific resistance of internal wiring in the multilayer wiring board of the example.

FIG. 4 is a graph showing the results of measuring the specific resistance of internal wiring in a multilayer wiring board of a comparative example.

[Explanation of symbols]

 1 Multilayer Wiring Board 2 Ceramic Substrate 3 Multilayer Wiring Layer 4 Wiring Conductor 41 Internal Wiring 42 Surface Wiring 5 Ceramic Insulation Film

Claims (5)

[Claims] 1. A multilayer wiring board in which a ceramic substrate and a multilayer wiring layer in which a plurality of wiring layers each having a wiring conductor and a ceramic insulating film are laminated are integrated, wherein the wiring conductor is located on an outer surface of the multilayer wiring layer. A multilayer wiring board comprising: a surface wiring and an internal wiring located inside, wherein the internal wiring is formed of a thick film. 2. The multilayer wiring board according to claim 1, wherein the surface wiring is formed of a thin film. 3. The ceramic insulating film is cordierite,
The multilayer wiring board according to claim 1, which contains at least one selected from mullite and crystallized glass as a main component. 4. A method for manufacturing a multilayer wiring board, comprising the following steps when laminating a plurality of wiring layers each having a wiring conductor and a ceramic insulating film on a ceramic substrate to integrate them. (A) A metallized ink that becomes a wiring conductor by firing,
A step of baking after screen-printing a predetermined wiring pattern. (B) A photosensitive paste to be a ceramic insulating film is applied by firing, exposed through a photomask and developed,
Step of firing. 5. The method for manufacturing a multilayer wiring board according to claim 4, wherein after the steps (A) and (B) are repeated, a predetermined wiring pattern is formed on the surface as a thin film.