JPH06104427A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To speed up operation of an element and also, raise the insulation property between a gate electrode and an electrode wiring by raising hot carrier resistance. CONSTITUTION:A gate electrode 3 is formed through a gate insulating film 2 on a semiconductor substrate 1, and a sidewall 6 consisting of a polycrystalline semiconductor is formed through the gate sidewall insulating film 5 provided at the sidewall of the gate electrode 3, and the upper part of the gate sidewall insulating film 5 is made thicker than the lower part. By this constitution, the operation speed of an element can be increased by reducing the junction capacitance between the gate electrode and a source and between the source and the gate electrode by the bird's beak structure of the gate sidewall insulating film 5, thus the deterioration of the element by hot electrons can be prevented without reducing a saturation drain current by the sidewall 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device suitable for miniaturization and speeding up of an ultrahigh density field effect semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, in a high-density semiconductor device, problems such as an increase in junction capacitance of transistors and a decrease in device breakdown voltage have become problems as devices are miniaturized.

A conventional semiconductor device will be described below with reference to the drawings. FIG. 7 is a sectional view of a main part of a conventional semiconductor device. As shown in FIG. 7, the gate electrode 3 is formed on the semiconductor substrate 1 via the gate insulating film 2.
A side wall film 6 (hereinafter referred to as a side wall) is formed via a gate side wall insulating film 11 provided on the side wall of the gate electrode 3.

Next, a conventional method of manufacturing a semiconductor device will be described. 8A and 8B are process cross-sectional views of a conventional method for manufacturing a semiconductor device. As shown in FIG. 8 (a),
After the gate insulating film 2 is formed on the semiconductor substrate 1 by heat treatment, the gate electrode 3 is selectively formed, and the low concentration source 4a is formed by ion implantation using the gate electrode 3 as a mask.
And the drain 4a are formed. Next, as shown in FIG. 8B, after forming a gate sidewall insulating film 11 on the sidewall of the gate electrode 3 by heat treatment, a sidewall 6 is deposited on the sidewall, and the gate electrode 3 and the sidewall 6 are used as a mask. High concentration source 4b and drain 4 by ion implantation
b, and a lightly doped drain structure (hereinafter referred to as LDD) is formed together with the high-concentration source 4a and drain 4a.

The operation of the MOS transistor configured as described above will be described below. The low-concentration source 4b and drain 4b reduce the electric field near the drain, and the sidewall 6 suppresses the electric field concentration near the drain in the channel direction. This prevents deterioration of transistor characteristics due to hot carriers.

[0006]

However, in the above-mentioned conventional structure, in order to miniaturize the transistor and realize high speed at the same time, by forming a sidewall on the side wall of the gate electrode, an electric field in the channel direction is generated in the vicinity of the drain. Although the concentration is suppressed to prevent the characteristic deterioration of the transistor, there are the following problems. 1. When the gate sidewall insulating film 11 between the gate electrode 3 and the sidewall 6 and the gate insulating film between the sidewall 6 and the source 4b and the drain 4b are formed thin, the junction capacitance becomes large. 2. If the gate side wall insulating film 11 is made thicker to reduce the junction capacitance, the trap region of the hot electrons to the insulating film is expanded and the characteristic deterioration of the device is increased. 3. Since the conductive side wall 6 is exposed on the side wall of the gate electrode 3, it may come into contact with the source wiring (not shown) or the drain wiring (not shown) and cause a short circuit of the element.

The present invention solves the above-mentioned conventional problems, and reduces the capacitance between the gate and the source and between the gate and the drain, achieves both high breakdown voltage and high speed operation, and prevents a short circuit of the element wiring. And its manufacturing method.

[0008]

In order to achieve this object, a semiconductor device of the present invention has a gate electrode formed on a semiconductor substrate via a gate insulating film, and a gate sidewall provided on a sidewall of the gate electrode. A sidewall film made of a polycrystalline semiconductor is formed via an insulating film, and an upper portion of the gate sidewall insulating film is formed thicker than a lower portion thereof.

Further, the manufacturing method of the present invention comprises the steps of forming a gate insulating film on a semiconductor substrate, forming a gate electrode on the gate insulating film, and forming a source and a drain by ion implantation using the gate electrode as a mask. And the process of
Forming a gate side wall insulating film on the side wall of the gate electrode; forming a side wall film made of a polycrystalline semiconductor film on the side wall of the gate side wall insulating film; oxidizing part of the side wall film and the gate electrode to form a gate side wall; The step of thickening the upper portion of the insulating film as compared with the lower portion thereof.

[0010]

With this structure, the junction capacitance between the gate and the source or between the gate and the drain is reduced to accelerate the device operation, and since the insulating film near the drain is thin, the characteristics of hot electrons can be maintained without impairing the speedup of the device. Deterioration can be prevented.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of an essential part of a semiconductor device according to a first embodiment of the present invention. As shown in Figure 1,
The gate insulating film 2 is formed on the semiconductor substrate 1,
The gate electrode 3 is formed thereon. Semiconductor substrate 1
A source 4 and a drain 4 are formed by ion implantation using the gate electrode 3 as a mask. A gate sidewall insulating film 5 is formed on the sidewall of the gate electrode 3, and the gate sidewall insulating film 5 has a thin structure on the semiconductor substrate 1 side and a thick upper structure. Further, a sidewall film 6 (hereinafter referred to as a sidewall) made of a polycrystalline semiconductor is formed outside the gate sidewall insulating film 5. Further, a sidewall sidewall insulating film 7 is formed on the surfaces of the gate electrode 3 and the sidewall 6.

Next, a method of manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. 2A and 2B are process cross-sectional views of the first half step of the method for manufacturing the same semiconductor device, and FIGS. 3A to 3C are process cross-sectional views of the second half step of the method for manufacturing the same semiconductor device. First, FIG. 2 (a)
As shown in, the gate insulating film 2 is formed on the semiconductor substrate 1 by heat treatment. Next, as shown in FIG. 2B, the gate electrode 3 is selectively formed, and the source 4 and the drain 4 are formed by ion implantation using the gate electrode 3 as a mask. Next, as shown in FIG. 3A, an insulating film 5a is formed on the sidewall of the gate electrode 3 by heat treatment. Next in FIG.
As shown in (b), the sidewall 6 is formed on the sidewall of the insulating film 5a. Next, as shown in FIG. 3C, the gate electrode 3 and the side wall 6 are oxidized to form a gate side wall insulating film 5 whose upper portion is thicker than its lower portion.

As described above, according to the method of this embodiment, the bird's beak structure is formed above the gate side wall insulating film 5, so that the gate electrode 3 and the source 4 are formed and the gate electrode 3 is formed.
And the junction capacitance between the drain 4 and
Since the gate side wall insulating film 5 in the vicinity of can be thinned, the operating speed of the device can be increased and the characteristic deterioration due to hot electrons can be prevented. Further, by forming the insulating film 5 also on the sidewalls of the sidewalls 6, the insulation between the gate electrode 3 and the source wiring (not shown) and between the gate electrode 3 and the drain wiring (not shown) is enhanced, and the device Can prevent short circuit.

Even when the source 4 and the drain 4 are formed in the LDD structure, the above effects can be obtained.

Next, a semiconductor device according to a second embodiment of the present invention will be described with reference to the drawings. FIG. 4 is a cross-sectional view of the main part of the semiconductor device. As shown in FIG. 4, the gate insulating film 2 is selectively formed on the semiconductor substrate 1, and the gate electrode 3 is formed on the gate insulating film 2. A source 4 and a drain 4 are formed on the semiconductor substrate 1 by ion implantation using the gate electrode 3 as a mask. A semiconductor layer 8 having the same thickness as the gate electrode 3 is formed on the side surface of the gate electrode 3 with a gate sidewall insulating film 5 interposed therebetween, and the semiconductor layer 8 is electrically connected to the source 4 and the drain 4. The thickness of the gate sidewall insulating film 5 is narrower on the semiconductor substrate 1 side and thicker on the upper side.
A gate side wall insulating film 5 and an insulating film 9 are formed on the gate electrode 3 and the semiconductor layer 8, and an opening communicating with the semiconductor layer 8 is formed in a part of the gate sidewall insulating film 5 and the insulating film 9. The electrode wiring 10 connected to the electrode 8 is formed.

Next, a method of manufacturing a semiconductor device according to the second embodiment of the present invention will be described with reference to the drawings. 5A and 5B are process cross-sectional views of the first half process of the method for manufacturing the same semiconductor device, and FIGS. 6A and 6B are process cross-sectional views of the second half process of the same semiconductor device. First, as shown in FIG. 5A, a gate insulating film 2 is formed on a semiconductor substrate 1 by heat treatment, and then a gate electrode 3 is selectively formed, and the gate electrode 3 is used as a mask to perform ion implantation to form a source 4 and a drain. 4 is formed. Next, as shown in FIG. 5B, after forming the insulating film 5a on the side wall of the gate electrode 3, the upper surface of the semiconductor substrate 1 is exposed by etching. Next, as shown in FIG. 6A, a semiconductor layer 8 is formed on the semiconductor substrate 1 outside the insulating film 5a by epitaxial growth. Next, as shown in FIG. 6B, the gate electrode 3 and the semiconductor layer 8 are oxidized to form a gate sidewall insulating film 5 whose upper portion is thicker than its lower portion.

[0017]

As described above, according to the present invention, the bird's beak structure is formed in the gate side wall insulating film to speed up the operation of the element, and the use of the polycrystalline silicon side wall causes the deterioration of the characteristics of the element without impairing the high speed operation. Prevent
It is possible to realize an excellent semiconductor device capable of preventing a short circuit between an electrode and a wiring and a manufacturing method thereof by oxidizing the side wall of the sidewall.

[Brief description of drawings]

FIG. 1 is a sectional view of an essential part of a semiconductor device according to a first embodiment of the present invention.

2A and 2B are process cross-sectional views of the first half of the method for manufacturing a semiconductor device according to the first embodiment of the present invention.

3A to 3C are process cross-sectional views of the latter half of the method for manufacturing a semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a sectional view of an essential part of a semiconductor device according to a second embodiment of the present invention.

5A and 5B are process cross-sectional views of the first half of the method for manufacturing a semiconductor device according to the second embodiment of the present invention.

6A and 6B are process cross-sectional views of the latter half of the method for manufacturing a semiconductor device according to the second embodiment of the present invention.

FIG. 7 is a sectional view of a main part of a conventional semiconductor device.

8A and 8B are process cross-sectional views of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 1 semiconductor substrate 2 gate insulating film 3 gate electrode 5 gate sidewall insulating film 6 sidewall (sidewall film)

Claims (4)

[Claims] 1. A gate electrode is formed on a semiconductor substrate via a gate insulating film, and a sidewall film made of a polycrystalline semiconductor film is formed via a gate sidewall insulating film provided on a sidewall of the gate electrode. And a semiconductor device in which an upper portion of the gate sidewall insulating film is formed thicker than a lower portion thereof. 2. A gate electrode is formed on a semiconductor substrate via a gate insulating film, and a semiconductor layer is formed directly on the semiconductor substrate outside the gate sidewall insulating film provided on the sidewall of the gate electrode. A semiconductor device in which an upper portion of the gate sidewall insulating film is formed thicker than a lower portion thereof. 3. A step of forming a gate insulating film on a semiconductor substrate, a step of forming a gate electrode on the gate insulating film, and a step of forming a source and a drain by ion implantation using the gate electrode as a mask. Forming a gate side wall insulating film on a side wall of the gate electrode; forming a side wall film made of a polycrystalline semiconductor film on a side wall of the gate side wall insulating film; and oxidizing a part of the side wall film and the gate electrode. And a step of making the upper portion of the gate sidewall insulating film thicker than the lower portion thereof. 4. A step of forming a gate insulating film on a semiconductor substrate, a step of forming a gate electrode on the gate insulating film, a step of forming an impurity region by ion implantation using the gate electrode as a mask, Removing the insulating film on the semiconductor substrate by selectively leaving the gate sidewall insulating film on the sidewall of the gate electrode to expose the semiconductor substrate, and forming a semiconductor layer to be a source and a drain on the impurity region, And a step of oxidizing the gate electrode and the semiconductor layer to make the upper portion of the gate sidewall insulating film thicker than the lower portion thereof.