JPH0585044U - Pattern structure of TAB substrate - Google Patents

Abstract

(57) [Summary] [Purpose] To prevent the alignment marks read by the vision system during outer lead bonding of semiconductors from being damaged in the previous process. [Structure] In a TAB substrate on which a semiconductor is mounted, a copper pattern and a plurality of alignment marks are formed in the vicinity of the copper pattern on a TAB substrate between products to be punched after mounting the semiconductor, and a resist is formed on the copper pattern. Is provided. [Effect] Since the vision device can correctly recognize the alignment mark during outer lead bonding, the accuracy of the bonding work is improved.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a pattern structure of a TAB (Tape automated bonding) substrate for mounting a semiconductor on a film substrate.

[0002]

[Prior Art]

 In a conventional TAB substrate, a conductive pattern made of copper is generally formed on a film substrate serving as a base, and a resist is placed on a product to be punched after mounting a semiconductor as needed.

[0003]

[Problems to be solved by the device]

 In TAB mounting, the TAB board is transported and stopped using sprocket holes installed in the TAB board during or after mounting the semiconductor. At this time, the TAB substrate applies reverse tension in the winding direction and the feeding. When the TAB substrate is transported, distortion may occur in the width direction of the TAB substrate (width direction between sprocket holes). At this time, the mounting device and the TAB substrate come into contact with each other, and the alignment pattern formed by the conductor pattern is formed. The ment mark was sometimes damaged. In the mounting process, the TAB substrate is temporarily clamped in the thickness direction. At this time, the mark and the device could come into contact with each other and cause damage. After the semiconductor is mounted, the alignment mark is aligned with the electronic device having the outer lead mounted on the punched TAB substrate after the product is mounted. At this time, if the alignment mark is scratched, the alignment accuracy will be significantly deteriorated.

The conventional pattern structure of the TAB substrate has a defect that the alignment mark is damaged.

[0005]

[Means for Solving the Problems]

 In order to solve the above-mentioned problems, the present invention installs a conductor such as a copper pattern between the products to be punched, particularly near the alignment mark, and covers the pattern with a resist to prevent damage to the alignment mark. I prevented it.

[0006]

[Action]

 By installing the copper pattern and resist between the products that can be punched, the copper pattern between the products becomes higher than the alignment mark, and the alignment mark does not touch the mounting device during tape feeding or clamping. It is possible to prevent the alignment mark from being scratched.

[0007]

【Example】

 An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view of a long TAB substrate of the present invention. 2 is a sectional view taken along the line AA ′ of FIG. In the process shown in the figure, the sprocket holes 10, which are reference holes for transportation, are punched at regular intervals along both ends of the width of the tape substrate, and at the same time, the device hole 11 into which the semiconductor 9 is inserted is punched. Create 7.

Next, a copper foil is attached to the central portion of the tape to form a resist having a required shape based on the sprocket hole, the resist is removed from unnecessary portions, and copper is provided near the alignment marks 1 and 2 and the alignment mark. The patterns 6 are provided at regular intervals. Next, a resist 4 which is a corrosion resistant film is coated in the vicinity of the alignment marks 1 and 2 including the copper pattern 6 to a thickness of 10 to 40 μm.

Further, the semiconductor 9 is mounted in the device hole 11 by inner lead bonding the inner lead 8 on the TAB substrate 7 and resin sealing. After mounting the semiconductor 9, the product punching point 3 including the alignment marks 1 and 2 is punched, transferred to a substrate of an electronic product (not shown) by a pick and place device (not shown), and an alignment mark is made by a vision device (not shown). The positions 1 and 2 are visually recognized correctly, and the outer leads 5 of the semiconductor 9 are bonded to the base plate of the electronic product by using the positions as a reference.

[0010]

[Effect of the device]

 As described above, in this invention, the copper pattern 6 installed between the products and the resist 4 thereabove are higher than the alignment marks 1 and 2 installed in the product removal position 3, so that the semiconductor mounting process Even if the TAB substrate is transported or clamped, the alignment marks 1 and 2 will not be damaged, and when the alignment marks 1 and 2 are recognized in the process of punching the product after mounting the semiconductor and performing outer lead bonding. There is no misunderstanding, the outer lead bonding process is stable, and the accuracy of the bonding operation can be improved.

[Brief description of drawings]

FIG. 1 is a schematic view showing a plane of a substrate according to the present invention.

FIG. 2 is a schematic view showing a cross section taken along the line AA ′ of the substrate according to the present invention.

FIG. 3 is a schematic view showing a plane of a conventional substrate.

[Explanation of symbols]

 1 TAB substrate 2 alignment mark 3 product removal point 4 resist 5 outer lead 6 copper pattern 7 substrate 8 inner lead 9 semiconductor 10 sprocket 11 device hole

Claims (1)

[Scope of utility model registration request] 1. A TAB substrate in which a plurality of semiconductor elements are mounted on a film substrate, which is a long material, and an alignment mark and a conductor such as a copper pattern are formed between the products to be punched after mounting the semiconductor elements. 2. A structure of a TAB substrate, characterized in that a resist for preventing damage to the alignment mark is coated on the conductor and in the vicinity of the alignment mark.