JP2006210478A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent occurrence of a recognition error in a tape substrate. <P>SOLUTION: In the tape substrate 2 of TCP 6, protection patterns 2f thicker than alignment patterns 2e are formed at the periphery of the alignment patterns 2e with insulating films. The alignment patterns 2e are brought into contact with a spacer tape at the time of winding and transporting a tape, and abrasion is prevented. Thus, abrasion of the alignment patterns 2e and formation of a crack in the alignment patterns 2e can be prevented. Then, occurrence of the recognition error by a position recognition camera can be prevented at the time of assembling TCP 6 and mounting it on a mounting substrate. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device, and more particularly to a technique effective when applied to a semiconductor device having a tape substrate.

  In a TAB substrate on which a semiconductor is mounted, a copper pattern and a plurality of alignment marks are formed in the vicinity of the copper pattern on the TAB substrate between the products to be punched after mounting the semiconductor, and a resist is provided on the copper pattern. (For example, refer to Patent Document 1).

In the circuit board, a transparent layer is formed on the insulating base around the alignment mark so that light can be transmitted to the front and back of the circuit board and the position of the alignment mark can be confirmed (for example, Patent Document 2). reference).
Japanese Utility Model Publication No. 5-85044 (FIG. 1) Japanese Patent Laying-Open No. 2003-304041 (FIG. 4)

  In products (semiconductor devices) using a tape substrate such as TCP (Tape Carrier Package) and COF (Chip On Film), an alignment pattern for positioning recognition is formed on the tape substrate.

  However, when the alignment pattern comes into contact with the spacer tape, for example, when the product is transported or when the spacer tape disposed between the tape layers for product protection is wound, the alignment pattern is rubbed or scratched. .

  As a result, an alignment pattern recognition error occurs when a product (semiconductor device) is mounted on a mounting substrate.

  Note that Patent Document 1 (Japanese Utility Model Laid-Open No. 5-85044) does not describe that a protective pattern is formed only by a resist film (insulating film). Furthermore, Patent Document 1 does not describe that a protective pattern is formed in the vicinity of the alignment pattern. Further, Patent Document 1 does not describe that a protective pattern is formed when a resist film (insulating film) is formed. Furthermore, Patent Document 1 does not describe that protective patterns are formed on both sides of the alignment pattern in the tape feeding direction.

  Moreover, although the said patent document 2 (Unexamined-Japanese-Patent No. 2003-304041) has description that the resist layer was formed so that an alignment pattern might be enclosed, the pattern for protection by a resist layer was arrange | positioned along with the alignment pattern. There is no description that it is.

  An object of the present invention is to provide a technique capable of preventing the occurrence of a recognition error during assembly and mounting of a semiconductor device using a tape substrate.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.

  That is, the present invention includes a tape substrate having wiring and having an alignment pattern formed thereon, and a semiconductor chip connected to the tape substrate, and the tape substrate has an alignment pattern around the alignment pattern than the alignment pattern. A thick protective pattern is formed only of an insulating film.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  Since the protective pattern thicker than this alignment pattern is formed around the alignment pattern on the tape substrate by the insulating film, it is possible to prevent the alignment pattern from rubbing and the alignment pattern from being scratched. It is possible to prevent a recognition error from being generated by the position recognition camera when the semiconductor device used is assembled or mounted on the mounting board.

  In the following embodiments, the description of the same or similar parts will not be repeated in principle unless particularly necessary.

  Further, in the following embodiment, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments, but they are not irrelevant to each other unless otherwise specified. The other part or all of the modifications, details, supplementary explanations, and the like are related.

  Also, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), particularly when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and it may be more or less than the specific number.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted.

(Embodiment)
FIG. 1 is a plan view showing an example of the structure of a semiconductor device (TCP) according to an embodiment of the present invention. FIG. 2 is an enlarged partial cross-sectional view showing the structure of a cross section taken along the line AA shown in FIG. 3 is an enlarged partial plan view showing an example of the structure of the alignment pattern and the protection pattern of the tape substrate of the semiconductor device shown in FIG. 1, and FIG. 4 shows the structure of a cross section taken along the line AA shown in FIG. FIG. 5 is a plan view showing the structure of a modified semiconductor device (TCP), FIG. 6 is an enlarged partial plan view showing the structure of the alignment pattern and protective pattern of the tape substrate of the semiconductor device shown in FIG. Is a cross-sectional view showing a structure cut along the line AA shown in FIG. 6, FIG. 8 is a cross-sectional view for explaining the effect of the protection pattern of the tape substrate of the semiconductor device shown in FIG. 5, and FIG. The top view and figure which show the structure of the device (TCP) 9 is an enlarged partial plan view showing the structure of the alignment pattern and protection pattern of the tape substrate of the semiconductor device shown in FIG. 9, FIG. 11 is a cross-sectional view showing the structure cut along the line AA in FIG. 10, and FIG. FIG. 13 is an enlarged partial plan view showing the structure of the alignment pattern and the protection pattern of the tape substrate of the semiconductor device shown in FIG. 12, and FIG. 15 is a cross-sectional view showing a structure cut along line A, FIG. 15 is an enlarged partial plan view showing the structure of the alignment pattern and protective pattern of the tape substrate of the semiconductor device (TCP) of the modification, and FIG. FIG. 17 is an enlarged partial plan view showing a structure of an alignment pattern and a protection pattern of a tape substrate of a semiconductor device (TCP) according to a modification, FIG. FIG. 19 is a cross-sectional view showing the structure cut along the line AA in FIG. 17, FIG. 19 is an enlarged partial plan view showing the structure of the alignment pattern and protection pattern of the tape substrate of the semiconductor device (TCP) of the modification. FIG. 20 is a cross-sectional view showing a structure cut along line AA in FIG. 19.

  The semiconductor device according to the present embodiment shown in FIGS. 1 and 2 is obtained by mounting a semiconductor chip 1 on a tape substrate 2. Here, a TCP (Tape Carrier Package) 6 is taken as an example of the semiconductor device. To do.

  The structure of the TCP 6 will be described. A tape substrate 2 having a plurality of patterned wirings 2a (also referred to as wiring patterns) on which an alignment pattern 2e for positioning recognition is formed, and electrically connected to the tape substrate 2 And a sealing portion 4 for resin-sealing the vicinity of the connecting portion between the semiconductor chip 1 and the tape substrate 2.

  As shown in FIG. 2, the tape substrate 2 has an opening 2c slightly larger than the semiconductor chip 1, and the semiconductor chip 1 is disposed in the opening 2c. Furthermore, a plurality of leads 2b connected to each wiring 2a are disposed in the opening 2c, and the pads 1a that are the surface electrodes of the semiconductor chip 1 and the leads 2b corresponding thereto are electrically connected via the gold bumps 3. Connected.

  The plurality of wirings 2a on the surface of the tape substrate 2 are covered with a resist film 2d, which is an insulating film, except for some exposed portions. As shown in FIG. 1, an alignment pattern 2e for positioning recognition is formed on the surface of the tape substrate 2 near the outer periphery of the outermost wiring 2a among the plurality of wirings 2a. This alignment pattern 2e is used for positioning recognition during inspection during TCP assembly or when the TCP 6 is mounted on the board.

  In addition, a plurality of sprocket holes 2h are formed at equal intervals on both ends of the tape substrate 2 in the width direction, and serve as a guide when the tape substrate 2 is run by assembling the TCP 6 or the like.

  The tape substrate 2 is a thin film member whose base material is formed of a resin material such as polyimide, and thus has flexibility. Further, the plurality of wirings 2a, leads 2b, and alignment pattern 2e are made of, for example, a copper alloy.

  On the surface of the tape substrate 2, as shown in FIG. 1, a protective pattern 2f thicker than the alignment pattern 2e is formed only by an insulating film such as a solder resist film around the alignment pattern 2e.

  That is, the protective pattern 2f protects the alignment pattern 2e, and is higher in the vicinity of the periphery of the alignment pattern 2e than the alignment pattern 2e and only the solder resist film, as shown in FIGS. Thus, the alignment pattern 2e can be prevented from being rubbed in contact with other members.

  The protective pattern 2f is formed around the alignment pattern 2e, but is preferably formed at a position aligned with the alignment pattern 2e in the tape feeding direction, for example.

  In the formation of the tape substrate 2, the plurality of wirings 2a, leads 2b, and alignment patterns 2e on the surface are formed in the same layer. That is, the wiring 2a, the lead 2b, and the alignment pattern 2e can be formed in the same process.

  On the other hand, the resist film 2d covering each wiring 2a on the surface and the insulating film such as a solder resist film for forming the protective pattern 2f are also formed in the same layer. Therefore, the resist film 2d and the protective pattern 2f are also in the same process. It is possible to form with. Therefore, since the alignment pattern 2e and the protective pattern 2f are formed simultaneously in the tape substrate forming process without any special additional process in the tape substrate forming, there is no influence on the tape substrate forming cost.

  Here, the semiconductor chip 1 is formed of, for example, silicon, and the sealing portion 4 is formed of, for example, an epoxy resin.

  Next, a procedure for assembling the TCP 6 will be described.

  First, the semiconductor chip 1 provided with the gold bumps 3 on the pad 1a is prepared, and then the semiconductor chip 1 is arranged in the opening 2c in the multi-long tape substrate 2.

  Thereafter, the pads 1a of the semiconductor chip 1 and the corresponding leads 2b of the tape substrate 2 are electrically connected through the gold bumps 3 by inner lead bonding.

  Thereafter, a sealing resin is dropped onto the connection portion between the semiconductor chip 1 and the tape substrate 2 by potting, and the main surface side of the semiconductor chip 1 is resin-sealed to form the sealing portion 4.

  Thereafter, baking treatment is performed to cure the sealing resin. After curing, the electrical property inspection of the TCP 6 is performed.

  Thereafter, the long tape substrate 2 is wound on a reel and shipped.

  In the TCP 6 shown in FIGS. 1 to 4, a protective pattern 2 f thicker (higher) than the alignment pattern 2 e is formed only on an insulating film such as a solder resist film around the alignment pattern 2 e on the tape substrate 2. By doing so, it is possible to prevent the alignment pattern 2e from rubbing in contact with a member such as the spacer tape 5 disposed between the layers as shown in FIG. 8 when winding the tape or transporting the tape.

  Thereby, it is possible to prevent rubbing of the alignment pattern 2e and formation of scratches on the alignment pattern 2e.

  As a result, it is possible to prevent the occurrence of a recognition error by the position recognition camera when the semiconductor device such as the TCP 6 using the tape substrate 2 is assembled or the semiconductor device is mounted on the mounting substrate.

  Further, since the protective pattern 2f is formed only of an insulating film such as a solder resist film, the height of the protective pattern 2f does not become extremely high. Accordingly, it is possible to suppress the floating of the lead 2b in the peripheral portion of the tape when the tape substrate 2 is mounted.

  Further, since the protective pattern 2f is formed in the vicinity of the alignment pattern 2e, it is possible to reduce the product pitch on the tape without requiring an additional area for the protective pattern 2f on the tape.

  Further, the protective pattern 2f is arranged so as to be aligned with the alignment pattern 2e with respect to the tape feeding direction, and is not formed so as to surround the alignment pattern 2e. I can prevent it.

  In forming the tape substrate 2, the protective pattern 2f can also be formed when the resist film 2d is formed. Therefore, the protective pattern 2f can be formed without increasing the number of steps of forming the tape substrate 2.

  Next, a modification of the present embodiment will be described.

  In the TCP 6 of the modification shown in FIGS. 5 to 7, on the tape substrate 2, protective patterns 2 f that are thicker (higher in height) than the alignment pattern 2 e are aligned with the alignment pattern 2 e on both sides of the alignment pattern 2 e in the tape feeding direction. It is formed only of an insulating film such as a solder resist film.

  Since the protective pattern 2f is formed corresponding to both sides of the alignment pattern 2e in the tape feeding direction, it is possible to prevent the alignment pattern 2e from being scratched in both directions of tape winding.

  In addition, since the protective patterns 2f are formed on both sides of the alignment pattern 2e in the tape feeding direction, as shown in FIG. 8, for example, the spacer tape 5 arranged between the tape layers when winding the tape is protected by the protective pattern 2f. Since it can support on the both sides of the alignment pattern 2e, it can prevent more reliably that the spacer tape 5 contacts the alignment pattern 2e.

  The TCP 6 of the modification shown in FIGS. 9 to 11 is formed of only an insulating film such as a solder resist film in a U shape so that the protective pattern 2f surrounds a part of the alignment pattern 2e.

  In the TCP 6 shown in FIG. 9 as well, the protection pattern 2f formed of only the insulating film in the U-shape can prevent the alignment pattern 2e from being rubbed and the alignment pattern 2e from being scratched. Generation of a recognition error by the position recognition camera when mounted on the board can be prevented. Furthermore, as shown in FIG. 11, since the protective patterns 2f are arranged on both sides of the alignment pattern 2e, the spacer tape 5 (see FIG. 8) arranged between the tape layers when winding the tape is replaced with the alignment pattern 2e by the protective pattern 2f. The spacer tape 5 can be more reliably prevented from coming into contact with the alignment pattern 2e.

  In the TCP 6 of the modification shown in FIGS. 12 to 14, the protective pattern 2 f thicker than the alignment pattern 2 e is formed only on the insulating film on both sides of the alignment pattern 2 e in the tape feeding direction on the tape substrate 2. By expanding the arrangement area of the resist film 2d covering the plurality of wirings 2a, both ends of the resist film 2d also serve as the protective pattern 2f.

  Also in the TCP 6 shown in FIG. 12, it is possible to prevent the protective pattern 2f and the resist film 2d from rubbing the alignment pattern 2e and forming scratches on the alignment pattern 2e, and the position when the TCP 6 is assembled or mounted on the mounting substrate. Generation of a recognition error by the recognition camera can be prevented. Further, as shown in FIG. 14, the protective pattern 2f and the resist film 2d are arranged on both sides of the alignment pattern 2e, so that the spacer tape 5 (see FIG. 8) is replaced with the alignment pattern 2e by the protective pattern 2f and the resist film 2d. The spacer tape 5 can be more reliably prevented from coming into contact with the alignment pattern 2e.

  The TCP 6 of the modification shown in FIGS. 15 and 16 is formed of only an insulating film in a square ring shape so that the protective pattern 2f surrounds the periphery of the alignment pattern 2e.

  Also in the TCP 6 shown in FIG. 15, the protective pattern 2 f formed only by the insulating film in the ring shape can prevent the alignment pattern 2 e from rubbing and the alignment pattern 2 e from being scratched. It is possible to prevent the occurrence of a recognition error by the position recognition camera when mounting. Further, as shown in FIG. 16, since the protective patterns 2f are arranged on both sides of the alignment pattern 2e, the spacer tape 5 (see FIG. 8) arranged between the tape layers when winding the tape is replaced with the alignment pattern 2e by the protective pattern 2f. The spacer tape 5 can be more reliably prevented from coming into contact with the alignment pattern 2e.

  The TCP 6 of the modification shown in FIGS. 17 and 18 is formed by laminating a resist film 2d (insulating film pattern) on a copper alloy dummy pattern 2g formed simultaneously with the wiring 2a and the lead 2b on the tape substrate 2. A protective pattern 2f thicker than the alignment pattern 2e is formed in the vicinity of the alignment pattern 2e.

  Also in TCP6 shown in FIG. 17, it is possible to prevent rubbing of alignment pattern 2e and formation of scratches on alignment pattern 2e by protective pattern 2f made of dummy pattern 2g and resist film 2d. It is possible to prevent the occurrence of a recognition error by the position recognition camera when mounting.

  The TCP 6 of the modification shown in FIGS. 19 and 20 is formed by laminating a resist film 2d (insulating film pattern) on a copper alloy dummy pattern 2g, and a protective pattern 2f thicker than the alignment pattern 2e is formed as an alignment pattern 2e. The dummy pattern 2g and the resist film 2d are formed in a square ring shape so as to surround the periphery of the substrate.

  In the TCP 6 shown in FIG. 19 as well, the ring-shaped protective pattern 2f formed of the dummy pattern 2g and the resist film 2d can prevent the alignment pattern 2e from being rubbed and the alignment pattern 2e from being scratched. Generation of a recognition error by the position recognition camera when mounted on the mounting board can be prevented. Further, as shown in FIG. 20, since the protective patterns 2f are arranged on both sides of the alignment pattern 2e, the spacer tape 5 (see FIG. 8) arranged between the tape layers when winding the tape is replaced with the alignment pattern 2e by the protective pattern 2f. The spacer tape 5 can be more reliably prevented from coming into contact with the alignment pattern 2e.

  Although the invention made by the present inventor has been specifically described based on the embodiments of the invention, the present invention is not limited to the embodiments of the invention, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.

  For example, in the above-described embodiment, the case where the semiconductor device is TCP 6 has been described as an example. However, the semiconductor device is assembled using the tape substrate 2 in which the protective pattern 2f is formed in the vicinity of the alignment pattern 2e. If so, another semiconductor device such as a COF or a tape BGA (Ball Grid Array) may be used.

  The present invention is suitable for semiconductor devices and semiconductor manufacturing techniques.

It is a top view which shows an example of the structure of the semiconductor device (TCP) of embodiment of this invention. It is an expanded partial sectional view which shows the structure of the cross section cut | disconnected along the AA line shown in FIG. FIG. 2 is an enlarged partial plan view showing an example of a structure of an alignment pattern and a protection pattern of a tape substrate of the semiconductor device shown in FIG. 1. It is sectional drawing which shows the structure of the cross section cut | disconnected along the AA line shown in FIG. It is a top view which shows the structure of the semiconductor device (TCP) of the modification of embodiment of this invention. FIG. 6 is an enlarged partial plan view showing structures of an alignment pattern and a protection pattern of a tape substrate of the semiconductor device shown in FIG. 5. It is sectional drawing which shows the structure of the cross section cut | disconnected along the AA line shown in FIG. It is sectional drawing explaining the effect by the protection pattern of the tape board | substrate of the semiconductor device shown in FIG. It is a top view which shows the structure of the semiconductor device (TCP) of the modification of embodiment of this invention. FIG. 10 is an enlarged partial plan view showing structures of an alignment pattern and a protection pattern of a tape substrate of the semiconductor device shown in FIG. 9. It is sectional drawing which shows the structure of the cross section cut | disconnected along the AA line of FIG. It is a top view which shows the structure of the semiconductor device (TCP) of the modification of embodiment of this invention. FIG. 13 is an enlarged partial plan view showing structures of an alignment pattern and a protection pattern of a tape substrate of the semiconductor device shown in FIG. 12. It is sectional drawing which shows the structure of the cross section cut | disconnected along the AA line of FIG. It is an enlarged partial top view which shows the structure of the alignment pattern of a tape board | substrate of a semiconductor device (TCP) of the modification of embodiment of this invention, and a protection pattern. It is sectional drawing which shows the structure of the cross section cut | disconnected along the AA line of FIG. It is an enlarged partial top view which shows the structure of the alignment pattern of a tape board | substrate of a semiconductor device (TCP) of the modification of embodiment of this invention, and a protection pattern. It is sectional drawing which shows the structure of the cross section cut | disconnected along the AA line of FIG. It is an enlarged partial top view which shows the structure of the alignment pattern of a tape board | substrate of a semiconductor device (TCP) of the modification of embodiment of this invention, and a protection pattern. It is sectional drawing which shows the structure of the cross section cut | disconnected along the AA line of FIG.

Explanation of symbols

1 semiconductor chip 1a pad 2 tape substrate 2a wiring 2b lead 2c opening 2d resist film (insulating film)
2e Alignment pattern 2f Protection pattern 2g Dummy pattern 2h Sprocket hole 3 Gold bump 4 Sealing part 5 Spacer tape 6 TCP (semiconductor device)

Claims (5)

A tape substrate having wiring and having an alignment pattern formed thereon;
Having a semiconductor chip connected to the tape substrate;
In the tape substrate, a protective pattern thicker than the alignment pattern is formed around the alignment pattern only by an insulating film. A tape substrate having wiring and having an alignment pattern formed thereon;
Having a semiconductor chip connected to the tape substrate;
In the tape substrate, a protective pattern thicker than the alignment pattern is formed only on an insulating film on both sides of the alignment pattern in the tape feeding direction. A tape substrate having wiring and having an alignment pattern formed thereon;
Having a semiconductor chip connected to the tape substrate;
In the tape substrate, a protective pattern thicker than the alignment pattern is formed only on an insulating film around the alignment pattern, and the protective pattern is arranged so as to be aligned with the alignment pattern. . A tape substrate having a wiring made of a copper alloy layer and having an alignment pattern made of the copper alloy layer;
Having a semiconductor chip connected to the tape substrate;
In the tape substrate, a protective pattern thicker than the alignment pattern is formed around the alignment pattern only by an insulating film. A tape substrate having a wiring made of a copper alloy layer and having an alignment pattern made of a pattern of the copper alloy layer;
Having a semiconductor chip connected to the tape substrate;
In the tape substrate, the protective pattern made of the laminated film of the dummy pattern made of the copper alloy layer and the insulating film formed thereon and thicker than the alignment pattern is a tape of the alignment pattern A semiconductor device formed on both sides in a feeding direction.

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