JPH0584492B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an optical shift register circuit, and more particularly to an optical shift register circuit suitable for optical communications, optical information processing, optical switching systems, and optical computers.

[Prior art and its problems]

BACKGROUND ART In recent years, with the development of optical technologies such as optical fiber technology and optical semiconductor technology, long-distance optical communication systems for the purpose of backbone transmission and optical LANs that connect distributed processing devices with high efficiency have been put into practical use. In these systems, optical technology was mainly used as a means of connection between functional devices, and the functional devices themselves were constructed entirely of electronic circuits, mainly LSI.

In the near future, processing information will become more diverse and large in volume, and ultra-high processing speeds and processing complexity will be required.In order to meet these demands, optical technology will not only be used as a means of connection. It becomes necessary to use it as a logical processing means. In other words, the optical digital signals that have been transmitted can be digitally processed as they are, and the results can be output as light and transmitted to other devices, which are the features of light such as high speed, broadband, and non-inductive properties. Optical processing equipment (optical information processing systems, optical switching systems, etc.) that takes advantage of this will become essential.

In order to realize such an optical processing device, optical logic function blocks such as optical gates, optical flip-flop circuits, optical shift register circuits, and optical counters having various functions such as inverter circuits, OR circuits, AND circuits, and exclusive OR circuits are required. Must be configured.

However, in the past, there was no optical logic functional block sufficient for practical use.

[Purpose of the invention]

An object of the present invention is to provide a highly practical optical shift register circuit that is realized using a plurality of optical bistable semiconductor lasers.

[Structure of the invention]

The optical shift register circuit according to the present invention provides a first clock signal to a first electrode and a second clock signal to a second electrode.
A plurality of optical bistable semiconductor lasers that operate as an optical D flip-flop circuit by applying a clock signal are connected in cascade, and each output of the optical bistable semiconductor laser is extracted as an output of each bit. It is.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an optical shift register circuit showing one embodiment of the present invention, and FIG. 2 is a timing chart for explaining the operation of this optical shift register circuit.

In this embodiment, the optical shift register circuit 1 includes four optical D flip-flop circuits 2A, 2B,
Consists of 2C and 2D. Before explaining this optical shift register circuit 1, it is first necessary to clarify the configuration of the optical D flip-flop circuit 2. The optical D flip-flop circuit is an optical circuit having the function of a D flip-flop, and is realized by applying two types of current clock signals having the following predetermined values to an optical bistable semiconductor laser. This will be explained in detail based on FIGS. 3, 4, and 5.

FIG. 3 shows the light D by applying the driving method according to the present invention.
An optical bistable semiconductor laser that realizes a flip-flop circuit is shown. Figures 4 and 5 are characteristic diagrams showing various optical bistable relationships between input and output of the optical bistable semiconductor laser, and Figure 6 is an optical bistable semiconductor laser that realizes a flip-flop circuit. A waveform diagram and a relationship characteristic diagram thereof are shown for explaining the operating characteristics of the circuit.

In FIG. 3, the optical bistable semiconductor laser 3 is
P is electrically insulated by a slit 6 provided parallel to the Faberi-Perot resonator surfaces 4 and 5.
side, electrodes 7 and 8 are provided. When the currents applied to the electrodes 7 and 8 are ₁ and ₂ , if the current ₁ is set to a predetermined value, optical bistable characteristics can be provided between the current ₂ and the optical output Pout.

Figure 4 shows the optical bistable characteristics between current ₂ and optical output Pout, and ₁ = _c1 , _c2 ( _c1 >
_c2 ) shows two types of optical bistability characteristics 9 and 10. In the figure, the horizontal axis is current ₂ , and the vertical axis is optical output.
It is assumed to represent Pout. Optical bistable properties 9
occurs when current ₁ is set to a constant value _c1 ,
When current ₂ increases and reaches threshold _th2 , light output
Pout increases suddenly and reaches point P ₁ . Even if the current ₂ is subsequently increased, the optical output Pout only gradually increases and remains at a nearly constant value. On the contrary, when the current ₂ decreases and reaches the threshold value _th1 in such a high value state, the optical output Pout suddenly decreases at the point _P2 . In this way, the optical output Pout takes two stable states based on the two values of current ₂ , _th1 and _th2 .

The optical bistable characteristic 10 occurs when the current ₁ is set to a constant value _c2 , and the optical output Pout takes two stable states based on the two threshold values _th3 and _th4 for the current ₂ . In this case, there is a relationship _c2 < _c1 , and the thresholds _th3 and _th4 are the thresholds _{th1 and th4} .
Takes a value larger than _th2 .

Next, the optical bistable characteristics between the optical input Pin and the optical output Pout of the optical bistable semiconductor laser 3 will be explained based on FIG. 5. In this case, both currents ₁ and ₂ take fixed values. First, the optical bistable characteristic 11 sets the current ₁ to the above _c1 , and sets the current ₂ to the above threshold _t.
This is a characteristic obtained when the value _b1 is set to be smaller than _h1 . In this optical bistable characteristic 11, the optical input
When Pin increases from point _Q1 and reaches the threshold _Pth1 , the optical output Pout suddenly increases and takes on a high value _PH . After that, even if the optical input Pin increases, the optical output Pout remains almost constant.
It is held in P _H. On the contrary, when the optical input Pin is decreased in such a high state, the optical output Pout suddenly takes a low value P _L at a threshold P _th2 smaller than the threshold P _th1 .

In addition, the optical bistable characteristic 12 is such that the current _{1 is}
In the optical bistable characteristic 12, which is the characteristic obtained when the current ₂ is set to the intermediate value _b2 between the thresholds _th3 and _th4 , the optical input Pin increases and the threshold value P _th3
When reaching , the optical output Pout suddenly becomes a high value P _H ,
After that, it maintains a substantially constant value P _H. On the other hand, if the optical input Pin is decreased in a state where it takes _{such a} high value _P
remains held.

In the above, the threshold value P _th1 of optical bistability characteristic 11
are _the respective current values _c1 , _c2 , _b1 ,
_b2 is set.

Next, by utilizing the various optical bistable characteristics 9, 10, 11, and 12 occurring in the optical bistable semiconductor laser 3 as described above, the input optical digital signal is output in synchronization with the rising edge of the current clock signal. A driving method for causing the optical bistable semiconductor laser 3 to function as an optical D flip-flop circuit will be explained.

In FIG. 6, an optical digital signal L _D having an amplitude value A _D is input as an optical input pin of the optical bistable semiconductor laser 3. In FIG. The amplitude value A _D is the threshold value P _th1 of optical bistable characteristic 11 and the threshold value P _th3 of optical bistable characteristic 12.
is set to an intermediate value between The current ₁ applied to the electrode 5 is used as a positive current clock signal _K (first clock signal), and the logic value “0” has a current value.
The current value _c1 is set for _c2 and the logical value "1".
On the other hand, the current ₂ applied to the electrode 8 is used as a negative current clock signal _K (second clock signal), and a current value _b1 is set to a logic value "0", and a current value _b2 is set to a logic value "1". . The phase of this negative current clock signal _K has an inverse relationship with the phase of the positive current clock signal _K. In the above signal relationship, the optical digital signal L _D is synchronized by the current clock signal _K , and the signal L ₀ is obtained as the optical output Pout.

FIG. 6 will be explained in the order of time t from t ₁ to t ₉ . First, before time t= _t1 , the amplitude value of the optical digital signal L _D is 0 (logical value "0"), the current clock signal _K is _c2 , and the current clock signal _k is
It is _b2 . Therefore, the relationship between the optical input Pin and the optical output Pout is governed by the optical bistable characteristic 12, and therefore the optical output Pout is maintained at a low value _PL . Therefore, the optical output signal L ₀ takes the logical value "0".

At time t= _t1 , the amplitude value of the optical digital signal L _D becomes A _D (logical value "1"). At this time, the positive current clock signal _K and the negative current clock signal _K are maintained as they are at _c2 and _b2 , so the optical bistable semiconductor laser 3 is excited to point _Q3 in the optical bistable characteristic 12. , the light output Pout is still held at a low value P _L . That is, even if the optical digital signal L ₀ becomes a logical value "1", the optical output signal L _D remains at a logical value "0".

At time t = _t2 , the positive current clock signal _K changes to _c1
When the negative current clock signal _K changes to _b1 , the optical bistable semiconductor laser 3 exhibits optical bistable characteristics 11.
ruled by. Therefore, the optical digital signal L _D
When the amplitude value of is A _D , the operating point becomes point _Q4 , and the optical output Pout changes to a high value P _H. Therefore, the optical output signal L ₀ has a logical value of "1" at this point. This means that the rising edge C ₁ of the positive current clock signal _K
This means that the rise of the optical output signal L ₀ is synchronized with .

At time t= _t3 , the positive current clock signal _K is
At _c2 , the negative current clock signal _K changes to _b2 . As a result, the optical bistable semiconductor laser 3 is dominated by the optical bistable characteristic 12, and the optical digital signal L _D remains at a high value A _D.
Its operating point changes from point Q ₄ to point Q ₅ , but the optical output Pout remains at a high value _PH .

Therefore, the optical output signal L ₀ is held at the logical value "1". At time t= _t4 , each current clock signal
_K and _K are kept at the same values as above, and only the optical digital signal L _D changes its amplitude value to zero. but,
Since the optical bistable semiconductor laser 3 is governed by the optical bistable characteristic 12, the operating point is from point _Q5 to point
Q ₂ , and the optical output Pout is kept at a high value P _H. This means that even if the optical digital signal L _D changes to the logical value "0", the optical output signal _L0 remains the logical value "1".
means that it is held in

At time t= _t5 , the amplitude value of the optical digital signal _L0 remains 0, and the positive current clock signal _K flows to _c1 .
The negative current clock signal _K changes to _b1 respectively. The optical bistable semiconductor laser 3 is thereby governed by the optical bistable characteristic 11, and the operating point changes from point _Q2 to point _Q1 . Therefore, at this point, the optical output signal L ₀ changes from the logical value "1" to the logical value "0". This means that in response to the rising edge _C2 of the positive current clock signal _K , the optical output signal L _D becomes the logical value "0" in synchronization with this.

After time t= _t6 , the above-described operation is repeated at _t7 , _t8 , and _t9 .

According to the above operation, the signal L ₀ which is the optical output Pout
is the optical digital signal L _D at the optical input pin at the rising edge of the current clock signal _K C ₁ , C ₂ , C ₃ , C ₄ , C ₅ ,
This occurs due to a certain period of delay in synchronization with... Therefore, the optical bistable semiconductor laser 3 sets the predetermined current value to the logical values "1" and "0" and connects the electrodes 7 and 8.
By using as an optical input an optical digital signal _LD which is controlled by the currents ₁ ( _K ) and ₂ ( _K ) applied to the circuit and has a predetermined amplitude value _AD , an optical D flip-flop circuit, that is, It can operate as an optical circuit having the function of a D flip-flop.

Next, a 4-bit optical shift register circuit constructed using four optical D flip-flop circuits 2 realized as described above will be explained with reference to FIG.

In Fig. 1, four optical D flip-flop circuits (2A, 2B, 2C, 2D in the figure) are connected to the light guide path 1.
3, 14, and 15 in cascade. 16
is the light entrance part. Moreover, the light guide paths 13, 14, 15,
Optical branching sections 17, 18, and 19 are provided, branch light guide paths 20, 21, and 22 are formed, and thus light output sections 23, 24, 25, and 26 are provided. Light D
The flip-flop circuits 2A, 2B, 2C, and 2D have electrodes 7 and 8, respectively, and a positive current clock signal _K is applied to each electrode 7 from a clock power supply 27 (voltage Ec) via an amplifier 28, and each electrode 8 is supplied with a negative current clock signal _K through an inverting amplifier 29, and thus the optical D flip-flop circuits 2A, 2B, 2C, and 2D are driven by the positive and negative current clock signals _K and _K.

The optical digital signal L _D is input to the light input section 16,
In the first stage optical D flip-flop circuit 2A, as shown in FIG. 2, the optical output signal _L01 is obtained by rising in synchronization with the rising edge _C1 of the current clock signal _K. This optical output signal _L01 is input to the second stage optical D flip-flop circuit 2B via the light guide path 13, and is also guided to the branch light guide path 20 via the optical branching section 17, and from the output section 23, the optical signal L01 is output. It is taken out as the output signal _L1 . The second-stage optical D flip-flop circuit 2B uses the optical signal _L01 given from the optical D flip-flop circuit 2A as an input signal, and as in the first stage, outputs an optical output signal L in synchronization with the current clock signal _K. You can get ₀₂ . In this way, the third stage light D
In the flip-flop circuit 2C, the optical output signal L ₀₃ ,
In the fourth stage optical D flip-flop circuit 2D, an optical output signal _L4 can be obtained. As shown in FIG. 2, the result output units 23, 24, 25, and 26 can obtain optical output signals L ₁ , L ₂ , L ₃ , and L ₄ based on the input optical digital signal L _D. It will be possible. In this case, in order to ensure that the logical value "1" is obtained as a signal in the optical D flip-flop circuits 2A, 2B, 2C, and 2D in each stage, the optical output Pout of the optical bistable semiconductor laser forming each optical D flip-flop circuit is It is assumed that the level of is adjusted appropriately.

Therefore, as is clear from the above explanation and FIG. 2, the optical circuit shown in _FIG . 1 can perform 1-bit delay, 2-bit delay,
Optical signal L ₁ delayed by 3 bits, delayed by 4 bits,
It has a function of generating L ₂ , L ₃ , and L ₄ , and is configured as the optical shift register circuit 1 in this way.

In the above description, the optical bistable semiconductor laser 3, the branching section 17, and the optical bistable semiconductor laser 3, which constitute the optical D flip-flop circuit 2,
18 and 19 were treated as separate parts for convenience, but
By integrating these functions on a single substrate, it is possible to realize a compact, economical, and highly practical optical shift register circuit. In addition, the optical branching section 17,
Although directional couplers are assumed as 18 and 19, the present invention is not limited to this, and any means having similar functions can be used. Further, in the above embodiment, a 4-bit optical shift register circuit has been described, but the present invention is not limited to this, and by cascading an arbitrary number of optical D flip-flop circuits 2, an optical shift register circuit with an arbitrary number of bits can be formed. It is possible to achieve this.

〔Effect of the invention〕

As is clear from the above description, according to the present invention,
An optical D flip-flop circuit is constructed by applying two predetermined types of current clock signals to an optical bistable semiconductor laser and using a predetermined optical input value, and this optical D flip-flop circuit is connected via a light guide path and an optical branching section. By connecting them in series, it is possible to realize a compact, highly practical optical shift register circuit suitable for integration.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an optical shift register circuit according to the present invention, FIG. 2 is a timing chart explaining the operation of the optical shift register circuit, and FIG. 3 is a perspective view of an optical bistable semiconductor laser realizing an optical D flip-flop circuit. Figure 4 shows the optical bistability characteristic that occurs between the current applied to the electrode and the optical output, Figure 5
The figure shows the optical bistable characteristics that occur between optical input and optical output, and Figure 6 shows the waveform diagram and related optical bistable characteristics for explaining the operating characteristics of an optical D flip-flop circuit. be. 1... Optical shift register circuit, 2, 2A, 2B,
2C, 2D... Optical D flip-flop circuit, 3... Optical bistable semiconductor laser, 7, 8... Electrode, 9, 10,
11, 12... Optical bistable property, ₁ , ₂ ... Current,
Pin...optical input, Pout...optical output, _K ...positive current clock signal (first clock number), _K ...negative current clock signal (second clock number), L _D ...optical digital signal as optical input signal, L ₀ , L ₁ , L ₂ , L ₃ ,
L ₄ ...Optical output signal.

Claims (1)

[Claims] 1 A first clock signal is applied to the first electrode, and a second clock signal is applied to the first electrode.
A plurality of optical bistable conductor lasers that operate as an optical D flip-flop circuit by applying a second clock signal to the electrodes are connected in cascade, and each output of the optical bistable conductor laser is used as the output of each bit. An optical shift register circuit characterized by its features.