JPH0583671A - Vtr - Google Patents

Abstract

PURPOSE:To make a slow reproduction of a segment-recorded video signal. CONSTITUTION:A horizontal synchronizing signal after the vertical synchronizing signal is counted by a counter 52, and a segment ID signal is latched when this count value becomes the starting end or the terminal end of the recording range of a video signal. A signal indicating the coincidence of this latched segment ID signal and a signal from an updown counter 56 is supplied to a timing generation circuit 58 when the detection signal from an envelope detection circuit 51 is at the high potential. Further, the vertical synchronizing signal is supplied to a timing generation circuit 58, and a signal from this timing generation circuit 58 is supplied to an enable terminal EN of the updown counter 56. A signal indicating the coincidence between a signal from this updown counter 56 and a segment ID signal is supplied to a writing control terminal WE of the frame memory 26 when a detection signal from the envelope detection circuit 51 is at the high potential.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a VTR in which one field of an interlaced video signal is divided into a plurality of tracks for segment recording / reproduction.

[0002]

2. Description of the Related Art For example, in a consumer VTR for recording / reproducing an HDTV signal, it has been considered to divide one field of an interlaced video signal into a plurality of tracks for segment recording / reproducing (Japanese Patent Laid-Open Publication No. Sho. 63-1
94944, etc.).

That is, FIG. 8 shows an example of a device therefor. In this figure, reference numeral 1 is an input terminal for a luminance signal Y obtained by demodulating an HDTV signal, for example. The signal from the input terminal 1 is supplied to the A / D conversion circuit 3 via the preprocessing circuit 2 such as a low pass filter and a clamp. The signal from the A / D conversion circuit 3 is supplied to the TDM conversion circuit 5 through the non-linear emphasis circuit 4 in the vertical (V) direction.

[0004] 6r, 6b chroma signal demodulated HDTV signals (color difference signals _{R-Y: P R, B} -Y: P B) an input terminal of the input terminal 6r, signals from 6b respectively It is supplied to A / D conversion circuits 8r and 8b through preprocessing circuits 7r and 7b such as low-pass filters and clamps. The signals from the A / D conversion circuits 8r and 8b are supplied to the TDM conversion circuit 5 through the correlation filter of the chroma signal in the vertical (V) direction and the non-linear emphasis circuit 9.

Accordingly, in the TDM conversion circuit 5,
For example, a TDM signal as shown in FIG. 9 is formed. That is, the figure shows a TDM signal in one horizontal (H) period. First, a 0% level front porch A in three sampling periods, negative pulse falling B in three sampling periods, and 1
A negative pulse bottom C of -68% level for 5 sample periods, a negative pulse rising D for 3 sample periods, and a back porch E for 6 sample periods are provided. Following this, burst periods F and G swinging at a level of 12.5 to 87.5% around the 50% level are provided for 30 sample periods, and the center is the horizontal reference phase of the TDM signal.

Further, following the burst periods F and G,
A clamp part H of 50% level for 12 sample periods, and first and second ID parts I and J for 3 sample periods are provided. After this, ID / C guard K for 6 sample periods
Through the chroma signal (C) section L for 288 sample periods,
Further through the C / Y guard M for 6 sample periods, 115
A luminance signal (Y) portion N for 2 sample periods is provided, and a TDM signal for 1530 sample periods is formed as a whole.

The TDM signal thus formed is supplied to the frame memory 10. Here, the frame memory 10
Are four 1/4 frame memories 10A, 10B, 10
C and 10D, for example, the odd-numbered TDM signal of the first field is written in the memory 10A, and the even-numbered TDM signal is written.
The DM signal is written in the memory 10C. The odd-numbered TDM signals of the second field are written in the memory 10B, and the even-numbered TDM signals are written in the memory 10D. Then, in the first half of the second field, the memories 10A, 10
Every other TDM signal of C is read out, and the remaining 1 in the latter half.
The book-placed TDM signal is read. In the first half of the first field, every other TDM signal in the memories 10B and 10D is read, and in the latter half, the remaining every other TDM signal is read.

These memories 10A, 10B, 10C,
The signals read from 10D are supplied to addition circuits 12A and 12B through horizontal (H) non-linear emphasis circuits 11A and 11B, respectively, and the synchronization signals of the TDM signals from the synchronization generation circuit 13 are added respectively. The signals from the adder circuits 12A and 12B are D / A conversion circuits 14
A, 14B are supplied. And this conversion circuit 14A,
The signal from 14B is supplied to FM modulation circuits 16A and 16B through recording processing circuits 15A and 15B such as low-pass filter, emphasis, and clamp. The FM-modulated signal is supplied to the switches 17A and 17B.

Further, 40L and 40R are input terminals for two-channel audio signals A _L and A _R , respectively.
The signal from 40R is supplied to the switches 17A and 17B through the audio signal processing circuit 41. The signals from the switches 17A and 17B are recorded amplifiers 18A and 18B.
And the signals from the recording amplifiers 18A and 18B are supplied to the heads 19A and 19B on the head drum.

Here, the heads 19A and 19B have different azimuth angles. These heads 19A,
19B is composed of two heads facing each other by 180 degrees, and is integrated on each side to form two magnetic gaps in one head chip. The heads 19A and 19B are servo-driven so as to rotate twice in one frame period, so that a video signal is recorded in a recording pattern of 2 channels and 4 segments as shown in FIG. 10, for example. The memories 10A to 10 described above
The time axis of the video signal is compressed between the writing and reading at D, and the first audio signal (2 channels), the second audio signal (2 channels) corresponding to the range of the margin generated by this compression,
Control signals such as AGC and clamp are recorded.

Recording is performed in this manner. On the other hand, during reproduction, the signals reproduced by the heads 19A and 19B are supplied to the reproduction amplifiers 20A and 20B. Then, first, the signals from the reproduction amplifiers 20A and 20B are supplied to the audio signal processing circuit 41 through the equalizer circuit 42,
Two-channel audio signal A _L from this processing circuit 41,
A _R is taken out to the output terminals 43L and 43R.

The signals from the reproduction amplifiers 20A and 20B are supplied to the FM demodulation circuits 21A and 21B, and the signals demodulated by the FM demodulation circuits 21A and 21B are reproduced by a low-pass filter, de-emphasis, AGC, clamp, etc., respectively. It is supplied to the A / D conversion circuits 23A and 23B through the processing circuits 22A and 22B. This A / D conversion circuit 23
The signals from A and 23B are supplied to the noise reducer circuits 25A and 25B through the non-linear de-emphasis circuits 24A and 24B corresponding to the circuits 11A and 11B. The signals from the noise reducer circuits 25A and 25B are supplied to the four 1/4 frame memories 26A, 26B, 26C and 26D which form the frame memory 26. The signals from the A / D conversion circuits 23A and 23B are supplied to the reproduction reference signal generation circuits 27A and 27B.

Further, the memories 26A, 26B, 26C, 2
In 6D, a signal is written / read by an operation reverse to that at the time of recording described above, and the read signal is supplied to the TDM demodulation circuit 28. Then, the demodulated luminance signal Y is supplied to the D / A conversion circuit 31 through the dropout compensation circuit 29 and the non-linear de-emphasis circuit 30 corresponding to the circuit 4, and the signal from the D / A conversion circuit 31 is supplied to a low-pass filter or the like. It is taken out to the output terminal 33 of the luminance signal Y via the post-processing circuit 32.

The chroma signal demodulated by the TDM demodulation circuit 28 is a dropout compensation circuit 34, a correlation filter corresponding to the circuit 9, and a non-linear de-emphasis circuit 35.
Through D / A conversion circuits 36r and 36b.
Then the D / A conversion circuit 36r, the post-processing circuit of the signal such as a low-pass filter from 36b 37r, chroma signal via 37b (color difference signal _{R-Y: P R, B} -Y: P B)
Are output to the output terminals 38r and 38b. In this way, for example, recording and reproduction of high-definition signals can be performed.

By the way, in this apparatus, recording of a video signal is as shown in FIG. This figure shows only the recording range of the video signal. In this figure, the first and third segments are 0.5 at the front end in the head scanning direction.
A blank signal range of 1H is provided in H, and in the second and fourth segments. The subsequent 3H period is used as the preamble portion, and the continuous wave (CW) signal and the segment synchronization (V
The L) signal and the ramp (R) signal are recorded. Following this preamble portion, a video signal of 136H is recorded. After that, a blank signal range of 1H is provided in the first and third segments, and a blank signal range of 1.5H is provided in the second and fourth segments.

In the recording range of the video signal of 136H, first, in the first and second segments, there are 17th to 558th horizontal periods constituting the effective range of the video signal of the first field in the original video signal. The two horizontal periods are alternately provided. Further, in the third and fourth segments, the 579th to 1120th horizontal periods forming the effective range of the video signal of the second field in the original video signal are alternately provided for every two horizontal periods. As a result, one frame of video signal is recorded in four segments. The numbers in the figure indicate the order of horizontal scanning lines in the original video signal. The symbols R and B indicate the type of chroma signal provided in each TDM signal.

On the other hand, in such an apparatus, it has been considered to reduce the transfer speed of the recording medium to perform so-called slow reproduction. In that case, in the above-mentioned device, the head 19
A and 19B have different azimuth angles. Therefore, the channels A and B of the first to fourth segments can take out the reproduction signal only when the heads 19A and 19B having the same azimuth angle are used for scanning.
Therefore, when reproduction is performed with the transport speed of the recording medium different from that at the time of recording, there is a portion where the reproduction signal cannot be obtained due to the difference in inclination of the scanning locus of the recording track and the head.

On the other hand, in the case of the slow reproduction described above, the same recording track is repeatedly reproduced by changing the phase, so that the portion where the reproduction signal cannot be obtained is gradually moved. The signals thus taken out are sequentially supplied to the frame memory 26, and only the supplied portion is rewritten. Then, it was considered to obtain a reproduced signal without missing by extracting the reproduced signal from the frame memory 26.

However, if such a process is performed, the reproduced screens are partially rewritten, so that images of different frames may simultaneously exist in one reproduced screen. In that case, if there is a large change in the image between different frames, discontinuity of the image will occur in the reproduction screen, and the image quality will be significantly deteriorated.

[0020]

The problem to be solved is that when a segment-recorded video signal is played back in slow motion, image discontinuity occurs in the playback screen and the image quality is significantly degraded. is there.

[0021]

According to the present invention, in a VTR in which one field of an interlaced video signal is divided into a plurality of tracks for segment recording / reproduction, at least two field memories (frame memory 26) are provided. And a means for setting the number of the segment to be reproduced (up / down counter 56) and a means for discriminating that the signal at the start or end of the segment has been reproduced (counter 52). One of the field memories is read, and the reproduction signal of the segment that matches the number of the segment of the setting means is written in the other, and the number of the segment of the setting means is written for each determination by the determining means. Change sequentially, and
It is a VTR in which one of the two field memories and the other read / write operation are inverted.

[0022]

According to this, by writing only the reproduction signal of the segment corresponding to the set segment number, it is possible to obtain a good slow reproduction video signal without discontinuity in the image.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the structure of the main part. Although this figure shows only one of the channels A and B, the same circuit is provided for each channel. In this figure, the reproduction signal from the reproduction amplifier 20 is supplied to the FM demodulation circuit 21, and the demodulated signal is reproduced.
2 to the A / D conversion circuit 23. This A /
The signal from the D conversion circuit 23 is supplied to the frame memory 26 through the non-linear de-emphasis circuit 24 and the noise reducer circuit 25.

Further, the signal from the A / D conversion circuit 23 is supplied to the reproduction reference signal generation circuit 27. This generation circuit 2
Reference numeral 7 has a built-in PLL and generates and detects a clock signal (PBCK), a horizontal synchronizing signal (PBH), a vertical synchronizing signal (PBV), and a segment ID signal (PBID) from the supplied reproduction signal. The segment ID signal is the TD
The first and second ID parts I of three sample periods in the M signal,
It is provided in J, and for example, 2 bits represent the first to fourth segments.

The clock signal (P
BCK), horizontal synchronization signal (PBH), vertical synchronization signal (P
BV) and segment ID signal (PBID) are supplied to the reproduction memory controller 50. Further, the reproduction signal from the reproduction amplifier 20 is supplied to the envelope detection circuit 51. Then, when the envelope of the reproduction signal is sufficient, a high-potential detection signal (ENV) is output, and this detection signal (ENV) is supplied to the reproduction memory controller 50.

Further, in the reproducing memory controller 50, the vertical synchronizing signal (PBV) from the generating circuit 27 is supplied to the clear terminal CLR of the counter 52, and at the same time,
The horizontal synchronizing signal (PBH) is supplied to the enable terminal EN of the counter 52. As a result, the counter 52 causes the horizontal sync signal (PBV) after the vertical sync signal (PBV)
H) is counted, and this count value is 136H described above.
Start of the recording range of the video signal of (first H = FHP)
Alternatively, the respective detection signals are output when the terminal ends (last H = LHP).

These detection signals (FHP and LHP) are supplied to the selector 53. In addition, the transfer direction (Cue / Rev) of the recording medium from the system control circuit (not shown)
Is supplied to the selector 53, and the end detection signal (LHP) is selected in the same direction (Cue) as during recording, and the start detection signal (FHP) is selected in the opposite direction (Rev). It The signal from the selector 53 is the segment ID signal (PBI) from the generation circuit 27.
D) is supplied to the latch circuit 54.

The segment ID signal (PBID) latched by the latch circuit 54 is supplied to the comparator 55. Further, a signal from an up / down counter 56, which will be described later, is supplied to the comparator 55, a signal indicating that they match is supplied to the AND circuit 57, and when the detection signal (ENV) from the envelope detection circuit 51 is at a high potential. A signal indicating that the timings match is generated by the timing generation circuit 58.
Is supplied to. Further, the vertical synchronizing signal (PBV) from the generating circuit 27 is supplied to the timing generating circuit 58, and the signal from this timing generating circuit 58 is supplied to the enable terminal EN of the up / down counter 56. In addition, the transfer direction of the recording medium from the system control circuit (Cue / Re
A signal indicating v) is supplied to the control terminal U / D of the up / down counter 56, and is counted up when the transport direction of the recording medium is the same direction (Cue) as during recording, and is down when it is in the reverse direction (Rev). Is counted.

That is, in the up / down counter 56,
This count value matches the segment ID signal (PBID) latched by the latch circuit 54, and the detection signal (E
When NV) is high potential, up-counting or down-counting is performed according to the transfer direction of the recording medium. As a result, the up / down counter 56 outputs segment numbers which are sequentially changed from 1 to 4.

The segment number from the up / down counter 56 is supplied to the comparator 59, and the generation circuit 2
7 is compared with the segment ID signal (PBID) from 7. Then, a signal indicating that they are matched is supplied to the AND circuit 60, and a signal indicating that they are matched when the detection signal (ENV) from the envelope detection circuit 51 is at a high potential is written to the write control terminal WE of the frame memory 26. Is supplied to.

The segment number from the up / down counter 56 is supplied to the read control signal generating circuit 61. Further, a signal (SLOW) indicating the slow reproduction from the system control circuit and a frame pulse (FP) for time axis correction are supplied to the generation circuit 61, and the signal from the generation circuit 61 is read out of the frame memory 26. It is supplied to the control terminal RE. As a result, the segment number from the up / down counter 56 is 1, 2 during slow playback.
In this case, control is performed so as to read the segments 3 and 4 side of the frame memory 26, and to read the segments 1 and 2 side when the segment numbers are 3 and 4.

Therefore, in this apparatus, for example, when the slow reproduction of 1/2 speed is performed, the relationship between the recording track and the scanning locus of the head is as schematically shown in FIG. That is, indicates the relationship between the recording track and the scanning locus of the head in each case. Here, the channels A and B of the track and the channels A and B of the head are reversed at the start end, and coincide with the segment 1 at the end. Also, in this case, the start end portion is aligned with the segment 2, and the channel portions A and B are reversed at the end portion. Furthermore, channels A and B are reversed at the beginning,
It matches segment 2 at the end. Thereafter, this scanning is sequentially performed. As a result, the signal in the shaded portion in the figure is reproduced, and in this case, the start end and the end are alternately matched with the sequential segment.

Therefore, the envelope of the reproduction signal becomes as shown in FIG. 3A, for example, and the detection signal (ENV) as shown in FIG. 3B is taken out. On the other hand, the detection signal (L
HP) is taken out at the position indicated by ▽ in the figure. As a result, the segment number of the up / down counter 56 becomes as shown in C of FIG.

With the segment number, the latter half of the segment 1 is written in the recording range of the segment 1 of the frame memory 26 during the period. In the further period, the first half of the segment 2 is written in the recording range of the segment 2 of the frame memory 26, and in the period of the second half of the segment 2 is written in the recording range of the segment 2 of the frame memory 26. At this time, the segments 3 and 4 of the frame memory 26 are read.

In the next period, the first half of the segment 3 is written in the recording range of the segment 3 of the frame memory 26, and in the period of the second half of the segment 3 is written in the frame memory 2.
6 is written in the recording range of segment 3. In the further period, the first half of the segment 4 is written in the recording range of the segment 4 of the frame memory 26. At this time, the segments 1 and 2 of the frame memory 26 are read.

Thereafter, the first half and the second half of each segment are written alternately in the recording range of each corresponding segment of the frame memory 26. At the same time, the recording range of the frame memory 26 on which writing is not performed is read out. Thereby, for example, slow speed reproduction at 1/2 speed is performed.

Further, in this apparatus, for example, when a slow reproduction is performed at 1/4 speed in which the recording medium is moved in the same direction (Cue) as the recording direction, the relationship between the recording track and the scanning locus of the head is As shown in FIG. That is, (16) indicates the relationship between the recording track and the scanning locus of the head in each case. Here, a part of the segment 2 is matched at the start end, the track channels A and B and the head channels A and B are reversed at the middle part, and the end part is matched to the segment 1. Also, in this case, the start end portion corresponds to the segment 2, the channels A and B are reversed in the middle portion, and the end portion corresponds to a part of the segment 1. Further, from the start end portion to the middle portion, a part of the segment 2 is matched, and at the end portion, the channels A and B are reversed. Thereafter, this scanning is sequentially performed.
As a result, the signal in the shaded portion in the figure is reproduced and coincides with the sequential segment at the start, middle and end, and in this case, the reverse portion of channels A and B gradually moves from the start to the end. Has been done.

Therefore, the envelope of the reproduced signal is as shown in FIG. 5A, for example, and the detection signal (ENV) as shown in FIG. 5B is taken out. On the other hand, the detection signal (L
HP) is taken out at the position indicated by ▽ in the figure. As a result, the segment number of the up / down counter 56 becomes as shown in C of FIG.

With this segment number, writing is not performed due to segment mismatch during the period,
During the period, the first half of the segment 2 is written in the recording range of the segment 2 of the frame memory 26, the middle of the segment 2 is written in the recording range of the segment 2 of the frame memory 26, and the second half of the segment 2 is written during the period. It is written in the recording range of the segment 2 of the frame memory 26. At this time, the segments 3 and 4 of the frame memory 26 are read.

During the next period, writing is not performed due to segment mismatch, the first half of segment 3 is written in the recording range of segment 3 of frame memory 26 during period, and the middle of segment 3 is frame memory 2 during period.
6 is written in the recording range of the segment 3, and the second half of the segment 3 is written in the recording range of the segment 3 of the frame memory 26 during the period. During the further period, writing is not performed due to segment mismatch, and during the period (10), the first half of the segment 4 is the segment 4 of the frame memory 26.
Is written in the recording range of (4), the middle of the segment 4 is written in the recording range of the segment 4 of the frame memory 26 in the period (11), and the latter half of the segment 4 is recorded in the segment 4 of the frame memory 26 in the period (12). Written to the range. At this time, segment 1 of the frame memory 26,
The second side is read.

Further, during the period (13), writing is not performed due to segment mismatch, the first half of the segment 1 is written in the recording range of the segment 1 of the frame memory 26 during the period (14), and the segment is written during the period (15). The middle of 1 is written in the recording range of segment 1 of the frame memory 26, and (1
During the period 6), the latter half of the segment 1 is written in the recording range of the segment 1 of the frame memory 26. At this time, the segments 3 and 4 of the frame memory 26 are read. As a result, for example, slow reproduction is performed at 1/4 speed in which the recording medium is moved in the same direction (Cue) as the recording direction.

Further, in this apparatus, for example, when slow reproduction is performed at 1/4 speed in which the recording medium is moved in the reverse direction (Rev) from the recording direction, the relationship between the recording track and the scanning locus of the head is as follows. It becomes as schematically shown in FIG.
That is, (16) indicates the relationship between the recording track and the scanning locus of the head in each case. Here, a portion of the segment 4 coincides with the start end portion, a segment 4 coincides with the first half of the middle portion, and channel A and B of the track and channel A and B of the head reverse in the latter half of the intermediate portion. , Matches segment 3 at the end. Also, in the start end part, the channel 4 is matched with the segment 4 in the first half of the middle part, the channels A and B are reversed in the first half of the middle part, with the segment 3 in the latter half of the middle part, and with the part of the segment 3 in the end part. .. In addition, in the beginning part, it coincides with a part of the segment 4, channels A and B reverse in the first half of the middle part, in the latter half of the middle part it coincides with segment 3, and in the end part channels A and B reverse. ing. In addition, channels A and B are reversed at the start end, and segment 3 is in the first half of the middle part.
, The channels A and B reverse in the latter half of the middle part,
It matches a part of segment 2 at the end. Thereafter, this scanning is sequentially performed. As a result, the signal in the shaded portion in the figure is reproduced and coincides with the sequential segment at the start, middle and end, and in this case, the reverse portion of channels A and B gradually moves from the start to the end. Has been done.

Therefore, the envelope of the reproduced signal becomes as shown in A of FIG. 7, for example, and the detection signal (ENV) as shown in B of FIG. 7 is taken out. On the other hand, the detection signal (L
HP) is taken out at the position indicated by ▽ in the figure. As a result, the segment number of the up / down counter 56 becomes as shown in C of FIG.

With the segment number, the first half of the segment 4 is written in the recording range of the segment 4 of the frame memory 26 during the period. In the further period, the latter half of the segment 3 is written in the recording range of the segment 3 of the frame memory 26, and in the period of the segment 3
The second half of the middle of is written in the recording range of the segment 3 of the frame memory 26, the first half of the middle of the segment 3 is written in the recording range of the segment 3 of the frame memory 26 in the period of, and the first half of the segment 3 is written in the period of It is written in the recording range of the segment 3 of the memory 26.
At this time, the segments 1 and 2 of the frame memory 26 are read.

In the next period, the latter half of the segment 2 is written in the recording range of the segment 2 of the frame memory 26, and in the period of the middle second half of the segment 2 is written in the recording range of the segment 2 of the frame memory 26. During the period, the first half of the middle of the segment 2 is the frame memory 26.
Of the segment 2 of the frame memory 26 is written in the recording range of the segment 2 of
Is written in the recording range of. Further, in the period (10), the latter half of the segment 1 is written in the recording range of the segment 1 of the frame memory 26, and in the period (11), the latter half of the segment 1 is written in the recording range of the segment 1 of the frame memory 26. , The middle first half of the segment 1 is written in the recording range of the segment 1 of the frame memory 26 in the period (12), and the first half of the segment 1 is written in the recording range of the segment 1 of the frame memory 26 in the period (13). .. At this time, the segments 3 and 4 of the frame memory 26 are read.

Further, in the period (14), the latter half of the segment 4 is written in the recording range of the segment 2 of the frame memory 26, and in the period (15), the latter half of the segment 4 is the recording range of the segment 4 of the frame memory 26. Written in
During the period (16), the first half of the middle of the segment 4 is written in the recording range of the segment 4 of the frame memory 26. At this time, the segments 1 and 2 of the frame memory 26 are read. As a result, for example, slow reproduction is performed at a 1/4 speed in which the recording medium is moved in the reverse direction (Rev) to the recording direction.

Thus, according to the above-mentioned apparatus, by writing only the reproduction signal of the segment that matches the set segment number (up / down counter 56) (frame memory 26), discontinuity in the image may occur. It is possible to obtain a good slow reproduction video signal.

The above-mentioned device can be applied to slow reproduction of arbitrary speed other than the described 1/2 slow reproduction and 1/4 slow reproduction, and the recording medium is transported in the same direction (Cue) and the same direction as during recording. It can be applied to either case of the reverse direction (Rev).

[0049]

According to the present invention, by writing only the reproduction signal of the segment corresponding to the set segment number, a good slow reproduction video signal without discontinuity in the image can be obtained. Is now possible.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a main part of an example of a VTR according to the present invention.

FIG. 2 is a diagram showing a relationship between a track and head scanning during ½ × slow reproduction.

FIG. 3 is a waveform diagram of a signal at that time.

FIG. 4 is a diagram showing a relationship between tracks and head scanning during 1/4 speed slow reproduction.

FIG. 5 is a waveform diagram of a signal at that time.

FIG. 6 is a diagram showing a relationship between tracks and head scanning during reverse 1/4 speed slow reproduction.

FIG. 7 is a waveform diagram of a signal at that time.

FIG. 8 is a configuration diagram of a VTR that performs segment recording / reproduction.

FIG. 9 is a diagram showing one horizontal period of a TDM signal.

FIG. 10 is a diagram showing a recording pattern of a video signal.

FIG. 11 is a diagram showing an array of recorded video signals.

[Explanation of symbols]

 20 reproduction amplifier 21 FM demodulation circuit 22 reproduction processing circuit 23 A / D conversion circuit 24 non-linear de-emphasis circuit 25 noise reducer circuit 26 frame memory 27 reproduction reference signal generation circuit 50 reproduction memory controller 51 envelope detection circuit 52 counter 53 selector 54 latch circuit 55 comparator 56 up-down counter 57 AND circuit 58 timing generation circuit 59 comparator 60 AND circuit 61 read control signal generation circuit

Claims (1)

[Claims] 1. A VTR in which one field of an interlaced video signal is divided into a plurality of tracks for segment recording / reproduction, at least two field memories, and means for setting the number of the segment to be reproduced. And a means for discriminating that the signal at the beginning or the end of the segment has been reproduced, one of the two field memories being read out at the time of slow reproduction, and the other being the same as the segment number of the setting means. The reproduction signal of the segment is written, the number of the segment of the setting means is sequentially changed every time the determination means determines, and the read / write operation of one and the other of the two field memories is performed. A VTR that is designed to be inverted.