JPH0580156B2 - - Google Patents
Info
- Publication number
- JPH0580156B2 JPH0580156B2 JP1107641A JP10764189A JPH0580156B2 JP H0580156 B2 JPH0580156 B2 JP H0580156B2 JP 1107641 A JP1107641 A JP 1107641A JP 10764189 A JP10764189 A JP 10764189A JP H0580156 B2 JPH0580156 B2 JP H0580156B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- region
- polycrystalline silicon
- substrate
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
- Semiconductor Memories (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1107641A JPH0271521A (ja) | 1989-04-28 | 1989-04-28 | 半導体集積回路装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1107641A JPH0271521A (ja) | 1989-04-28 | 1989-04-28 | 半導体集積回路装置の製造方法 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57075341A Division JPS58192364A (ja) | 1982-05-07 | 1982-05-07 | 半導体集積回路装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0271521A JPH0271521A (ja) | 1990-03-12 |
| JPH0580156B2 true JPH0580156B2 (enExample) | 1993-11-08 |
Family
ID=14464344
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1107641A Granted JPH0271521A (ja) | 1989-04-28 | 1989-04-28 | 半導体集積回路装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0271521A (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SE9303746L (sv) * | 1993-11-15 | 1995-05-16 | Moelnlycke Ab | Engångsblöja fördsedd med elasticerade benmanschetter |
| US5669896A (en) * | 1994-06-16 | 1997-09-23 | Kimberly-Clark Worldwide, Inc. | Absorbent garment comprising dual containment flaps |
| USH1630H (en) * | 1995-03-01 | 1997-01-07 | The Procter & Gamble Company | Diaper having plural upstanding leg cuffs |
| JP3385190B2 (ja) * | 1997-09-30 | 2003-03-10 | ユニ・チャーム株式会社 | 使い捨て吸収性物品 |
| JP3434695B2 (ja) * | 1997-12-26 | 2003-08-11 | ユニ・チャーム株式会社 | 使い捨ておむつ |
| US8043275B2 (en) * | 2001-12-19 | 2011-10-25 | Kimberly Clark Worldwide, Inc. | Absorbent garment with dual containment flaps |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5694643A (en) * | 1979-12-27 | 1981-07-31 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacture of semiconductor device |
-
1989
- 1989-04-28 JP JP1107641A patent/JPH0271521A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0271521A (ja) | 1990-03-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0175378B1 (en) | Dynamic random access memory (dram) | |
| US7638401B2 (en) | Memory device with surface-channel peripheral transistors | |
| US4213139A (en) | Double level polysilicon series transistor cell | |
| US5734188A (en) | Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same | |
| US5266507A (en) | Method of fabricating an offset dual gate thin film field effect transistor | |
| US6559012B2 (en) | Method for manufacturing semiconductor integrated circuit device having floating gate and deposited film | |
| JPS6050065B2 (ja) | メモリセル | |
| US5441902A (en) | Method for making channel stop structure for CMOS devices | |
| US4145803A (en) | Lithographic offset alignment techniques for RAM fabrication | |
| US4612565A (en) | Semiconductor memory device | |
| US4380863A (en) | Method of making double level polysilicon series transistor devices | |
| US4574465A (en) | Differing field oxide thicknesses in dynamic memory device | |
| JPS6349906B2 (enExample) | ||
| JPH0436468B2 (enExample) | ||
| US5917211A (en) | Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same | |
| US4319263A (en) | Double level polysilicon series transistor devices | |
| JPS60189964A (ja) | 半導体メモリ | |
| US4388121A (en) | Reduced field implant for dynamic memory cell array | |
| JPH0580156B2 (enExample) | ||
| US4264965A (en) | Dummy cell structure for MIS dynamic memories | |
| JPS5856266B2 (ja) | Mosメモリ | |
| JP4190791B2 (ja) | 半導体集積回路装置の製造方法 | |
| US5116775A (en) | Method of producing semiconductor memory device with buried barrier layer | |
| US4208726A (en) | Programming of semiconductor read only memory | |
| US5168075A (en) | Random access memory cell with implanted capacitor region |