JPH0576617B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an exposure time setting circuit for an electronic shutter, and more particularly to an electronic shutter that is advantageously implemented in a so-called intermediate lens shutter-type camera capable of automatically setting the exposure time. .

BACKGROUND ART In recent years, intermediate-level lens-shutter type AE (automatic exposure) cameras have been equipped with so-called AE lock devices that store the exposure amount in advance by, for example, pressing the release button halfway before taking a picture. With such an AE camera, when photographing a subject such as a person under conditions where backlight or the sky occupies most of the shooting screen, the exposure time matches the backlight or sky light, making it difficult to capture the desired subject. In contrast,
There are drawbacks such as significant underexposure. Therefore, the camera is structured so that the exposure amount is determined in advance according to the brightness of the person, avoiding backlighting, sky light, etc., and the shutter can be operated with the actual exposure while keeping that exposure amount in memory. . In such a memory, for example, as an analog method, a value is once held in a capacitor, and this capacitor is charged with a value that is applied to one terminal of a comparator until it reaches a reference voltage that is applied to the other terminal of the comparator. Sometimes it is configured to stop photometry.

Problems to be Solved by the Invention In the above-mentioned prior art, the photometry time is detected by the function of a comparator and the photometry is stopped, so the circuit configuration becomes complicated. Furthermore, errors are likely to occur due to the offset voltage of the comparator, and this error results in an increase or decrease in the integrated voltage value by a constant voltage, which ultimately increases or decreases only when there is a certain amount of time. Considering the effect this has on exposure, for example, if the error is 0.5 msec, when the appropriate exposure time is 30 msec, it is only 1/6
The error is only 0, but at 1 msec it becomes a 1/2 error, making it impossible to set a slight exposure time.

The purpose of the present invention is to solve the above-mentioned technical problems,
When the subject has low brightness, the saturation detection means detects the saturation state so that exposure can be performed in a time shorter than the optimum exposure time for photographing the subject;
Another object of the present invention is to provide an electronic shutter whose configuration is simplified.

Means for Solving the Problems The present invention provides: (a) first, second and third positions B1, B2,
A shutter button 30 that is pressed on B3, (b) a light receiving element 1 facing the subject, (c) a first capacitor C1 that is charged in response to the output from the light receiving element 1, and (d) a first capacitor C1. A switch connected in parallel to
SW1; (e) first level discrimination means 3 for level discriminating the output voltage of the first capacitor C1 at a predetermined first discrimination level; (f) a second capacitor C2; (g) a second capacitor C2; Shutter button 30
is charged to a predetermined voltage when it is in the first position B1, and is charged to a predetermined voltage when it is in the first position B1, and
(h) a current mirror circuit, (h1) a pair of first circuits whose bases are commonly connected;
and second transistors Q3, Q4; (h2) first and second constant current sources Q5, Q supplying constant current to the collectors of the first and second transistors Q3, Q4, respectively;
7, (h3) the first transistor Q3 is connected in parallel to the second capacitor C2, and (h4) a third constant current source Q6; (h5) a third constant current source Q6; 1 and the bases of the second transistors Q3 and Q4, and the base is connected to the connection point between the second constant current source Q5 and the second transistor Q4,
The collector current of the second transistor Q4 is the second
a current mirror circuit including a third transistor Q8 that controls the current to be equal to the current of the constant current source Q5; (i) a third constant current source Q6 and a third transistor Q;
8, and the third constant current source Q6
Detection means Q10 detects that the difference in the current flowing from the current to the third transistor Q8 becomes small.
and (j) in response to each output of the first level discrimination means 3 and the detection means Q10, the charging voltage of the first capacitor C1 exceeds the first discrimination level, or the third constant current is determined by the detection means Q10. means 5, Q2 for stopping the discharge of the second capacitor C2 by the current mirror circuit when it is detected that the difference in the current flowing from the source Q6 to the third transistor Q8 has become small; 3rd from position B2
By pressing the position B3, the second
means SW3 for charging the capacitor C2 with the current from the first constant current source Q7; (l) the shutter button 30 is moved from the second position B2 to the third position;
Opens by being pressed to position B3,
shutter means 15 for closing in response to an electrical signal;
16, 17, and (m) the output voltage of the second capacitor C2 is level-discriminated at the second discrimination level, which is the charged predetermined voltage, and the output voltage of the second capacitor C2 is at the first discrimination level. This electronic shutter is characterized in that it includes a second level discrimination means 12 which applies the electric signal to the shutter means 15, 16, 17 when the electric signal reaches the shutter means 15, 16, 17.

Effect According to the present invention, when the shutter button 30 is not operated, the first switch SW1 is activated.
Capacitor C1 is discharged, and second capacitor C2 is charged to a predetermined voltage. Move the shutter button 30 from the first position B1 to the second position.
When the position B2 is pressed, the switch SW1 is shut off, and the first capacitor C1 is charged at a speed corresponding to the brightness of the subject by the light receiving element 1.
At the same time, the second capacitor C2 is discharged over time by the first transistor Q3 of the current mirror circuit.

When the subject is of high brightness, the first capacitor C
The charging voltage of No. 1 exceeds the first discrimination level in a relatively short time, and at this time, depending on the detection means Q10, the charging voltage of No. 1 exceeds the first discrimination level in a relatively short time.
It is not detected that the difference in the current flowing from the constant current source Q6 to the third transistor Q8 has become small, that is, the first transistor Q3 is not saturated, and in this state, the output of the first level discriminator 3 is Therefore, discharging of the second capacitor C2 is stopped.

By pressing the shutter button 30 from the second position B2 to the third position B3, the shutter means 15, 16, 17 open and the second
The capacitor C2 is charged by the current of the first constant current source Q7, and when the charging voltage thereof increases and the voltage of the second capacitor C2 reaches the second discrimination level, the voltage from the second level discrimination means 12 is increased. An electric signal is applied to the shutter means 15, 16, 17, and the shutter means 15, 16, 17 are closed.

When the subject has low brightness, the voltage due to discharge of the second capacitor C2 decreases and the collector of the first transistor Q3 becomes saturated before the charging voltage of the first capacitor C1 exceeds the first discrimination level. This increases the base current of the first transistor Q3, and since this base current is supplied by the third transistor Q8, the collector current of the third transistor Q8 increases. Third
The difference between the collector current of the transistor Q8 and the current of the third constant current source Q6 flows into the detection means Q10. When the detection means Q10 detects that the difference in currents has become small, this stops the discharge of the second capacitor C2, and then the shutter button 30 is moved from the second position B2 to the third position.
By pressing the position B3, the second capacitor C2 is connected to the first constant current source Q7 in the same manner as described above.
When the charging voltage returns to the second discrimination level, the shutter means 1
5, 16, and 17 will be closed. In this way, even for a subject with low brightness, the exposure time can be set with an exposure time that is less than the optimum exposure time, making it possible to influence the subject.

Embodiment FIG. 1 is an electrical circuit diagram of an embodiment of the present invention. A photodiode 1 converts an optical signal of light from an object into an electrical signal. Photodiode 1 is connected in series to first capacitor C1 and in parallel to switch SW1.
Connection point 2 between light receiving element 1 and first capacitor C1
is connected to the inverting input terminal of the comparison circuit 3 via line l1. A reference voltage from a reference voltage setting circuit 4 is applied to a non-inverting input terminal of the comparator circuit 3 via a line 12. The output of the comparator circuit 3 is given to the base of the transistor Q1, and the emitter of this transistor Q1 is connected to the power supply +Vcc,
The collector is connected to the latch circuit 5 via line l3. An initial reset circuit 40 is connected to the latch circuit 5. The latch circuit 5 includes transistors Q11, Q12, and Q1 whose emitters are grounded.
3. Consists of Q14. The output from the latch circuit 5 is applied to the base of the transistor Q2, the emitter of which is grounded, and the collector connected to the transistor Q3 via a common line l4.
and connected to the base of transistor Q4.
The transistor Q3, the transistor Q4, the resistor R1, and the resistor R2 constitute a current mirror circuit. The output from the reference bias setting circuit 6 is connected to transistors Q5, Q6, Q via a common line l5.
Connected to the base of 7. Transistor Q5, Q
6, the emitter of Q7 is connected to the power supply +Vcc.
The collector of transistor Q5 is transistor Q4
connected to the collector of Also transistor Q4
The collector of transistor Q8 is connected to the base of transistor Q8, and the emitter of transistor Q8 is connected to the bases of transistor Q4 and transistor Q3 via common line l4. transistor Q8
The collector of transistor Q6 is connected to the collector of transistor Q6, and the collector of transistor Q7 is connected to transistor Q3 through forward-connected diode D1.
connected to the collector of Connection point 9 between the anode of diode D1 and the collector of transistor Q7
is grounded via switch SW3. A connection point 11 between the cathode of the diode D1 and the collector of the transistor Q3 is connected to the second capacitor C2 via lines l6 and l7. The voltage of the second capacitor C2 is applied to the inverting input terminal of the comparator circuit 12 as second level discrimination means. This second
A comparison circuit 12 serving as a level discrimination means is connected to the second
The output voltage of capacitor C2 is connected to the transistor Q.
Level discrimination is performed at a predetermined second discrimination level higher than the voltage at the time of saturation of No. 3. Comparison circuit 1
Connection point 13 on the inverting input side of 2 and connection point 1 on the output side
4, a switch SW2 is connected in parallel. The output from comparator circuit 12 is applied to the base of transistor Q9 via resistor R3. The emitter of transistor Q9 is grounded, and the collector is connected to power supply +Vcc via exciting coil 15.
Due to the action of this excitation coil 15, the plunger 1
5a is driven, and the shutter 17 is opened and closed via the shutter drive mechanism 16.

Collector of transistor Q6 and transistor Q
The connection point 20 with the collector of 8 is connected via line l10 to the base of transistor Q10.
The emitter of transistor Q10 is connected to the power supply +Vcc, and the collector is connected to line 13.

FIG. 2 is a timing chart for explaining how the exposure time is set by the exposure time setting circuit according to the present invention. Before time t1, the switches SW1 and SW2 are in the ON state as shown in FIG. 2, and the switch SW3 is also in the ON state as shown in FIG. 2. Since the switch SW2 is in the ON state, the comparison circuit 12
, the second capacitor C2 is charged to a predetermined constant value. Also, transistor Q9
is conductive, so the excitation coil 15 is energized and the plunger 1 is energized as shown in FIG.
5a is being driven. Therefore, the shutter 17 remains closed via the shutter drive mechanism 16 as shown in FIG. 26. Also switch
Since SW2 is closed, the second capacitor C
2 is charged to a predetermined constant value as shown in FIG. At time t1, when the shutter button 30 is pressed from the position B1 to the position B2, the shutter drive mechanism 16 prohibits the shutter button 30 from being pressed down from the position B2 to the position B3. At time t1, as shown in FIG. 2, switches SW1,
SW2 becomes OFF state. As a result, the initial reset circuit 40 applies a high level signal to the base of the transistor Q14 of the latch circuit 5. This makes transistor Q15 conductive and connects node 2.
0 becomes a low level, transistor Q2 is cut off, and transistor Q3 is therefore conductive. Further, since the switch SW2 is turned off, the second capacitor C2 starts discharging. On the other hand, switch
Since SW1 is in the OFF state, the first capacitor C
1 starts charging as shown in FIG.

Assume that the subject has high brightness. At this time, the first capacitor C1 starts charging at a high speed, as indicated by reference numeral m1 in FIG.
On the other hand, the second capacitor C2 simultaneously starts discharging at a constant rate. As the first capacitor C1 is being charged, when the voltage at the inverting input terminal of the comparator circuit 3 exceeds the reference voltage applied to the non-inverting input terminal at time t2, the output from the comparator circuit 3 becomes low level; Therefore, transistor Q1 becomes conductive and delivers a high level signal to latch circuit 5 via line l3. Therefore, the latch circuit 5 operates and outputs a high level signal as a photometry end signal shown in FIG. 2 to the base of the transistor Q2, thereby turning on the transistor Q2 and cutting off the transistor Q3. As a result, the discharge of the second capacitor C2 is stopped. In this way, the photometry is completed, and the photometry time W1 is set. Note that this photometry time W1 is less than a predetermined time during which the collector of the transistor Q3 is saturated.

Further, the cut-off state of transistor Q3 is latched by latch circuit 5.

In this state, at time t3, the operator presses the shutter button 30 from position B2 to position B3. In conjunction with this, switch SW
3 is in the OFF state as shown in FIG. 28.
Therefore, the collector current of the transistor Q7 flows to the second capacitor C2 via the diode D1, the line l6, and the line l7, and the second capacitor C2 starts charging from time t3. and time t3
When the voltage of the second capacitor C2 exceeds the reference voltage applied to the non-inverting input terminal of the comparator circuit 12 at time t4, when the photometry time W1 has elapsed since then, the comparator circuit 12 sends a low level signal to the base of the transistor Q9. Derive. This shuts off the transistor Q9, thereby demagnetizing the excitation coil 15 and driving the plunger 15a to drive the shutter 17 via the shutter drive mechanism 16.
is closed. In this way, the shutter 17 is kept open for the photometry time W1, thereby making it possible to photograph the subject with an appropriate amount of exposure even when the subject is backlit or the sky occupies most of the photographic screen.

Next, assume that the incident light intensity applied to the photodiode 1 is small. At this time, as shown by reference numeral m2 in FIG. 2, the first capacitor C1
charging is slow, and therefore it takes a long time for the value of the first capacitor C1 to reach the reference voltage of the comparator circuit 3. Therefore, the value of the second capacitor C2 reaches collector saturation of the transistor Q3 before the value of the first capacitor C1 reaches the reference voltage, and saturation is detected at time t2a as shown in FIG. 2. The value of this capacitor C2 is the transistor Q3
At time t2a when the transistor Q3 reaches saturation,
The base current increases rapidly. Therefore, when the collector current of transistor Q8 increases and exceeds the collector current of transistor Q6, transistor Q10 becomes conductive. As a result, the transistor Q11 becomes conductive, and the latch circuit 5 operates to output a high level signal as a photometric signal to the base of the transistor Q2, making the transistor Q2 conductive and cutting off the transistor Q3. . Therefore, the discharge of the second capacitor C2 is stopped. In this way, photometry ends. Thereafter, the voltage of the second capacitor C2 is maintained at a constant value by the action of the latch circuit 5. In this state, at time t3, the operator presses the shutter button 30 to B2.
When the shutter is pressed from the position to the position B3, the shutter 17 is opened via the shutter drive mechanism 16. At this time t3, the switch SW3 is turned off as described above, and the second capacitor C2 starts charging. Then, from time t3, photometry time W
When reaching time t4a, which is reached by 2, the comparator circuit 1
The voltage at the inverting input terminal of No. 2 reaches the reference voltage applied to the non-reflective input terminal or higher, so that the transistor Q9 is cut off and the plunger 15a is driven.
The shutter 17 is closed via the shutter drive mechanism 16.

The current mirror circuit described above further includes transistors Q6 and Q8. When the subject is of low brightness, the charging voltage of capacitor C1 rises slowly as described above, and the voltage of capacitor C2 rises due to discharge before the voltage of capacitor C1 reaches the reference voltage of line l2. The voltage then decreases until it reaches a voltage at which the collector of transistor Q3 is saturated. At this time, transistor Q4
Since feedback is applied by transistor Q8 so that the collector current of transistor Q5 becomes equal to the collector current of transistor Q5, when the collector of transistor Q3 becomes saturated, its base current increases, and this base current flows into transistor Q8. Therefore, the collector current of transistor Q8 increases. The difference between the collector current of transistor Q8 and the collector current of transistor Q6 is
Flows into PNP transistor Q10. The collector current of transistor Q6 is set to a certain value smaller than the collector current of transistor Q5. As the difference between the collector currents of transistors Q8 and Q6 becomes smaller, transistor Q10 becomes conductive, activating latch circuit 5, and stopping photometry as described above.

In this way, when the incident luminous intensity is low, the saturation of the transistor Q3 is detected before the first capacitor C1 reaches a predetermined value, and when this saturation is detected, the photometry is terminated. It is now possible to perform exposure at the optimum exposure time even when the exposure time is low, and there is no need to take the necessary exposure time as in the conventional method, improving operability. In addition, since photometry is stopped when the saturation of transistor Q3 is detected, the circuit configuration is simpler than when using a conventional circuit that uses a comparison circuit to detect when the level has reached a certain level. Simplified.

Effects of the Invention As described above, according to the present invention, even when the subject has low brightness, the exposure time does not become long, and the exposure time can be measured by detecting the saturation of the transistor when the brightness is low, and setting the exposure. Since the time is set, the circuit configuration is simpler than the conventional one.
Furthermore, it is possible to prevent offset errors in the comparator circuit as much as possible, unlike in the prior art.

[Brief explanation of the drawing]

Fig. 1 is an electrical circuit diagram of an embodiment of the present invention;
The figure is a timing chart for explaining its operation. 1... Photodiode, 3, 12... Comparison circuit, 5... Latch circuit, 16... Shutter drive mechanism, 17... Shutter, 30... Shutter button, C1, C2... Capacitor, Q1 to Q14...
...Transistor, SW1~SW3...Switch.

Claims (1)

[Claims] 1 (a) First, second and third positions B1, B
2. Shutter button 30 operated by pressing B3
(b) a light receiving element 1 facing the subject; (c) a first capacitor C1 charged in response to the output from the light receiving element 1; and (d) a shutter button 30 connected in parallel to the first capacitor C1. A switch that conducts when the is in the first position B1 and shuts off when the is in the second position B2.
SW1; (e) first level discrimination means 3 for level discriminating the output voltage of the first capacitor C1 at a predetermined first discrimination level; (f) a second capacitor C2; (g) a second capacitor C2. , shutter button 30
is charged to a predetermined voltage when it is in the first position B1, and is charged to a predetermined voltage when it is in the first position B1, and
(h) a current mirror circuit, (h1) a pair of first circuits whose bases are commonly connected;
and second transistors Q3, Q4; (h2) first and second constant current sources Q5, Q supplying constant current to the collectors of the first and second transistors Q3, Q4, respectively;
7, (h3) the first transistor Q3 is connected in parallel to the second capacitor C2, and (h4) a third constant current source Q6; (h5) a third constant current source Q6; 1 and the bases of the second transistors Q3 and Q4, and the base is connected to the connection point between the second constant current source Q5 and the second transistor Q4,
The collector current of the second transistor Q4 is the second
a current mirror circuit including a third transistor Q8 that controls the current to be equal to the current of the constant current source Q5; (i) a third constant current source Q6 and a third transistor Q;
8, and the third constant current source Q6
Detection means Q10 detects that the difference in the current flowing from the current to the third transistor Q8 becomes small.
and (j) in response to each output of the first level discrimination means 3 and the detection means Q10, the charging voltage of the first capacitor C1 exceeds the first discrimination level, or the third constant current is determined by the detection means Q10. means 5, Q2 for stopping the discharge of the second capacitor C2 by the current mirror circuit when it is detected that the difference in the current flowing from the source Q6 to the third transistor Q8 has become small; 3rd from position B2
By pressing the position B3, the second
means SW3 for charging the capacitor C2 with the current from the first constant current source Q7; (l) the shutter button 30 is moved from the second position B2 to the third position;
Opens by being pressed to position B3,
shutter means 15 for closing in response to an electrical signal;
16, 17, and (m) the output voltage of the second capacitor C2 is level-discriminated at the second discrimination level, which is the charged predetermined voltage, and the output voltage of the second capacitor C2 is at the first discrimination level. an electronic shutter characterized in that the electronic shutter comprises a second level discrimination means 12 which applies the electric signal to the shutter means 15, 16, 17 when the electric signal reaches the shutter means 15, 16, 17.