JPH0575610A - Method and device for monitoring system audit - Google Patents

Abstract

PURPOSE:To surely check a fault without giving a load onto a CPU with respect to the method and device for monitoring system audit. CONSTITUTION:In various exchange system in which the system itself finds out various accident disturbing normal communication and provided with an audit function repairing the accident quickly, a check means 111 is activated for a standard period T1 not disturbing a usual exchange function to detect a fault, then the check means 111 is operated for a shorter period Ts than the standard period T1 to confirm the fault.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system audit monitoring method and apparatus.

[0002]

2. Description of the Related Art FIG. 4 is a conceptual diagram showing an internal configuration of a packet switch 10. The central controller 11 is operated by a program stored in the program memory 12, and the data transmitted from the packet multiplexer (packet terminal) or the like is temporarily stored in the packet buffer 13 and separated. It is designed to be transferred to the intended packet terminal or data terminal via the line.

When transferring data from one data terminal to another data terminal as described above, the number of each data terminal or the like, the amount of transmission data, etc. are stored in the call control memory 14 and managed.

In the above configuration, the CPU 1
1 is equipped with a usage rate detecting means 100 composed of a program for detecting the usage rate of the packet buffer 13. The usage rate of the packet buffer 13 naturally increases as the amount of data entering and leaving the packet switch increases. Therefore, when the usage rate detected by the usage rate detecting means 100 becomes equal to or higher than a predetermined value, the packet buffer 13, which is one of the resources, is used up by subjecting the call setting request from the data terminal to congestion regulation. That is, the congestion state is prevented.

The resources include various spaces such as a space for accumulating data to be actually transmitted, a space required for call setup, a space required for command processing, and the like. The usage rate is of course high when the amount of data going in and out of the exchange is large as described above, but is also high when various kinds of accidents such as hang-up and memory destruction that prevent normal communication occur.
Therefore, the CPU 11 is provided with a check unit 111 made of a program to periodically check the value detected by the usage rate detection unit 100, and when some abnormalities occur, the restoration unit 200 automatically restores the value. It has a so-called audit function.

[0006]

However, when the checking cycle by the checking means 111 is long,
It's hard to tell if a resource is really hung up, or if it's just momentarily over-utilized. Therefore, if the check cycle is shortened, the abnormality can be checked with considerable accuracy, but the load on the CPU 11 is increased and the original function of the exchange is hindered.

The present invention has been proposed in view of the above conventional circumstances, and an object thereof is to provide a system audit monitoring method and apparatus capable of checking an abnormality without imposing a load on the CPU. To do.

[0008]

The present invention employs the following means in order to achieve the above object. That is, in various exchange systems equipped with an audit function that finds various accidents that interfere with normal communication by itself and repairs them promptly, for example, as shown in FIGS. 1 to 3, a standard cycle that is not enough for a normal exchange function. When the checking means 111 is operated at T1 to detect an abnormality, the checking means 11 is operated at a short cycle Ts shorter than the standard cycle T1.
1 is operated to check for an abnormality.

A cycle control means 112 is provided to manage the switching between the standard cycle T1 and the short cycle Ts. Also,
The number of abnormalities in the short cycle Ts is counted by the counter means 113, and when the count value is equal to or larger than the predetermined value, it is considered as a true abnormality and the repairing means 200 is instructed to repair. Further, the counter means 113 instructs the cycle control means 112 to set the standard cycle T1 when the number of checks in the short cycle Ts by the counter means 113 is equal to or less than a predetermined value and the abnormal state is repaired.

[0010]

The checking means 111 is the usage rate detecting means 10
0 is periodically checked, and if there is an abnormality, the repairing means 200
Is designed to operate. Therefore, according to the above configuration, the CPU 1 normally checks at the standard cycle T1.
1 is not burdened, and the standard period T1
If there is any abnormality in the check in step 1, that is, if there is a suspicion of abnormality, the check is performed in the short cycle Ts. The check in the short cycle Ts is performed a predetermined number of times, and when an abnormality occurs more than that number of times, it is regarded as a true abnormality and repaired.

[0011]

1 is a functional block diagram showing an outline of the present invention, FIG. 2 is a flow chart showing a procedure of the present invention, and FIG. 3 is an example of a timing chart.

First, the CPU 11 is provided with a check means 111 made of a program as in the conventional case, and the check means 111 periodically checks the usage rate of the packet buffer 13 with the usage rate detection means 100.

The cycle at this time is managed by the cycle control means 112. That is, as shown in FIG. 2 or 3, the cycle control means 112 selects a standard cycle T1 of a relatively long cycle that does not give a heavy load to the operation of the system in a normal state, and repeatedly operates the check means 111 ( (FIG. 2, F1 → F2 → F3: N) On the other hand, when the usage rate indicated by the usage rate detecting means 100 becomes high and there is a high possibility that an abnormality has occurred, the checking means 111
The short cycle Ts is set in order to confirm whether or not an abnormality has really occurred according to the instruction (FIG. 2, F3: Y →
F4).

In the check of the standard cycle T1, it cannot be determined whether a high usage rate occurs only at the time of checking or whether the usage rate becomes high due to an abnormal condition, but the check in the short cycle Ts is performed as described above. By,
It will be possible to judge whether or not it is a true abnormality.

When it is judged "abnormal" by the check in the short cycle Ts, the cycle control means 112 repeats the setting of the short cycle Ts, and the counter means 113 counts the number of abnormal times (FIG. 2, FIG. 2). F4 → F
5 → F6: Y → F7 → F8). Therefore, when the abnormal state continues, the count value by the counter means 113 is counted up, and the predetermined number n (hereinafter referred to as the limit allowable number) is reached.
When it is determined to be "abnormal", the repairing means 200 is operated to take a repairing action (F8: Y → F9). As a method of updating the count value of the counter means 113, a countdown method can be adopted in addition to the above-described countup method.

For example, if the state where the call setup is not established continues, the packet buffer 13 uses a lot of resources for the call setup processing and the usage rate becomes abnormally high. At this time, however, the input from all the lines is temporarily stopped. Then, the resource is emptied and the line is restored again by so-called automatic closing and automatic opening. If automatic repair cannot be done, you will have to rely on manual repair.

When the abnormal state is recovered within the limit allowable number of times n, it is determined that the abnormality is not a true abnormality, the cycle control means 112 is activated, and the check in the standard cycle T1 is started again. (FIG. 2, F6: N → F1).

Even when the abnormal state is released by the repair work, the cycle control means 112 operates according to the instruction of the repair means 200 to set the standard cycle T1. As shown in FIG. 3, the standard period T1 or the short period Ts has a value of several times the unit time Tb, and the length and number of the unit time Tb and the multiple of the unit time Tb should be changed. It can be adjusted freely.

The standard period T1, the short period Ts, and the limit allowable number of times n may be unified for each check item, but as shown in Table 1, it is preferable to set a value conforming to the check item. Regarding the memory destruction check (Table 1, bottom column), once it is confirmed that the memory has been destroyed, confirmation work is not required at different cycles thereafter, so only the standard cycle T1 is checked. Be seen. When the memory is destroyed, it is repaired by copying the data from the master memory or the hard disk.

[0020]

[Table 1]

In order to execute each means shown in FIG. 1, it is necessary to use a predetermined area of the packet buffer 13 or each resource group shown in Table 1 as a working area. Resources used for this are not subject to usage rate detection. That is, in order to execute the programs for checking these, the usage rate of the packet buffer 13 or each resource group shown in Table 1 becomes high and the abnormality detection does not occur frequently.

Although only the packet switch has been described above, it goes without saying that the present invention can be applied not only to the packet switch but also to various switches.

[0023]

As described above, according to the present invention, the check cycle is switched between the standard cycle and the short cycle shorter than that in the normal time and the abnormal time. Even if it is difficult to determine whether or not the error has occurred, the abnormality can be confirmed by checking in a short cycle. This means that it is possible to prevent the load on the CPU from increasing by checking in a short cycle in normal times.

[Brief description of drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a flowchart of one embodiment of the present invention.

FIG. 3 is a timing diagram of the present invention.

FIG. 4 is a conceptual diagram of a packet switch.

[Explanation of symbols]

 111 check means 112 cycle control means 113 counter means 200 repair means T1 standard cycle Ts short cycle

Claims (5)

[Claims] 1. In various exchange systems equipped with an audit function that finds various accidents that interfere with normal communication by itself and repairs them promptly, check means (T1) at a standard period (T1) that is not enough for a normal exchange function. When an abnormality is detected by activating (111), check means (1) is activated at a short cycle (Ts) shorter than the standard cycle (T1) above.
11) A system audit monitoring method characterized by activating (1) to check for abnormalities. 2. In the check in the short cycle (Ts),
The system audit monitoring method according to claim 1, wherein the abnormal state is repaired when the abnormality is detected a predetermined number of times or more. 3. A check means (111) for detecting by system itself various accidents that prevent normal communication, and a repair means (200) for repairing the abnormality when the check means (111) detects an abnormality. In various exchange systems, the operation cycle of the check means (111) is set to a standard cycle (T1) that is long enough to normally operate the exchange function, and when abnormal, a short cycle (Ts) shorter than the standard cycle (T1). ) And a counter means (113) that counts the number of checks by the short cycle (Ts) and instructs the repairing means (200) to repair when the value exceeds a predetermined value. System audit monitoring equipment. 4. The standard period (T1) for the checking means (111).
When an error is detected during the check with, the cycle control means (11
Instruct 2) to set the short cycle (Ts), and perform the above-mentioned restoration means (200).
4. The system audit monitor according to claim 3, wherein when the repair is completed, the cycle control means (112) is instructed to set the standard cycle. 5. The short cycle (Ts) of the counter means (113)
4. The system audit monitoring device according to claim 3, wherein the number of checks performed by the system audit counter is counted, and when the value is less than or equal to a predetermined value and the abnormal condition is repaired, the cycle control means (112) is instructed to set the standard cycle (T1).