JPH0575458A - A/d converter - Google Patents

Abstract

PURPOSE:To attain high speed conversion with high accuracy independently of the dispersion in components and of their operating environment. CONSTITUTION:The A/D converter is provided with a means generating (2N+1) sets of different reference voltages by using voltage dividers 1-6, a means outputting an analog input signal including a ramp waveform generating circuit 30 connected through a test switch 60, (2N+1) sets of voltage comparators 10-17 each comparing a reference voltage with an analog signal, a code conversion circuit 20 implementing logic arithmetic operation to generate a binary code in response to the outputs from them, a detection circuit 40 detecting an error from an output digital code, and (2N+1) sets of D/A converters 50-55 in several bits operated by signal from the detection circuit 40 and whose outputs connect to each connecting point of the voltage dividers 1-6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog-digital converter (hereinafter referred to as A / D converter), and more particularly to a high resolution A / D converter using a voltage divider.

[0002]

2. Description of the Related Art In recent years, high-speed and high-resolution A / D converters have been required in the fields of video and measuring instruments.

A conventional A / D converter will be described below. FIG. 2 shows the configuration of a conventional A / D converter. In FIG. 2, 1 to 6 are resistors, 10 to 17 are voltage comparators, 20 is an encoding circuit, and 70 is an input terminal.

As the configuration of the A / D converter, a full parallel type, a serial parallel type, a delta-sigma conversion system and the like are generally mentioned, but each system has advantages and disadvantages. In the case of an A / D converter with N = 12 or more, the delta-sigma conversion method is generally used, but high speed operation cannot be expected with this method. High-speed operation is possible in the all-parallel type and the serial-parallel type, but the number of voltage comparators is (2 ^N +1) in the all-parallel type and (2 ^M +1) (M is Upper bit number) Required.

Therefore, a case where an A / D converter is constructed by using the above-mentioned two methods capable of high-speed operation will be described below with reference to FIG. 2 (however, in the serial-parallel type, the upper bits are parallel types). ).

The parallel A / D converter is configured so that voltage dividers 1 to 6 are used to generate (2 ^N +1) reference voltages having different values, and an analog input signal from an input terminal 70 and 2 ^N voltage comparators 10 to 17 for comparing with a reference voltage
And an encoding circuit 20 for generating a binary code by performing a logical operation according to its output, and a logic circuit for converting the binary code as it is or another binary code.

The operation of the A / D converter configured as described above will be described below.

First, the voltage dividers 1 to 6 (2 ^N-
1) The divided voltage (1 / ^2N between the peak voltage and the bottom voltage of the reference voltage) is always applied to one input of each voltage comparator 10-17. Also, the voltage comparator 10
An analog input signal from the input terminal 70 is applied to the other input of the input terminals ˜17.

When an analog input signal is given, each of the voltage comparators 10 to 17 compares the divided voltage with the input signal, outputs a digital signal according to the result, and the encoding circuit 20 outputs 2 signals. It is coded in hex. This binary code is usually a Gray code, and when it is output as a digital output code, it is slightly difficult to use. So to convert from gray code to binary code,
A code conversion logic circuit (not shown) converts the binary code and outputs the binary code.

An important characteristic of the A / D converter is linearity error. This error represents the monotonicity of the A / D converter, and represents the error from the expected value of the digital code for a given analog input voltage. In order to suppress this error, it is general that the input section of the voltage comparators 10 to 17 is composed of bipolar transistors. This is because the variation in the base-emitter voltage (V _BE ) of the bipolar transistor is about one tenth that of the CMOS transistor, and the above error can be reduced.

[0011]

However, in the above-mentioned conventional example, when a bipolar transistor is used for the input portion of the voltage comparators 10 to 17, a base current flows though a little. That is, a current flows from the voltage dividers 1 to 6 to the voltage comparators 10 to 17, and as a result, a voltage difference of (base current × resistance value) is generated between the divided voltages. Linearity error occurs. Therefore, in the past, a countermeasure was taken by adding a correction circuit in order to supplement the base current. In addition to the base current described above, variations in V _BE of the transistors of the voltage comparators 10 to 17,
The generation of the linearity error due to the variation of the reference resistance has not been able to be corrected in the past.

For example, if an A / D converter of 12-bit, analog input 2V full scale is to be constructed, 1L
Since the potential difference of SB (minimum step voltage) is less than about 0.5 mV, it cannot be calibrated sufficiently by the conventional correction circuit, and the linearity error caused by the variation of V _BE and resistance is so large that it cannot be ignored. I had.

The present invention can flexibly and almost completely correct the linearity error in accordance with the in-situ use condition even with respect to the influence of the base current and the variation of the element, which cannot be completely corrected by the above correction circuit alone. An object is to provide an excellent A / D converter that can be used.

[0014]

To achieve this object, the A / D converter of the present invention comprises means for generating (2 ^N +1) reference voltages having different values by using a voltage divider. ,
Means for providing an analog input signal having a ramp waveform generating circuit via a test switch, (2 ^N +1) voltage comparators for comparing the reference voltage with the analog signal, and logical operation according to the output To generate a binary code, a detection circuit for detecting an error from the output digital code, and an output which operates from a signal from the detection circuit connected to each contact of the voltage divider (2 ^N − 1)
It has a configuration provided with a digital-analog converter of several several bits.

[0015]

With this configuration, when the test switch is turned on (self-correction mode), the data converted based on the conventional A / D conversion is not output to the outside of the A / D converter and is detected inside. Sent to the circuit. The analog input at this time is an ideal linear signal from the built-in ramp waveform generating circuit, and a digital code including a linear error due to variations in elements appears in the output. The detection circuit reads the digital code and detects the error of each code.
The output is then applied to a several-bit current-summing digital-to-analog converter (capable of inflowing and outflowing current) connected to each contact of the voltage divider, and the voltage of the corresponding portion is corrected to correct the error. Change each voltage of the pressure device.
This operation is performed in the self-correction mode. In actual use, the input of the digital-analog converter is fixed to the data when the self-correction is completed, and the analog input signal and digital output of the A / D converter are normally input / output. It

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An analog-digital converter according to an embodiment of the present invention will be described below with reference to FIG.

In FIG. 1, 1 to 6 are resistors, and 10 to 17
Is a voltage comparator, 20 is an encoding circuit, 70 is an input terminal, 3
0 is a ramp waveform generation circuit, 40 is an error detection circuit, 50-
55 is a digital-analog converter, and 60 is a self-correction circuit changeover switch.

That is, in this embodiment, means 1 to 6 for generating (2 ^N +1) reference voltages having different values using a voltage divider and a ramp waveform generating circuit connected via a test switch 60. Means for providing an analog input signal including 30, and (2 ^N +1) voltage comparators 10 to 17 for comparing the reference voltage with the analog signal, and a logical operation is performed according to the output thereof to obtain a binary code. An encoding circuit 20 for generation, an error detection circuit 40 for detecting an error from an output digital code, and an output are connected to each contact of the voltage divider, and operate by a signal from the error detection circuit 40 (2 ^N
-1) It has a configuration including digital-analog converters 50 to 55 of several bits.

In this embodiment, the data converted based on the same conventional A / D conversion is not output to the outside of the A / D converter but is sent to the internal error detection circuit 40.
The analog input at this time is the built-in ramp waveform generation circuit 3
It is an ideal linear signal from 0, and a digital code including a linearity error due to variations in elements appears in the output. The error detection circuit 40 reads the digital code and detects the error of each code. Then, the output is applied to several-bit current addition type digital-analog converters (capable of inflowing and outflowing current) 50 to 55 connected to each contact of the voltage divider, and corresponding portions for correcting errors. Change each voltage of the voltage divider of. This operation is repeated until the linearity error reaches a specified value.

In addition, the built-in ramp waveform generation circuit 30
Should be close to the ideal waveform without distortion.

As described above, according to this embodiment, the conventional A
By adding a test switch, an error detection circuit, and a digital / analog converter to the / D converter, a highly accurate analog-digital converter can be realized.

[0022]

As described above, the present invention operates by the conventional A / D converter for detecting an error from the output digital code, and the signal from the error detecting circuit (2 ^N -1). By providing an A / D converter of several bits, it is possible to perform high-accuracy and high-speed conversion that is not affected by variations in elements or operating environment.
The / D converter can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of an analog-digital converter according to an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional analog-digital converter.

[Explanation of symbols]

 1 to 6 resistors constituting a voltage divider 10 to 17 voltage comparator 20 encoding circuit 30 ramp waveform generation circuit 40 error detection circuit 50 to 55 digital-analog converter 60 test switch for self-correction mode

Claims (1)

[Claims] 1. A voltage divider is used to obtain different values (2 ^N +
1) Means for generating a number of reference voltages, means for giving an analog input signal including a ramp waveform generating circuit connected through a test switch, and comparing the reference voltage with the analog signal (2 ^N +1) Number of voltage comparators, an encoding circuit for performing a logical operation according to the output of the voltage comparator to generate a binary code, a detection circuit for detecting an error from an output digital code, and an output of the voltage divider. It is connected to each contact and operates by the signal from the detection circuit (2
^N -1) An analog-to-digital converter comprising a several-bit digital-to-analog converter.