JPH0575261A - Manufacture of multilayer printed wiring board - Google Patents

Manufacture of multilayer printed wiring board

Info

Publication number
JPH0575261A
JPH0575261A JP23583191A JP23583191A JPH0575261A JP H0575261 A JPH0575261 A JP H0575261A JP 23583191 A JP23583191 A JP 23583191A JP 23583191 A JP23583191 A JP 23583191A JP H0575261 A JPH0575261 A JP H0575261A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
multilayer printed
thermoplastic resin
solder resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23583191A
Other languages
Japanese (ja)
Inventor
Kenji Sasaoka
賢司 笹岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP23583191A priority Critical patent/JPH0575261A/en
Publication of JPH0575261A publication Critical patent/JPH0575261A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To apply and form a solder resist layer simultaneously in the manufacturing process of a multilayer printed wiring board body. CONSTITUTION:Circuit blank boards, in which required conductor patterns 3a, 3b, 3c are applied and formed on the main surfaces of thermoplastic resin insulator layers 1a, 1b, 1c, to which through-holes 2a, 2b, 2c for connection among conductor pattern 3a, 3b, 3c layers are bored, are laminated and unified through heating and pressure molding. Accordingly, the circuit blank boards using a thermoplastic resin as the insulating layers are aligned and laminated, and unified through heating and pressure molding while solder resist layers are unified, thus forming the required solder resist layers, then displaying an excellent liquid-tight state, in which mutual adhesive properties or welding properties are also improved and there is no interface.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は多層プリント配線板の製
造方法に係り、特に熱可塑性樹脂フィルムを絶縁体層と
した多層プリント配線板の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board, and more particularly to a method for manufacturing a multilayer printed wiring board having a thermoplastic resin film as an insulating layer.

【0002】[0002]

【従来の技術】近年、配線の高密度化ないし回路部品の
小形化を目的にした多層プリント配線板の一つの形式と
して、たとえばポリカーボネート樹脂やポリスルフォン
樹脂のような熱可塑性樹脂のフィルムを絶縁体層とした
多層プリント配線板が知られている。すなわち、所要の
導体パターン層間の接続用貫通孔を穿設した熱可塑性樹
脂フィルムの少なくとも一主面に、たとえば銅箔を接着
剤層を介して貼り合わせ、フォトエッチング処理を施し
て所要の導体(回路)パターンを形成した後、その回路
素板の複数枚を積層し、加熱・加圧成形により一体化す
ることによって、所要の多層プリント配線板を得る手段
が知られている。
2. Description of the Related Art In recent years, as one type of multilayer printed wiring board for the purpose of increasing the density of wiring or downsizing of circuit components, a film of thermoplastic resin such as polycarbonate resin or polysulfone resin is used as an insulator. Multilayer printed wiring boards with layers are known. That is, for example, a copper foil is attached to at least one main surface of a thermoplastic resin film having through holes for connection between required conductor pattern layers through an adhesive layer, and a desired conductor is formed by photoetching treatment ( There is known a means for obtaining a required multilayer printed wiring board by forming a (circuit) pattern and then laminating a plurality of the circuit base plates and integrating them by heating and pressure molding.

【0003】そして、この種の多層プリント配線板の製
造方法においては、最終的な工程で、露出する両主面
に、導電パターンの接続部を除いていわゆる半田レジス
ト層を被着・形成して絶縁性ないし表面保護性を付与し
ている。たとえば、半田レジストをスクリーン印刷し、
これを熱や紫外線によって硬化処理するか、もしくは全
面に感光性の樹脂層を被着・形成し(フィルムの張り合
わせあるいはインクの塗布など)、これを露光・現像す
ることによって、所要の半田レジスト層を形成・具備さ
せている。
In the method for manufacturing a multilayer printed wiring board of this type, a so-called solder resist layer is deposited and formed on both exposed main surfaces except the conductive pattern connecting portions in the final step. Provides insulation or surface protection. For example, screen print solder resist,
This is cured by heat or ultraviolet rays, or a photosensitive resin layer is applied / formed on the entire surface (such as film sticking or ink application), and this is exposed / developed to obtain the required solder resist layer. Is formed and equipped.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記し
た多層プリント配線板の製造方法、特に半田レジストの
被着・形成において、次のような不都合が認められる。
However, the following inconveniences are recognized in the above-mentioned manufacturing method of the multilayer printed wiring board, particularly in the deposition / formation of the solder resist.

【0005】先ず第1に、プリント配線板本体面と被着
・形成される半田レジスト層との間に界面が、不可避的
に存在する。つまり、プリント配線板本体面に対して、
その面上に被着・形成される半田レジスト層の密着性が
劣るため、たとえば防湿などの表面保護機能を十分に果
たし得ず(界面を介して水分が侵入)、したがってプリ
ント配線板本体面の導電パターンのマイグレーションや
表面抵抗の劣化が招来され、信頼性が低下するという問
題がある。
First of all, an interface unavoidably exists between the main surface of the printed wiring board and the solder resist layer to be deposited / formed. In other words, for the printed wiring board body surface,
Due to the poor adhesion of the solder resist layer deposited / formed on the surface, the surface protection function such as moisture proof cannot be sufficiently fulfilled (water penetrates through the interface). There is a problem that the migration of the conductive pattern and the deterioration of the surface resistance are caused and the reliability is lowered.

【0006】第2に、前記半田レジスト層の被着・形成
する場合において、スクリーン印刷の解像度に限界があ
り、高密度配線のファインパターン化に対応し得ないと
いう問題がある。しかも、前記スクリーン印刷手段を適
用する場合は、多層プリント配線板本体の製造装置と別
にスクリーン印刷機や硬化手段(たとえばオーブン)を
要し、設備的にも大掛かりとなるばかりでなく、使用の
都度スクリーン版を有機溶媒で洗浄するため、作業環境
的にも問題がある。一方、感光性の樹脂層を被着・形成
し(フィルムの張り合わせあるいはインクの塗布な
ど)、これを露光・現像して所要の半田レジスト層を形
成する場合は、前記スクリーン印刷の場合に比べて解像
度の問題は解消されるが、露光・現像の設備を要するこ
とになり、特に露光設備においては作業環境の特定波長
光をカットしておく必要があるなど、設備投資が大掛か
りになるという問題がある。また、露光後の現像処理に
おいては、現像液として有機溶媒、もしくは酸やアルカ
リの水溶液などのいずれを用いた場合も、廃液の処理問
題に対応した専用の設備を要するという問題がある。
Secondly, in the case of depositing / forming the solder resist layer, there is a problem in that the resolution of screen printing is limited and it cannot be applied to fine patterning of high density wiring. Moreover, when the screen printing means is applied, a screen printing machine and a curing means (for example, an oven) are required in addition to the manufacturing apparatus for the main body of the multilayer printed wiring board, which is not only a large scale in terms of equipment, but also in each use. Since the screen plate is washed with an organic solvent, there is also a problem in the working environment. On the other hand, when a photosensitive resin layer is deposited / formed (film sticking or ink application) and exposed / developed to form a required solder resist layer, compared to the case of the screen printing described above. Although the problem of resolution is solved, it requires equipment for exposure and development, and especially in exposure equipment, there is a problem that equipment investment will be large, such as cutting off light of a specific wavelength in the work environment. is there. Further, in the development process after exposure, there is a problem that a dedicated facility corresponding to the problem of treating the waste liquid is required regardless of whether an organic solvent or an aqueous solution of acid or alkali is used as the developer.

【0007】本発明は上記問題にに対処してなされたも
ので、いわゆる半田レジスト層の被着・形成を多層プリ
ント配線板本体の製造工程、つまり積層一体化の工程で
同時になすことによって、大掛かりな設備など不要化す
るとともに簡易な工程で多層プリント配線板を製造する
方法の提供を目的とする。
The present invention has been made to solve the above-mentioned problems, and a large scale is achieved by simultaneously applying and forming a so-called solder resist layer in the manufacturing process of the multilayer printed wiring board body, that is, in the process of stacking and integrating. It is an object of the present invention to provide a method for manufacturing a multilayer printed wiring board by a simple process while eliminating the need for special equipment.

【0008】[0008]

【課題を解決するための手段】本発明の多層プリント配
線板の製造方法は、導体パターン層間の接続用貫通孔が
穿設された熱可塑性樹脂系絶縁体層の主面に所要の導体
パターンを被着形成された回路素板を積層して加熱・加
圧成形により一体化する多層プリント配線板の製造方法
において、前記積層された回路素板の露出する導体パタ
ーン面側上に、接続部を成す導体パターン領域に対応し
た部分が選択的に切除された前記絶縁体層と同種の熱可
塑性樹脂層をさらに積層し加熱・加圧成形により一体化
することを特徴とする。
A method of manufacturing a multilayer printed wiring board according to the present invention provides a required conductor pattern on a main surface of a thermoplastic resin-based insulator layer having through holes for connection between conductor pattern layers. In a method for manufacturing a multilayer printed wiring board, in which circuit substrate plates formed by deposition are laminated and integrated by heating and pressure molding, a connecting portion is provided on the exposed conductor pattern surface side of the laminated circuit substrate. It is characterized in that a thermoplastic resin layer of the same kind as the above-mentioned insulating layer, in which a portion corresponding to the formed conductor pattern area is selectively cut off, is further laminated and integrated by heating and pressure molding.

【0009】[0009]

【作用】上記本発明に係る多層プリント配線板の製造方
法においては、加熱加圧成形工程で、実質的に半田レジ
スト層を成す熱可塑性樹脂フィルムが露出する主面に融
着一体化される。つまり、熱可塑性樹脂を絶縁層とする
回路素板を位置合わせ・積層して加熱・加圧成形により
一体化すると同時に、半田レジスト層を一体化すること
によって、所要の半田レジスト層を具備した多層プリン
ト配線板が得られる。しかも、前記半田レジスト層を成
す熱可塑性樹脂層は、回路素板の絶縁体層を成す熱可塑
性樹脂と同種のものであるため、相互の密着性ないし溶
着性も良好で界面の存在しないすぐれた液密性状態を呈
する。
In the method for manufacturing a multilayer printed wiring board according to the present invention, the thermoplastic resin film substantially forming the solder resist layer is fused and integrated with the exposed main surface in the heat and pressure molding step. That is, a circuit board having a thermoplastic resin as an insulating layer is aligned / laminated and integrated by heating / pressure molding, and at the same time, a solder resist layer is integrated to provide a multi-layer having a required solder resist layer. A printed wiring board is obtained. Moreover, since the thermoplastic resin layer forming the solder resist layer is of the same kind as the thermoplastic resin forming the insulating layer of the circuit board, mutual adhesion or welding is good and there is no interface. A liquid-tight state is exhibited.

【0010】[0010]

【実施例】以下、図1および図2を参照して本発明の実
施例を説明する。
Embodiments of the present invention will be described below with reference to FIGS.

【0011】先ず、熱可塑性樹脂フィルムとして、所要
の寸法にカットした3枚の厚さ100μm のポリサルフォ
ン樹脂フィルム1a、1b、1cを用意し、これらのポリサル
フォン樹脂フィルム1a、1b、1cについて、所要の位置に
厚さ方向に貫通する孔2a、2b、2cをそれぞれドリル加工
によって穿設した。次いで、前記ポリサルフォン樹脂フ
ィルム1a、1b、1cの片面もしくは両面に、導電性ペース
トたとえばAgペーストをスクリーン印刷して、厚さ10μ
m 程度の所要の導電パターン(回路パターン)3a、3b、
3cをそれぞれ被着・形成して加熱・乾燥させた。
First, as the thermoplastic resin film, three polysulfone resin films 1a, 1b and 1c having a thickness of 100 μm and cut to the required dimensions are prepared, and the required polysulfone resin films 1a, 1b and 1c are prepared. Holes 2a, 2b, and 2c penetrating in the thickness direction were drilled at the positions. Then, on one or both sides of the polysulfone resin film 1a, 1b, 1c, a conductive paste such as Ag paste is screen-printed to a thickness of 10 μm.
Required conductive pattern (circuit pattern) 3a, 3b of about m
Each of 3c was deposited / formed and heated / dried.

【0012】一方、前記と同様の寸法にカットした2枚
の厚さ10μm ポリサルフォン樹脂フィルム4a、4bを用意
し、これらのポリサルフォン樹脂フィルム4a、4bの所定
位置、換言すると最終的に形成されるプリント配線板面
に露出する導電パターン3a、3bの接続部3a′、3b′たと
えば搭載・実装する電子部品の接続部に対応する領域
に、厚さ方向に貫通する孔5a、5bをそれぞれプレス加工
によって穿設した。
On the other hand, two sheets of 10 μm thick polysulfone resin films 4a and 4b cut into the same size as described above are prepared, and predetermined positions of these polysulfone resin films 4a and 4b, in other words, a print finally formed. Holes 5a and 5b penetrating in the thickness direction are formed by pressing in regions corresponding to the connecting portions 3a 'and 3b' of the conductive patterns 3a and 3b exposed on the wiring board surface, for example, the connecting portions of the electronic components to be mounted and mounted. Drilled.

【0013】しかる後、前記ポリサルフォン樹脂フィル
ム1a、1b、1cを絶縁体層として成る回路素板および所定
位置に貫通孔5a、5bを設けたポリサルフォン樹脂フィル
ム4a、4bを、図1に要部を断面的に示すように、位置決
めして積層する。上記積層した積層体を所定のプレス機
にセットし、たとえば温度 140〜160 ℃、圧力 2kg/cm
2 〜10kg/cm2 で加熱・加圧成形して一体化する。この
加熱・加圧成形による一体化段階で、回路素板を成すポ
リサルフォン樹脂フィルム1a、1b、1cの貫通孔2a、2b、
2cの部分において、導電パターン(回路パターン)3a、
3b、3c間の所要の電気的な接続が達成されるとともに、
ポリサルフォン樹脂フィルム1a、1b、1c、4a、4bの対接
する面同士も融着して容易に一体化する。つまり、図2
に要部を断面的に示すような構成の両主面に半田レジス
ト層が一体的に被着形成された多層プリント配線板が製
造される。
Thereafter, a circuit base plate having the polysulfone resin films 1a, 1b and 1c as an insulating layer and polysulfone resin films 4a and 4b having through holes 5a and 5b at predetermined positions are shown in FIG. Position and stack as shown in cross section. Set the above-mentioned laminated laminate on a predetermined press machine, for example, temperature 140-160 ℃, pressure 2kg / cm
Integrate by heating and pressure molding at 2 to 10 kg / cm 2 . In the integration stage by this heat / pressure molding, the through holes 2a, 2b of the polysulfone resin films 1a, 1b, 1c forming the circuit board are formed.
In the portion 2c, the conductive pattern (circuit pattern) 3a,
While the required electrical connection between 3b and 3c is achieved,
The facing surfaces of the polysulfone resin films 1a, 1b, 1c, 4a, 4b are also fused and easily integrated. That is, FIG.
Thus, a multilayer printed wiring board is manufactured in which solder resist layers are integrally adhered and formed on both main surfaces of which the principal part is shown in cross section.

【0014】なお、上記において、熱可塑性樹脂をバイ
ンダとした導電性ペーストで導電パターン3a、3b、3cを
形成しておいた場合は、前記加熱・加圧成型過程におい
て熱可塑性樹脂層ともども熱可塑性が有効に働き、前記
導電パターン3a、3b、3c間の接続がより容易になされ
る。また、前記のように実質的に半田レジスト層として
機能する外側のポリサルフォン樹脂フィルム4a、4bの厚
さを比較的薄く設定しておくことにより、外側の導電パ
ターン3a、3bなどの破断・損傷も容易に解消ないし回避
される。
In the above, when the conductive patterns 3a, 3b, 3c are formed of a conductive paste using a thermoplastic resin as a binder, both the thermoplastic resin layer and the thermoplastic resin layer are thermoplastic in the heating and pressure molding process. Effectively works, and the connection between the conductive patterns 3a, 3b, 3c is made easier. Further, as described above, by setting the thickness of the outer polysulfone resin film 4a, 4b that substantially functions as a solder resist layer to be relatively thin, the outer conductive patterns 3a, 3b, etc. may be broken or damaged. Easily resolved or avoided.

【0015】なお上記では、主たる絶縁体層(絶縁基
材)および半田レジスト層をなす熱可塑性樹脂フィルム
として、ポリサルフォン樹脂フィルムを用いた例を示し
たが、熱可塑性樹脂フィルムとしてはこれに限らず、た
とえばポリスルフォン樹脂、ポリカーボネート樹脂、ポ
リスチレン樹脂、ポリエーテルスルホン樹脂、ポリアセ
タール樹脂、ポリエーテルケトン樹脂、ポリエーテルイ
ミド樹脂、ポリフェニレンサルファイド樹脂、ポリフェ
ニレンオキサイド樹脂、アクリル樹脂、ポリエチレン樹
脂、ABS樹脂、ポリアミド樹脂、ポリ塩化ビニル樹
脂、フッ素樹脂、ポリエーテルエーテルケトン樹脂など
のフィルムを使用することができる。また、その厚さや
多層化する層数なども、製造する多層回路基板の用途な
どに応じて適宜選択設定することができる。
In the above description, a polysulfone resin film is used as the thermoplastic resin film forming the main insulating layer (insulating base material) and the solder resist layer, but the thermoplastic resin film is not limited to this. , For example, polysulfone resin, polycarbonate resin, polystyrene resin, polyethersulfone resin, polyacetal resin, polyetherketone resin, polyetherimide resin, polyphenylene sulfide resin, polyphenylene oxide resin, acrylic resin, polyethylene resin, ABS resin, polyamide resin, Films of polyvinyl chloride resin, fluororesin, polyetheretherketone resin and the like can be used. Also, the thickness and the number of layers to be multilayered can be appropriately selected and set according to the application of the multilayer circuit board to be manufactured.

【0016】一方、導電性ペーストも上記例示した銀ペ
ーストに限定されず、前記した熱可塑性樹脂をバインダ
として、たとえば金、銅、ニッケル、タングステン、
錫、モリブデン、アルミニウム、白金などの金属粉や、
カーボン粉、炭化ケイ素粉、五酸化バナジウム粉などの
半導電性粉末を含有分散させたものを用いてもよく、さ
らに、導電性ペーストの被着・塗布(導電パターンの形
成)は、スクリーン印刷の他に、オフセット印刷などの
方法を採ることができる。また、この導電パターンの形
成は、前記導電性ペーストによらずたとえば張り合わせ
た銅箔などのエッチングによって形成してもよい。
On the other hand, the conductive paste is not limited to the above-exemplified silver paste. For example, gold, copper, nickel, tungsten, or the like may be used with the above-mentioned thermoplastic resin as a binder.
Metal powder such as tin, molybdenum, aluminum and platinum,
It is also possible to use one in which a semiconductive powder such as carbon powder, silicon carbide powder, vanadium pentoxide powder, etc. is contained and dispersed. Furthermore, the deposition / application of the conductive paste (formation of the conductive pattern) is performed by screen printing. Alternatively, a method such as offset printing can be adopted. Further, the conductive pattern may be formed not by the conductive paste but by etching, for example, a laminated copper foil.

【0017】[0017]

【発明の効果】以上説明したように本発明によれば、多
層プリント配線板本体面に、半田レジスト層が密に一体
化された多層プリント配線板を同時成型によって容易に
製造し得る。すなわち、多層プリント配線板本体の絶縁
層を構成する熱可塑性樹脂と同種の熱可塑性樹脂層が積
層され、かつ熱融着して密に一体化されるため、界面が
形成される余地もなくなり、水分などの侵入のおそれが
全面的に解消される。したがって、多層プリント配線板
においては、導電パターンのマイグレーションや電気抵
抗の劣化などの問題も回避され、信頼性の高い機能を常
に呈することになる。一方、製造工程における繁雑な操
作も大幅に解消されるとともに、製造設備の簡略化も図
られるたため、コストの低減などに大きく寄与するとい
える。
As described above, according to the present invention, a multilayer printed wiring board in which a solder resist layer is densely integrated with a main surface of the multilayer printed wiring board can be easily manufactured by simultaneous molding. That is, since a thermoplastic resin layer of the same type as the thermoplastic resin that constitutes the insulating layer of the multilayer printed wiring board body is laminated, and because they are heat-sealed and densely integrated, there is no room for forming an interface, Completely eliminates the risk of water intrusion. Therefore, in the multilayer printed wiring board, problems such as migration of conductive patterns and deterioration of electric resistance are avoided, and a highly reliable function is always exhibited. On the other hand, complicated operations in the manufacturing process have been largely eliminated, and the manufacturing equipment has been simplified, which can be said to greatly contribute to cost reduction.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る多層プリント配線板の製造方法の
実施態様例を模式的に示す断面図。
FIG. 1 is a sectional view schematically showing an embodiment example of a method for manufacturing a multilayer printed wiring board according to the present invention.

【図2】本発明に係る製造方法によって得られた多層プ
リント配線板の要部構造例を示す断面図。
FIG. 2 is a sectional view showing a structural example of a main part of a multilayer printed wiring board obtained by a manufacturing method according to the present invention.

【符号の説明】[Explanation of symbols]

1a、1b、1c、4a、4b…熱可塑性樹脂絶縁体層(ポリサル
フォン樹脂フィルム)2a、2b、2c、5a、5b…貫通孔
3a、3b、3c…導電パターン 3a′、3b′…表面接続部
1a, 1b, 1c, 4a, 4b ... Thermoplastic resin insulator layer (polysulfone resin film) 2a, 2b, 2c, 5a, 5b ... Through hole
3a, 3b, 3c ... Conductive pattern 3a ', 3b' ... Surface connection part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 導体パターン層間の接続用貫通孔が穿設
された熱可塑性樹脂を絶縁体層の主面に所要の導体パタ
ーンを被着形成された回路素板を積層して加熱・加圧成
形により一体化する多層プリント配線板の製造方法にお
いて、 前記積層された回路素板の露出する導体パターン面側上
に、接続部を成す導体パターン領域に対応した部分が選
択的に切除された前記絶縁体層と同種の熱可塑性樹脂層
をさらに積層し加熱・加圧成形により一体化することを
特徴とする多層プリント配線板の製造方法。
1. A thermoplastic resin in which through holes for connection between conductor pattern layers are formed is laminated on a circuit board having a required conductor pattern formed on a main surface of an insulating layer, and heating and pressing are performed. In a method for manufacturing a multilayer printed wiring board integrated by molding, on the exposed conductor pattern surface side of the laminated circuit element boards, a portion corresponding to a conductor pattern region forming a connection portion is selectively cut off. A method for manufacturing a multilayer printed wiring board, which comprises further laminating a thermoplastic resin layer of the same kind as the insulating layer and integrating them by heat / pressure molding.
JP23583191A 1991-09-17 1991-09-17 Manufacture of multilayer printed wiring board Pending JPH0575261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23583191A JPH0575261A (en) 1991-09-17 1991-09-17 Manufacture of multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23583191A JPH0575261A (en) 1991-09-17 1991-09-17 Manufacture of multilayer printed wiring board

Publications (1)

Publication Number Publication Date
JPH0575261A true JPH0575261A (en) 1993-03-26

Family

ID=16991910

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23583191A Pending JPH0575261A (en) 1991-09-17 1991-09-17 Manufacture of multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPH0575261A (en)

Similar Documents

Publication Publication Date Title
EP0028657B1 (en) Hollow multilayer printed wiring board, and method of fabricating same
US4642160A (en) Multilayer circuit board manufacturing
JP4538486B2 (en) Multilayer substrate and manufacturing method thereof
JP3670487B2 (en) Wiring board manufacturing method
JP3705370B2 (en) Manufacturing method of multilayer printed wiring board
JPH0575261A (en) Manufacture of multilayer printed wiring board
JPH11251703A (en) Circuit board, both-sided circuit board, multilayered circuit board, and manufacture of circuit board
JPS63241995A (en) Multilayer printed circuit board and manufacture of the same
JP3414653B2 (en) Method of manufacturing multilayer substrate and multilayer substrate
JP2000071387A (en) Film fitted with metal foil and production of wiring board using the same
JPH06232558A (en) Manufacture of multilayer printed wiring board
JP4541187B2 (en) Manufacturing method of printed wiring board with built-in membrane element, printed wiring board with built-in film element
JP3549063B2 (en) Manufacturing method of printed wiring board
JP2004134467A (en) Multilayered wiring board, material for it, and method of manufacturing it
JP2547650B2 (en) Multilayer substrate with resistor inside
JPH07221460A (en) Manufacture of multilater printed wiring board
JPH0265194A (en) Manufacture of printed wiring board with thick film element
JP2005109299A (en) Multilayer wiring board and its manufacturing method
JP2003338668A (en) Circuit board, multilayer circuit board and manufacturing method therefor
JP4802575B2 (en) Electric circuit board
KR830001428B1 (en) Manufacturing method of hollow laminated printed wiring board
JPH0677656A (en) Production of multilayer printed wiring board
JPH06252551A (en) Manufacture of multilayered printed wiring board
JPH05136573A (en) Manufacture of multilayer printed wiring board
JPS6347158B2 (en)

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20000208