JP4541187B2 - Manufacturing method of printed wiring board with built-in membrane element, printed wiring board with built-in film element - Google Patents

Description

  The present invention relates to a method of manufacturing a printed wiring board with a built-in film element in which film elements such as resistors and capacitors are built in the printed wiring board.

  As portable electronic devices become smaller, lighter, and thinner, passive components such as C (capacitor, capacitor) and R (resistor) have been reduced. In addition, techniques for embedding passive components such as C and R in one wiring board to form composite components have been developed.

  As a method of manufacturing a circuit block body having film forming elements such as a thin film capacitor and a thin film resistor, a resistor element and a dielectric element are formed on a second wiring layer, and these film forming elements are stacked thereon. There has been proposed a method of forming terminals for connecting different layers (third wiring layers) in separate steps (Patent Document 1). In this manufacturing method, a separate process is required to form a terminal for connecting a resistor and a terminal for connecting a dielectric, so that there is a problem that the process becomes complicated.

As a method of manufacturing a printed wiring board equipped with passive elements, a resistive paste and / or a dielectric paste is applied on a metal foil, and an insulating plate and another metal foil are laminated and integrated, and wiring on both sides of the metal foil is performed. A patterning method has also been proposed (Patent Document 2). In the printed wiring board provided with the passive element by this manufacturing method, since the wiring layer provided in contact with the resistor serves as the electrode of the resistor, the connection layer (between the resistor and the wiring layer ( Resistive electrode) is not provided. Therefore, the process of applying and forming the resistance electrode is not necessary, but there is a problem that the resistance is not stable and the connection reliability is insufficient.
JP 2002-164467 A JP 2003-92460 A

  As described above, the conventional manufacturing method has a problem in that the manufacturing process is complicated because a separate process is required to form the capacitance electrode for dielectric connection and the resistance electrode for resistor connection. It was. Further, there is a problem that connection reliability is insufficient when a wiring layer in contact with a resistor serves as an electrode without providing a connection layer serving as a resistance electrode.

  The present invention has been made in view of the above situation, and an object of the present invention is to provide a method for manufacturing a printed wiring board with a built-in film element that can improve the connection reliability and simplify the manufacturing process.

  According to one aspect of the present invention, a manufacturing method of a printed wiring board with a built-in film element includes a dielectric that forms a dielectric region by applying a dielectric paste to a part of one main surface of a first conductive metal layer. A region forming step and selective application of a conductive paste on one main surface of the first conductive metal layer, the first capacitance electrode extending from the dielectric region to the first conductive metal layer; An electrode forming step of forming a pair of resistance electrodes spaced apart from the dielectric region, and selective application of a resistance paste to one main surface of the first conductive metal layer; A resistor forming step of forming a resistor straddling between the resistance electrodes arranged in a manner, and at least the first capacitance electrode, the resistance electrode, the one of the first conductive metal layer to one main surface of the first conductive metal layer, An insulating layer covering the dielectric region and the resistor; Laminating and laminating a second conductive metal layer on the insulating layer and integrating them by heating and pressing; patterning the first conductive metal layer and the second conductive metal layer; The first conductive metal layer has an insulating gap for forming a second capacitance electrode corresponding to the first capacitance electrode and an insulating gap for electrically separating the paired resistance electrodes. A wiring pattern forming step of forming a wiring pattern.

  According to another aspect of the present invention, a method of manufacturing a printed wiring board with a built-in film element forms a dielectric region by applying a dielectric paste to a part of one main surface of a first conductive metal layer. A first capacitance electrode extending from the dielectric region to the first conductive metal layer by a dielectric region forming step and selectively applying a conductive paste to one main surface of the first conductive metal layer. Forming a resistance electrode disposed in a pair apart from the dielectric region, and selectively applying a resistance paste to one main surface of the first conductive metal layer, A resistor forming step for forming a resistor straddling between the pair of resistor electrodes, and a conductive material in proximity to each of the resistor electrodes on one main surface of the first conductive metal layer. From the first capacitance electrode and the resistor by paste A conductive bump forming step of forming a high-conductivity bump, and at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistance on one main surface of the first conductive metal layer An insulating layer is formed so as to cover the body, and a tip of the conductive bump penetrates the insulating layer, and a second conductive metal layer is laminated in contact with the penetrated conductive bump. A step of applying heat and pressure to plastically deform the conductive bump and electrically and mechanically connect to and integrate the second conductive metal layer; and the first conductive metal layer and the second conductive layer. The conductive metal layer is patterned to electrically connect the resistance electrode paired with the insulating gap for forming the second capacitance electrode corresponding to the first capacitance electrode on the first conductive metal layer. Isolation And forming a wiring pattern having a gap, comprising a wiring pattern forming step of forming a wiring pattern electrically connected to the bumps on the second conductive metal layer.

  According to another aspect of the present invention, a method of manufacturing a printed wiring board with a built-in film element forms a dielectric region by applying a dielectric paste to a part of one main surface of a first conductive metal layer. A first capacitance electrode extending from the dielectric region to the first conductive metal layer by a dielectric region forming step and selectively applying a conductive paste to one main surface of the first conductive metal layer. Forming a resistance electrode disposed in a pair apart from the dielectric region, and selectively applying a resistance paste to one main surface of the first conductive metal layer, A resistor forming step of forming a resistor straddling between the pair of resistance electrodes, and a second conductive metal layer laminated on the first conductive metal layer via an insulating layer Corresponding to each of the resistance electrodes on one main surface of the second conductive metal layer. Forming a pair of conductive bumps close to a position and higher than the first capacitance electrode and the resistor, and on the second conductive metal layer on which the conductive bumps are formed. Laminating an insulating layer, passing the tip of the conductive bump through the insulating layer, forming a conductive metal layer with a conductive bump / insulating layer, and one main surface of the first conductive metal layer The conductive bump / insulating layer with the conductive metal layer is formed so as to cover at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistor. Laminating by contact, heating and pressurizing and integrating, patterning the first conductive metal layer and the second conductive metal layer, the first conductive metal layer, On the first capacitance electrode Forming a wiring pattern having an insulating gap for forming a corresponding second capacitance electrode and an insulating gap for electrically separating the paired resistance electrodes; and forming the bump on the second conductive metal layer. A wiring pattern forming step for forming a wiring pattern electrically connected to the wiring pattern.

  According to another aspect of the present invention, a method of manufacturing a printed wiring board with a built-in film element forms a dielectric region by applying a dielectric paste to a part of one main surface of a first conductive metal layer. A first capacitance electrode extending from the dielectric region to the first conductive metal layer by a dielectric region forming step and selectively applying a conductive paste to one main surface of the first conductive metal layer. Forming a resistance electrode disposed in a pair apart from the dielectric region, and selectively applying a resistance paste to one main surface of the first conductive metal layer, A resistor forming step for forming a resistor straddling between the pair of resistance electrodes, and a semi-cured synthetic resin sheet provided with a through hole in the vicinity of a position corresponding to each of the resistance electrodes Is prepared as an insulating layer, and the insulating layer is used as the first conductive gold. The first and second electrodes, the dielectric, and the resistor so as to cover at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistor on one main surface of the layer And a step of filling the through hole with a conductor, further laminating a second conductive metal layer, and heating and pressing to integrate, and the first conductive metal layer and the A resistance paired with the insulating gap for patterning the second conductive metal layer to form a second capacitance electrode corresponding to the first capacitance electrode in the first conductive metal layer A wiring for forming a wiring pattern having an insulating gap for electrically separating electrodes and forming a wiring pattern for electrically connecting to the conductor filled in the through hole in the second conductive metal layer Patter ; And a down forming process.

  The filling of the through hole provided in the insulating layer may be performed after the insulating layer is stacked, but may be performed before the insulating layer is stacked.

  According to another aspect of the present invention, a method of manufacturing a printed wiring board with a built-in film element forms a dielectric region by applying a dielectric paste to a part of one main surface of a first conductive metal layer. A first capacitance electrode extending from the dielectric region to the first conductive metal layer by a dielectric region forming step and selectively applying a conductive paste to one main surface of the first conductive metal layer. Forming a resistance electrode disposed in a pair apart from the dielectric region, and selectively applying a resistance paste to one main surface of the first conductive metal layer, A resistor forming step of forming a resistor straddling between the pair of resistance electrodes, and at least the first capacitance electrode and the resistance electrode on one main surface of the first conductive metal layer So as to cover the dielectric region and the resistor. Laminating a layer and laminating a second conductive metal layer on the insulating layer and integrating them by heating and pressing; and bringing the first or second conductive into proximity to a position corresponding to each of the resistance electrodes The first and second conductive metal layers are formed by providing an interlayer connection hole that exposes the main surface of the opposing metal layer that penetrates the insulating layer from the outside of the conductive metal layer and plating the inner wall surface of the hole. And electrically patterning the first conductive metal layer and the second conductive metal layer to form a first capacitance on the first conductive metal layer. Forming a wiring pattern having an insulating gap for forming a second capacitance electrode corresponding to the electrode and an insulating gap for electrically separating the pair of resistance electrodes; and forming a wiring pattern on the second conductive metal layer. Form a predetermined wiring pattern Comprising a line pattern forming step.

  According to one aspect of the present invention, the first wiring pattern group composed of a plurality of electrically independent wiring patterns formed on one surface of the insulating layer and the other surface of the insulating layer are formed. A second wiring pattern group composed of a plurality of wiring patterns electrically independent from each other, and the first wiring pattern group adjacent to each other and electrically connected to the inner surfaces of the plurality of wiring patterns electrically independent from each other. A plurality of resistor electrodes formed of a conductive paste, a resistor formed of a resistor paste across the resistor electrodes, and one end edge on the inner surface of the wiring pattern of the first wiring pattern group A dielectric layer formed to face an insulating gap between the pattern and another wiring pattern, and the same conductive paste as the resistor electrode from the other wiring pattern to the dielectric layer. Film element embedded printed circuit board and having a made a capacitance electrode.

  According to the present invention, since the dielectric, the electrode (connection layer), and the resistor can be formed in three steps, the manufacturing process of the film element built-in printed wiring board can be simplified. That is, the capacitance electrode that connects the dielectric and the first conductive metal layer and the resistance electrode that connects the resistor and the first conductive metal layer do not require separate processes, and are the same process. Therefore, the manufacturing process of the membrane element built-in printed wiring board can be simplified.

  Moreover, since an electrical connection layer is provided between the resistor and the conductive metal layer, the connection reliability of the printed wiring board with a built-in film element can be improved.

  Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. In the following, embodiments of the present invention will be described with reference to the drawings. However, the drawings are provided for the purpose of illustration only, and the present invention is not limited to the drawings.

  In the following embodiment, the shape and area of the dielectric region 2 are appropriately determined depending on the capacitance necessary for the capacitor and the capacitor. The shape of the resistor 5 is substantially rectangular, but the area is appropriately determined depending on the resistance value necessary for the resistor.

[First Embodiment]
A first embodiment of the present invention will be described. The first embodiment includes a dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer, and the first conductive metal layer. The conductive layer is selectively applied to one main surface of the first conductive electrode, and the first capacitance electrode extending from the dielectric region to the first conductive metal layer is spaced apart from the dielectric region. A resistance straddling between the pair of resistance electrodes formed by an electrode forming step of forming a resistance electrode and selective application of a resistance paste to one main surface of the first conductive metal layer A resistor forming step for forming a body, and so as to cover at least the first capacitance electrode, the resistor electrode, the dielectric region, and the resistor on one main surface of the first conductive metal layer, An insulating layer is stacked and a second conductivity is formed on the insulating layer. A step of laminating and integrating a metal layer by heating and pressing; and patterning the first conductive metal layer and the second conductive metal layer to form the first conductive metal layer on the first conductive metal layer. A wiring pattern forming step of forming a wiring pattern having an insulating gap for forming a second capacitance electrode corresponding to one capacitance electrode and an insulating gap for electrically separating the paired resistance electrodes. Is.

  1A to 1E are cross-sectional views schematically showing a process for manufacturing a two-layer printed wiring board with a built-in film element by the manufacturing method according to the first embodiment of the present invention.

  First, for example, an electrolytic copper foil having a thickness of 18 μm is prepared as the first conductive metal layer 1. Then, a dielectric paste is selectively applied to one surface of the first conductive metal layer 1 so as to be a dielectric region 2 of a film element necessary as a wiring board (FIG. 1A). The method of applying the dielectric paste is not particularly limited. For example, when screen printing is used, the required number of the entire surface can be increased with high productivity and considerably high accuracy.

  As the dielectric paste, a composition in which a powder of barium titanate, which is a high dielectric material, is dispersed in a resin binder can be used. Specifically, for example, a high frequency dielectric paste CX-16 (trade name) manufactured by Asahi Chemical Research Laboratory can be used. The applied dielectric paste is dried and cured to form a dielectric region 2 having a thickness of about 10 to 20 μm.

  Subsequently, as shown in FIG. 1B, a conductive paste (for example, a silver paste) is selectively applied to one main surface of the first conductive metal layer 1 by screen printing using the same plate. Then, the first capacitance electrode 3 extending from the top of the dielectric region 2 to the first conductive metal layer 1 and the resistance electrode 4 disposed in a pair apart from the dielectric region 2 are formed. The capacitance electrode 3 is a connection layer for electrically connecting the first conductive metal layer 1 and the dielectric 2. The pair of resistance electrodes 4 is a connection layer for electrically connecting the resistor 5 to be applied and formed in the next step and the first conductive metal layer 1. The resistance electrode 4 is spaced apart from the dielectric region 2 and arranged in pairs in the longitudinal direction of the resistor 5 and is applied and formed so as to fit inside the resistor 5 (not shown). )

  Since the first capacitance electrode 3 and the pair of resistance electrodes 4 are simultaneously applied and formed to simplify the process, the capacitance electrode 3 and the resistance electrode 4 are made of the same material. A conductive paste can be used as the material, but a silver (Ag) paste is preferable from the viewpoint of stabilizing the resistance value.

  Thus, since the capacitance electrode 3 and the resistance electrode 4 are simultaneously applied and formed with the same plate, the process can be simplified. Further, since the connection layer is provided as the capacitance electrode 3 and the resistance electrode 4, the resistance value can be stabilized as compared with the case where the connection layer is not provided. When silver paste is used as the conductive paste for forming the capacitance electrode 3 and the resistance electrode 4, the resistance value can be further stabilized.

  Next, a resistor paste is applied on the first conductive metal layer 1 so as to straddle the resistor electrodes 4 arranged in pairs by screen printing to form the resistor 5 (FIG. 1C). ). As the resistance paste, for example, a composition in which a powder of a resistance material such as carbon is dispersed in an organic resin binder, or an organic paste containing carbon can be used. For example, resistance paste TU-15-8, TU-50-8, or TU-100-8 (all trade names) manufactured by Asahi Chemical Research Laboratories can be used. The applied resistance paste is dried and cured to form a resistor 5 having a thickness of 10 to 20 μm.

  As described above, the coated / formed metal foil 10 in which the dielectric region 2, the capacitance electrode 3, the resistance electrode 4, and the resistor 5 are coated and formed on the surface can be formed. Since it is formed in this way, the capacitance electrode 3 and the resistance electrode 4 are connected on the same plane as the first conductive metal layer 1.

  Next, as shown in FIG. 1 (d), the insulating layer 6 and the second conductive metal layer 7 are laminated on the coated / formed metal foil 10 and integrated by heating and pressing. A metal layer plate 11 is obtained. That is, an insulating layer 6 is laminated on one main surface of the first conductive metal layer 1 so as to cover at least the capacitance electrode 3, the resistance electrode 4, the dielectric region 2, and the resistor 5. A second conductive metal layer 7 is laminated on the substrate, and these are integrated by applying pressure while heating. The insulating layer 6 can be composed of, for example, an epoxy resin, a polyimide resin, a bismaleimide triazine resin, or the like. Here, an uncured glass epoxy prepreg (manufactured by Matsushita Electric Works Co., Ltd.) having a thickness of about 60 μm is used to form the insulating layer 6. As the second conductive metal layer 7, for example, an electrolytic copper foil having a thickness of 18 μm is used.

  Next, as shown in FIG. 1E, by patterning the first conductive metal layer 1 and the second conductive metal layer 7 of the double-sided metal layer plate 11 by etching or the like, a predetermined wiring is obtained. Patterns 8 and 9 are formed to obtain a film element built-in two-layer printed wiring board 12. The predetermined wiring pattern includes a wiring pattern necessary as a printed wiring board. At least the second capacitance electrode 32 corresponding to the first capacitance electrode 3 is provided on the first conductive metal layer 1 side. It is necessary to include a wiring pattern having an insulating gap 31 for forming and an insulating gap 41 for electrically separating the paired resistance electrodes 4.

  By providing the insulating gap 31 in the first conductive metal layer 1, a part of the first conductive metal layer 1 functions as a second capacitance electrode 32 corresponding to the first capacitance electrode 3. Then, a capacitor element (capacitor element) is completed across the dielectric region 2. By providing an insulating gap 32 for electrically separating the resistance electrode 4 in the first conductive metal layer 1, a pair of resistance electrode 4 and a resistor 5 formed across the resistance electrode 4 are provided as a resistor. To be completed.

In this manner, the membrane element built-in two-layer printed wiring board 12 can be manufactured. Thereafter, for example, by providing an interlayer connection such as a through hole by a known method, the circuit wiring layers 8 and 9 can be electrically connected.
The film element built-in two-layer printed wiring board 12 manufactured in this way is composed of a plurality of electrically independent wiring patterns formed on one surface of the insulating layer 6 as shown in FIG. Of the first wiring pattern group 8, the second wiring pattern group 9 formed of the plurality of wiring patterns electrically independent from each other formed on the other surface of the insulating layer 6, and the first wiring pattern group 8 A plurality of resistor electrodes 4 formed of a conductive paste in close proximity to the inner surfaces of a plurality of wiring patterns 42 and 43 which are close to each other and electrically independent, The resistor 5 formed of paste and the dielectric formed by having one end edge facing the insulating gap 31 between the wiring pattern 32 and another wiring pattern 33 on the inner surface of the wiring pattern 32 of the first wiring pattern group 8. Body layer 2 , And a capacitance electrode formed of the same conductive paste and the resistor electrode 4 toward the dielectric layer 2 from the other wiring pattern 33.

[Second Embodiment]
A second embodiment of the present invention will be described. The manufacturing method according to the second embodiment includes a dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer; By selectively applying a conductive paste to one main surface of the conductive metal layer, a pair is formed apart from the first capacitance electrode and the dielectric region across the first conductive metal layer from the dielectric region. A resistance electrode disposed in a pair by an electrode forming step for forming a resistance electrode disposed at the same time, and selective application of a resistance paste to one main surface of the first conductive metal layer; A resistor forming step of forming a resistor straddling them, and the first capacitance electrode and the resistor using a conductive paste in proximity to each of the resistance electrodes on one main surface of the first conductive metal layer; Conductive bumps that are higher in height than the body And forming an insulating layer on one main surface of the first conductive metal layer so as to cover at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistor. And a step of penetrating the tip of the conductive bump into the insulating layer, a second conductive metal layer is laminated in contact with the penetrated conductive bump, and the conductive bump is formed by heating and pressing. Performing plastic deformation to electrically and mechanically connect and integrate the second conductive metal layer, patterning the first conductive metal layer and the second conductive metal layer, A wiring having an insulating gap for forming a second capacitance electrode corresponding to the first capacitance electrode and an insulating gap for electrically separating the paired resistance electrodes in the first conductive metal layer Forming a pattern Together, those having a wiring pattern forming step of forming a wiring pattern electrically connected to the bumps on the second conductive metal layer.

  FIGS. 2A to 2G are diagrams showing a process for manufacturing a two-layer printed wiring board with a built-in film element by the manufacturing method according to the second embodiment of the present invention. In this figure, the same components as those in FIG.

  (A) to (c) in FIG. 2 are the same as (a) to (c) in FIG. That is, also in the second embodiment, the dielectric region 2, the capacitance electrode 3, the resistance electrode 4, and the resistor 5 are applied and formed in this order on the main surface of the first conductive metal layer 1. A coated / formed metal foil 10 having these formed on the surface is obtained (FIG. 2C). As described above, the capacitance electrode 3 and the resistance electrode 4 are simultaneously formed by selective application of the conductive paste, so that the process can be simplified. Further, since the connection layer is provided as the capacitance electrode 3 and the resistance electrode 4, the resistance value can be stabilized as compared with the case where the connection layer is not provided. When silver paste is used as the conductive paste for forming the capacitance electrode 3 and the resistance electrode 4, the resistance value can be further stabilized.

  Next, in order to perform interlayer connection between the first conductive metal layer and the second conductive metal layer by the conductive bumps, for example, a polymer type silver-based material is placed at a predetermined position of the first conductive metal layer 1. A conductive bump 13 having a thickness of about 100 μm is formed by the following method using the conductive paste (trade name, thermosetting conductive paste MSP-812, Mitsui Chemicals KK) (FIG. 2D).

  That is, a metal in which a hole having a diameter of 0.15 mm to 0.2 mm is drilled in a predetermined portion (periphery of a region of a dielectric and a resistor, around a region of a dielectric and a resistor) on a stainless steel plate having a thickness of 100 μm so that each has a substantially conical shape. A mask is prepared, this metal mask is positioned and arranged on one side of the electrolytic copper foil 1, and a conductive paste is printed. The printed conductive paste is dried, and a mountain-shaped conductive bump 13 having a height of about 100 μm is formed. Form.

  Next, an uncured glass epoxy prepreg 6 having a thickness of about 60 μm is laminated as an insulating layer and placed between, for example, an aluminum foil and a rubber sheet between, for example, a hot plate maintained at 100 ° C. The conductive bump 13 is inserted and penetrated through the prepreg 6 by heating and pressurizing as much as possible, and the tip of the bump 13 protrudes from the prepreg 6 (FIG. 2E). Then, a copper foil having a thickness of 18 μm is laminated on the prepreg 6 as a second conductive metal layer 7 in contact with the tip of the conductive bump 13 penetrating the prepreg 6, and is integrated by pressing while heating. Thus, the double-sided metal layer plate 11A having the interlayer connection by the conductive bumps 13 is obtained (FIG. 2 (f)). Due to the pressurization in the stacking direction, the tips of the conductive bumps 13 abut against the opposing second conductive metal layer 7 to be plastically deformed, and the electrical connection between the layers is established. The prepreg 6 is cured to become the insulating layer 6.

The double-sided metal layer plate 11A is patterned in the same manner as in the first embodiment to form the wiring layers 8 and 9, thereby obtaining a two-layer printed wiring board 12A with a built-in film element in which interlayer connection is made by conductive bumps (see FIG. 2 (g)). Also in this case, in order for the dielectric region 2 to function as a capacitor and the resistor 5 to function, a second conductive layer corresponding to the first capacitance electrode 3 is provided on the first conductive metal layer 1 side. It is necessary to provide an insulating gap 31 for forming the capacitance electrode 32 and an insulating gap 41 for electrically separating the paired resistance electrodes 4.
The film element built-in two-layer printed wiring board 12A manufactured in this way is in addition to the characteristics of the film element built-in two-layer printed wiring board 12 manufactured in the first embodiment, as shown in FIG. The tip of the first wiring layer 8 (first wiring patterns 32, 42) penetrates the insulating layer 6 and comes into contact with the second wiring layer 9 (second wiring pattern). It has a frustoconical interlayer connection portion 13 formed of a conductive paste connected to the second wiring layer 9 (second wiring pattern) by plastic deformation.

  As described above, in the second embodiment, the interlayer connection between the first conductive metal layer 1 and the second conductive metal layer 7 is performed by the conductive bumps 13. Since the interlayer connection is performed by such conductive bumps 13, the manufacturing process is simple, the utilization efficiency of the main surface of the wiring board is improved, and it is suitable for high-density mounting.

[Third Embodiment]
A third embodiment of the present invention will be described. The manufacturing method according to the third embodiment includes a dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer; By selectively applying a conductive paste to one main surface of the conductive metal layer, a pair is formed apart from the first capacitance electrode and the dielectric region across the first conductive metal layer from the dielectric region. A resistance electrode disposed in a pair by an electrode forming step for forming a resistance electrode disposed at the same time, and selective application of a resistance paste to one main surface of the first conductive metal layer; A resistor forming step of forming a resistor between the first conductive metal layer and a second conductive metal layer laminated on the first conductive metal layer via an insulating layer; and the second conductive metal A first surface of the layer is brought close to a position corresponding to each of the resistance electrodes, and the first carrier. A step of forming a pair of conductive bumps having a height higher than that of the resistance electrode and the resistor, an insulating layer is laminated on the second conductive metal layer on which the conductive bumps are formed, and the conductive bumps A step of forming a conductive metal layer with a conductive bump / insulating layer by penetrating the tip of the insulating layer, and at least the first capacitance electrode on one main surface of the first conductive metal layer, The conductive bump / insulating layer with the conductive bump is formed so as to cover the resistance electrode, the dielectric region, and the resistor, and the conductive bump is laminated with the tips of the conductive bumps in contact, and heated and pressed. And patterning the first conductive metal layer and the second conductive metal layer to form a first conductive metal layer corresponding to the first capacitance electrode. 2 capacitance electrodes Forming a wiring pattern having an insulating gap for forming and an insulating gap for electrically separating the pair of resistance electrodes, and electrically connecting the bump to the second conductive metal layer The wiring pattern formation process which forms is comprised.

  In the third embodiment, the circuit wiring layers 8 and 9 are electrically connected by conductive bumps as in the second embodiment. The conductive bumps are connected to the first conductive metal layer. It differs from the second embodiment in that it is formed not on the side but on the second conductive metal layer side.

  FIGS. 3A to 3F are views showing a process for manufacturing a two-layer printed wiring board with a built-in film element by the manufacturing method according to the third embodiment of the present invention. In this figure, the same components as those in FIG.

  3A to 3C are the same as FIGS. 1A to 1C. That is, also in the third embodiment, the dielectric region 2, the capacitance electrode 3, the resistance electrode 4, and the resistor 5 are applied in this order on the main surface of the first conductive metal layer 1. A coated / formed metal foil 10 formed on the surface is obtained (FIG. 3C). As described above, the capacitance electrode 3 and the resistance electrode 4 are simultaneously formed by selective application of the conductive paste, so that the process can be simplified. Further, since the connection layer is provided as the capacitance electrode 3 and the resistance electrode 4, the resistance value can be stabilized as compared with the case where the connection layer is not provided. When silver paste is used as the conductive paste for forming the capacitance electrode 3 and the resistance electrode 4, the resistance value can be further stabilized.

  Next, as shown in the upper part of FIG. 3D, conductive bumps 13 are formed at predetermined positions of the second conductive metal layer 7 by the same method as in the second embodiment, and are not formed as insulating layers. A cured glass epoxy prepreg 6 was laminated, and a conductive bump 13 was projected from the prepreg 6. Subsequently, as shown in FIG. 3 (d), this is applied to the coated / formed metal foil 10 so as to cover at least the capacitance electrode 3, the resistance electrode 4, the dielectric region 2, and the resistance body 5. The ends of the bumps 13 were brought into contact with each other, laminated, and heated and pressed to be integrated to obtain a double-sided metal layer plate 11B having an interlayer connection with conductive bumps (FIG. 3E). Due to the pressurization in the stacking direction, the tips of the conductive bumps 13 abut against the opposing first copper foil 1 and are plastically deformed to establish electrical connection between the layers. The prepreg 6 is cured to become the insulating layer 6.

This double-sided metal layer plate 11B is patterned in the same manner as in the first embodiment to form wiring layers 8 and 9, thereby obtaining a two-layer printed wiring board 12B with a built-in film element in which interlayer connection is established by conductive bumps (FIG. 3 (f)). Also in this case, in order for the dielectric region 2 to function as a capacitor and the resistor 5 to function, a second conductive layer corresponding to the first capacitance electrode 3 is provided on the first conductive metal layer 1 side. It is necessary to provide an insulating gap 31 for forming the capacitance electrode 32 and an insulating gap 41 for electrically separating the paired resistance electrodes 4.
The film element built-in two-layer printed wiring board 12B manufactured in this way is in addition to the features of the film element built-in two-layer printed wiring board 12 manufactured in the first embodiment, as shown in FIG. The tip of the second wiring layer 9 (second wiring pattern) penetrates through the insulating layer 6 and abuts against the first wiring layer 8 (first wiring patterns 32 and 42). It has a frustoconical interlayer connection portion 13 formed of a conductive paste connected to the first wiring layer 8 (first wiring patterns 32, 42) by plastic deformation.

  As described above, in the third embodiment, the interlayer connection between the first conductive metal layer 1 and the second conductive metal layer 7 is performed by the conductive bumps 13 as in the second embodiment. The conductive bump 13 is formed on the second conductive metal layer 7 different from the conductive metal layer forming the film element. With this method, conductive bumps can be formed by etching instead of screen printing. For example, the conductive bumps may be formed by etching from a copper plate having a single layer structure of 118 μm (about the total thickness of the copper foil 17 and the height of the conductive bumps). A conductive bump is formed by etching a 100 μm copper plate using a nickel alloy layer as an etching stopper, using a three-layer material in which an 18 μm copper foil and a 100 μm copper plate are laminated via a nickel alloy layer of about 2 μm. It is also possible to do. Conductive bumps can also be formed by plating.

[Fourth Embodiment]
A fourth embodiment of the present invention will be described. The manufacturing method according to the fourth embodiment includes a dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer; By selectively applying a conductive paste to one main surface of the conductive metal layer, a pair is formed apart from the first capacitance electrode and the dielectric region across the first conductive metal layer from the dielectric region. A resistance electrode disposed in a pair by an electrode forming step for forming a resistance electrode disposed at the same time, and selective application of a resistance paste to one main surface of the first conductive metal layer; A resistor forming step for forming a resistor straddling them, and a semi-cured synthetic resin-based sheet provided with a through hole close to a position corresponding to each of the resistance electrodes are prepared as an insulating layer, and the insulating layer is , To one main surface of the first conductive metal layer, at least the first The capacitance electrode, the resistance electrode, the dielectric region, and the resistor are stacked so as to cover the first and second electrodes, the dielectric, and the resistor, and are stacked in the through hole. Filling the conductor, further laminating the second conductive metal layer, heating and pressing to integrate, and patterning the first conductive metal layer and the second conductive metal layer; The first conductive metal layer has an insulating gap for forming a second capacitance electrode corresponding to the first capacitance electrode and an insulating gap for electrically separating the paired resistance electrodes. In this example, a wiring pattern is formed and a wiring pattern is formed on the second conductive metal layer to be electrically connected to the conductor filled in the through hole.

  4A to 4G are cross-sectional views schematically showing an example of a method for manufacturing a printed wiring board with a built-in film element according to the fourth embodiment. What is different from the first embodiment is an interlayer connection method. In this figure, the same components as those in FIG.

  4A to 4C are the same as FIGS. 1A to 1C. That is, also in the fourth embodiment, the dielectric region 2, the capacitance electrode 3, the resistance electrode 4, and the resistor 5 are applied and formed in this order on the main surface of the first copper foil 1, A coated / formed metal foil 10 formed on the surface is obtained (FIG. 4C). As described above, the capacitance electrode 3 and the resistance electrode 4 are simultaneously formed by selective application of the conductive paste, so that the process can be simplified. Further, since the connection layer is provided as the capacitance electrode 3 and the resistance electrode 4, the resistance value can be stabilized as compared with the case where the connection layer is not provided. When silver paste is used as the conductive paste for forming the capacitance electrode 3 and the resistance electrode 4, the resistance value can be further stabilized.

  Next, the prepreg 6 in which the through hole 14 for interlayer connection has been opened in a predetermined position by drilling or the like is laminated on the coated and formed metal foil 10 (FIG. 4D). The inside is filled with a conductive paste to form an interlayer connection 15 (FIG. 4E).

  Further, similarly to FIG. 1 (d), the second copper foil 7 having a thickness of 18 μm is laminated and integrated by heating and pressing to obtain a double-sided metal layer plate 11C having an interlayer connection (FIG. 4 (f)). ).

  Next, as in FIG. 1 (e), unnecessary copper foil portions are removed by etching the double-sided metal layer plate 11C so as to form a predetermined wiring pattern, thereby forming wiring layers 8 and 9. A two-layer printed wiring board 12C with a built-in film element that has been connected by bumps is obtained (FIG. 4G). Also in this case, in order for the dielectric region 2 to function as a capacitor and the resistor 5 to function, a second conductive layer corresponding to the first capacitance electrode 3 is provided on the first conductive metal layer 1 side. It is necessary to provide an insulating gap 31 for forming the capacitance electrode 32 and an insulating gap 41 for electrically separating the paired resistance electrodes 4.

  Thus, in the fourth embodiment, an insulating layer having through holes provided in advance at necessary positions is laminated, and the through holes are filled with a conductive paste, and the second conductive metal layer 7 is formed. Layer connection is established by laminating and heating and pressing. Other processes are the same as those in the first embodiment. Also in this case, a two-layer printed wiring board with a built-in film element can be easily manufactured.

  In addition, as shown in FIG. 5, after filling the through-hole of the insulating layer which provided the through-hole in the required position beforehand, the insulating layer is laminated | stacked, and also 2nd conductive The interlayer connection may be established by laminating the conductive metal layer 7 and applying heat and pressure. Also in this case, a two-layer printed wiring board with a built-in film element can be easily manufactured.

[Fifth Embodiment]
A fifth embodiment of the present invention will be described. The manufacturing method according to the fifth embodiment includes a dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer; By selectively applying a conductive paste to one main surface of the conductive metal layer, a pair is formed apart from the first capacitance electrode and the dielectric region across the first conductive metal layer from the dielectric region. A resistance electrode disposed in a pair by an electrode forming step for forming a resistance electrode disposed at the same time, and selective application of a resistance paste to one main surface of the first conductive metal layer; A resistor forming step of forming a resistor between them, and at least the first capacitance electrode, the resistor electrode, the dielectric region, and the resistor on one main surface of the first conductive metal layer; An insulating layer is stacked so as to cover the insulating layer. A step of laminating and integrating a second conductive metal layer by applying heat and pressure; and bringing the insulating layer from the outside of the first or second conductive metal layer close to a position corresponding to each of the resistance electrodes. A step of providing an interlayer connection hole that exposes the main surface of the metal layer penetrating and opposing, and electrically connecting the first and second conductive metal layers by plating the inner wall surface of the hole And patterning the first conductive metal layer and the second conductive metal layer to form a second capacitance electrode corresponding to the first capacitance electrode on the first conductive metal layer. Forming a wiring pattern having an insulating gap for forming and an insulating gap for electrically separating the pair of resistance electrodes, and forming a predetermined wiring pattern on the second conductive metal layer A process comprising It is.

  6A to 6F are cross-sectional views schematically showing an example of a method for manufacturing a printed wiring board with a built-in film element according to the fifth embodiment. What is different from the first embodiment is an interlayer connection method. In this figure, the same components as those in FIG.

  In this method, the double-sided metal layer plate 11 is obtained in the same manner as in the first embodiment (FIGS. 6A to 6D). Thereafter, an opening (hole) for interlayer connection penetrating through the insulating layer 6 is opened with a laser beam or the like so that the main surface of the metal layer 1 facing from the outside of the metal layer 7 is exposed. A conductor film is formed along the wall surface by plating or the like to form the interlayer connection portion 16, and the interlayer connection hole after the conductor film is formed along the inner wall surface is filled with resin or the like, and the double-sided metal layer plate 11D having the interlayer connection completed Is obtained (FIG. 6E). Thereafter, as in the first embodiment, the metal layers on both sides are etched with a predetermined pattern to form the circuit wiring layers 8 and 9, thereby obtaining the film element built-in two-layer printed wiring board 12C (FIG. 6 ( f)).

  The interlayer connection hole may be opened from the second metal layer 7 side as in this example, but may be opened from the first metal layer 1 side. Further, after the circuit wiring layers 8 and 9 are formed by etching, the interlayer connection portion may be provided by drilling with a laser beam and plating the inner wall. In any case, by irradiating a laser beam from the outside of the metal layer, providing a hole exposing the main surface of the opposing metal layer (wiring layer), and providing a conductor layer by plating along the hole, the interlayer It becomes the connection part 16 and can electrically connect between wiring layers. Delicate processing is possible by using a laser beam. In this case, the printed wiring board with a built-in film element can be easily manufactured.

[Example of multilayering]
In the above description, the embodiment of the method for manufacturing a two-layer printed wiring board with a built-in film element has been described. Of course, the printed wiring board with a built-in film element thus manufactured can be multilayered.

  As an example of multilayering, a method of laminating a combined body 20 in which conductive bumps are formed on a copper foil and a prepreg is laminated / penetrated on both sides of a film element built-in two-layer printed wiring board 12A will be described with reference to the drawings.

  FIG. 6 is a cross-sectional view schematically showing an example of an embodiment in which the multilayered multilayer printed wiring board 12A according to the present invention is multilayered.

  In this example, as shown in FIGS. 7A to 7C, an insulating layer and a metal layer are laminated on both sides of the two-layer printed wiring board 12A with a built-in film element manufactured by the method of the present invention and heated and pressed. Multi-layered with.

  First, similarly to the formation of conductive bumps in the second embodiment, conductive bumps 18 are formed by screen printing a conductive paste on a copper foil 17 having a thickness of 18 μm, and a prepreg 19 is laminated. Thus, a plurality of outer-layer assemblies 20 in which the tips of the conductive bumps 18 protrude through the prepreg 19 are prepared (FIG. 7B).

  Next, this combination 20 is laminated on the upper and lower sides of the two-layer printed wiring board 12A with a built-in film element manufactured in the second embodiment so that the tips of the conductive bumps 18 are in contact with the wiring layer 8 or 9, respectively. , Heat and press to integrate. Then, the outer layer copper foil 17 is subjected to wiring patterning to form wiring layers 21 and 22, and a film element built-in four-layer printed wiring board 23 is obtained (FIG. 7C).

[Other examples of multi-layering]
An example of another method for multi-layering will be described with reference to FIGS. This example is a method of laminating two-layer printed wiring boards 12A with built-in film elements manufactured by the manufacturing method according to the present invention with an insulating layer interposed therebetween. As shown in FIGS. 8A to 8D, a film element is obtained by laminating a plurality of film element built-in two-layer printed wiring boards 12A across an insulating layer having an interlayer connection portion 18 formed of conductive bumps, and heating and pressing the film element. A built-in four-layer printed wiring board 26 is manufactured (FIG. 8D).

  That is, conductive bumps 18 serving as interlayer connection portions are formed on the wiring layer 8 on one side of the two-layer printed wiring board 12A with a built-in film element by the same method as the conductive bump formation of the second embodiment (see FIG. 8 (a)), an uncured epoxy prepreg 25 is laminated thereon, and the tips of the conductive bumps 18 protrude from the prepreg 25 (FIG. 8 (b)), and another film element built-in two-layer printed wiring board By stacking 12A (FIG. 8C) and integrating them by heating and pressurizing, a film element built-in four-layer printed wiring board 26 can be manufactured (FIG. 8D).

  By doing in this way, the conventional surface mounting technique, multilayer board manufacturing technique, and a manufacturing apparatus can be utilized, and a film-element built-in printed wiring board can be manufactured by a comparatively simple means.

[Other Embodiments]
In addition, this invention is not limited to the said embodiment, In the range which does not deviate from the meaning of invention, it can implement in various aspects.

  For example, when the multilayer connection is made by conductive bumps, the conductive bumps can be formed by etching instead of screen printing. For example, the conductive bump may be formed by etching from a copper plate having a single layer structure of 118 μm (about the total thickness of the copper foil 17 and the height of the conductive bump). A conductive bump is formed by etching a 100 μm copper plate using a nickel alloy layer as an etching stopper, using a three-layer structure material in which an 18 μm copper foil and a 100 μm copper plate are laminated via a nickel alloy layer of about 2 μm. It is also possible to do. Conductive bumps can also be formed by plating. Multiple layers can be formed in the same manner.

  In the above description, the patterning process for forming the wiring pattern has been described as being performed by a subtractive method such as etching using a photolithography technique, but is not limited thereto, and is performed by a semi-additive method or an additive method. You can also. For example, a predetermined wiring pattern can be formed by removing all of the first and second conductive metal layers once by etching or the like and then performing electroless plating or electrolytic plating. By doing so, a more delicate wiring pattern can be formed, the reliability of electrical connection between each electrode and the wiring layer can be increased, and the thickness of the wiring layer can be adjusted appropriately. Become.

  As an example of multilayering, the above embodiment has described the interlayer connection method using conductive bumps. In this case as well, the interlayer connection method described in the second to fifth embodiments and other interlayer connection methods are used. Of course, it can be appropriately selected. For example, in FIG. 7B, instead of providing the conductive bumps 18 on the copper foil 17, a prepreg 19 in which holes for interlayer connection are drilled in advance is prepared and laminated on the copper foil 17. Then, a conductive paste may be filled in the hole for interlayer connection and laminated on the outside of the two-layer printed wiring board 12B with a built-in film element and heated and pressed before curing. At that time, the order of filling the hole of the insulating layer with the conductive paste, laminating the insulating layer, and laminating the copper foil 17 is not limited. That is, as described above, the insulating layer is laminated on the copper foil 17, and then the conductor is filled, and the combined body of the filled insulating layer and the copper foil 17 is laminated outside the two-layer printed wiring board 12B with a built-in film element. Alternatively, after filling the conductor, an insulating layer may be laminated on the copper foil 17 and laminated on the outside of the two-layer printed wiring board 12B with a built-in film element, or the conductor is filled. An insulating layer may be laminated outside the two-layer printed wiring board 12B with a built-in film element, and a copper foil 17 may be further laminated. Also in FIG. 8B, the conductive bumps 18 are not provided on one side of the membrane element built-in two-layer printed wiring board 12A and the prepreg 25 is laminated, but a hole for interlayer connection is previously drilled in the prepreg 25 with a drill or the like. Prior to curing and curing, the outer layers of the two-layer printed wiring board 12C (12, 12A, 12B, or 12D) with a built-in film element manufactured by the manufacturing method of the present invention are laminated and the interlayer connection is made. Alternatively, the conductive holes may be filled with a conductive paste, and the printed wiring board 12B with a built-in film element may be further stacked and heated and pressed. Of course, it is also possible to provide interlayer connection by providing via holes and through holes.

  As an example of multilayering, in the above-described embodiment, the example in which the two-layer printed wiring boards 12A with built-in film elements according to the present invention are laminated via the prepreg 25 has been described, but the two-layer printed wiring board with built-in film elements according to the present invention. A wiring board manufactured by another method may be laminated on one side or both sides of 12A via the prepreg 25. Multiple layers can be formed by the same interlayer connection method.

  In the above embodiment, the two-layer and four-layer manufacturing methods of the printed wiring board with built-in film elements have been described as examples, but it is of course possible to further increase the number of layers by using the same method as described above. is there.

  The conductive bumps are, for example, conductive powders such as silver, gold, copper, solder powder, alloy powders or composite (mixed) metal powders thereof, and polycarbonate resins, polysulfone resins, polyester resins, phenoxy resins, phenol resins, for example. , A conductive composition prepared by mixing a binder component such as polyimide resin, or a conductive metal. When forming a conductive bump with a conductive composition, a bump with a high aspect ratio can be formed by, for example, a printing method using a relatively thick metal mask. In general, the height of the conductive bump is preferably about 100 to 400 μm, and the height of the conductive bump is such that it can penetrate one synthetic resin sheet (insulating layer) and a plurality of synthetic resin systems. The height which can penetrate a sheet | seat may be mixed suitably. As a means of forming conductive bumps with conductive metal, (a) a fine metal soul with a certain shape or size is spread on the surface of the conductive metal layer on which an adhesive layer has been provided in advance, and is selectively fixed. (This may be done by arranging a mask at this time), (b) A plating resist is printed and patterned on the surface of the electrolytic copper foil, and copper, tin, gold, silver, solder, etc. are plated and selectively fine Forming metal pillars (bumps); (c) applying and patterning a solder resist on the surface of the conductive metal layer; and dipping in a solder bath to selectively form minute metal pillars (bumps); (d) metal For example, a part of the plate is covered with a resist and etched to form minute metal bumps. Here, the fine metal soul or the fine metal pillar corresponding to the conductive bump may have a multilayer structure or a multilayer shell structure in which different metals are combined. For example, copper may be cored and the surface may be coated with a gold or silver layer to provide oxidation resistance, or copper may be cored and the surface may be coated with a solder layer to provide solder jointability. In the present invention, when the conductive bump is formed of a conductive composition, the process can be further simplified as compared with the case where the conductive bump is formed by means such as plating, which is effective in terms of cost reduction. .

  In the present invention, examples of the insulating layer include a thermoplastic resin film (sheet) and a thermosetting resin sheet held in a state before curing, and the thickness is preferably about 50 to 300 μm. Here, examples of the thermoplastic resin sheet include sheets such as polycarbonate resin, polysulfone resin, thermoplastic polyimide resin, tetrafluoropolyethylene resin, hexafluoropolypropylene resin, and polyetheretherketone resin. In addition, the thermosetting resin sheet held in the pre-curing state includes epoxy resin, bismaleimide triazine resin, polyimide resin, phenol resin, polyester resin, melamine resin, or butadiene rubber, butyl rubber, natural rubber, neoprene rubber, silicone. Examples thereof include raw rubber sheets such as rubber. These synthetic resins may be used alone or may contain insulating inorganic or organic fillers, and sheets made of glass cloth or mat, organic synthetic fiber cloth or mat, or a sheet combined with a reinforcing material such as paper. There may be. Further, the insulating layer can be configured even if it is not a sheet-like one.

  The present invention is not limited to the description of the above embodiment, and the structure, material, arrangement of each member, work procedure, and the like can be changed as appropriate without departing from the scope of the present invention. In addition, the product names (product names) listed above are merely examples, and are not limited to the products. Other products can be used as long as they have equivalent functions or properties.

Sectional drawing which shows typically the process which manufactures the membrane element built-in two-layer printed wiring board with the manufacturing method which concerns on the 1st Embodiment of this invention. Sectional drawing which shows typically the process which manufactures the film element built-in two-layer printed wiring board with the manufacturing method which concerns on the 2nd Embodiment of this invention. Sectional drawing which shows typically the process which manufactures the membrane element built-in two-layer printed wiring board with the manufacturing method which concerns on the 3rd Embodiment of this invention. Sectional drawing which shows typically the process of manufacturing the two-layer printed wiring board with a built-in film | membrane element based on this invention using another interlayer connection method. Furthermore, sectional drawing which shows typically the process which manufactures the membrane element built-in two-layer printed wiring board based on this invention using another interlayer connection method. Furthermore, sectional drawing which shows typically the process which manufactures the membrane element built-in two-layer printed wiring board based on this invention using another interlayer connection method. Sectional drawing which shows typically an example of embodiment which multilayers the two-layer printed wiring board with a built-in film element which concerns on this invention. Sectional drawing which shows typically the other example of embodiment which multilayers the two-layer printed wiring board with a built-in film | membrane element which concerns on this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... 1st copper foil (1st electroconductive metal layer), 2 ... Dielectric by a film element, 3 ... 1st capacitance electrode (dielectric connection layer), 4 ... Resistance electrode (resistor connection layer), DESCRIPTION OF SYMBOLS 5 ... Resistor by a film element, 6, 19, 25 ... Glass epoxy prepreg (insulating layer), 7 ... 2nd copper foil (2nd electroconductive metal layer), 12 ... Two-layer printed wiring board with a built-in film element , 13, 18 ... conductive bumps, 14 ... interlayer connection holes, 15 ... interlayer connection parts filled with a conductor, 16 ... interlayer connection parts plated with conductors along the inner walls of the holes, 17 ... third copper Foil (third conductive metal layer), 8, 9, 21, 22,... Wiring layer, 23, 26.

Claims (12)

A dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer;
A selective application of a conductive paste to one major surface of the first conductive metal layer separates the first capacitance electrode and the dielectric region from the dielectric region over the first conductive metal layer. An electrode forming step of forming a resistance electrode disposed in a pair;
A resistor forming step of forming a resistor straddling between the pair of resistance electrodes by selectively applying a resistance paste to one principal surface of the first conductive metal layer;
An insulating layer is laminated on one main surface of the first conductive metal layer so as to cover at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistor, and on the insulating layer Laminating a second conductive metal layer and heating and pressurizing and integrating,
By patterning the first conductive metal layer and the second conductive metal layer, a second capacitance electrode corresponding to the first capacitance electrode is formed on the first conductive metal layer. And a wiring pattern forming step of forming a wiring pattern having an insulating gap for electrically isolating the pair of resistance electrodes and electrically insulating the paired resistance electrodes. A dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer;
A selective application of a conductive paste to one major surface of the first conductive metal layer separates the first capacitance electrode and the dielectric region from the dielectric region over the first conductive metal layer. An electrode forming step of forming a resistance electrode disposed in a pair;
A resistor forming step of forming a resistor straddling between the pair of resistance electrodes by selectively applying a resistance paste to one principal surface of the first conductive metal layer;
Conductivity for forming a conductive bump having a height higher than that of the first capacitance electrode and the resistor with a conductive paste in proximity to each of the resistance electrodes on one main surface of the first conductive metal layer. Bump formation process,
An insulating layer is formed on one main surface of the first conductive metal layer so as to cover at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistor, and the conductive bump A step of penetrating the tip of the insulating layer;
A second conductive metal layer is laminated in contact with the penetrated conductive bump, and the conductive bump is plastically deformed by heating and pressing to electrically and mechanically form the second conductive metal layer. Connecting to and integrating with,
By patterning the first conductive metal layer and the second conductive metal layer, a second capacitance electrode corresponding to the first capacitance electrode is formed on the first conductive metal layer. Forming a wiring pattern having an insulating gap for electrically insulating and an insulating gap for electrically separating the pair of resistance electrodes, and electrically connecting to the conductive bump in the second conductive metal layer A method of manufacturing a printed wiring board with a built-in film element, comprising the step of forming a wiring pattern. A dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer;
A selective application of a conductive paste to one major surface of the first conductive metal layer separates the first capacitance electrode and the dielectric region from the dielectric region over the first conductive metal layer. An electrode forming step of forming a resistance electrode disposed in a pair;
A resistor forming step of forming a resistor straddling between the pair of resistance electrodes by selectively applying a resistance paste to one principal surface of the first conductive metal layer;
A second conductive metal layer is prepared on the first conductive metal layer via an insulating layer, and one main surface of the second conductive metal layer corresponds to each of the resistance electrodes. Forming a pair of conductive bumps proximate to a position and higher than the first capacitance electrode and the resistor;
An insulating layer is laminated on the second conductive metal layer on which the conductive bumps are formed, and the tips of the conductive bumps are passed through the insulating layer to form a conductive metal layer with conductive bumps / insulating layers. Process,
With the conductive bump / insulating layer formed on one main surface of the first conductive metal layer so as to cover at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistor. A step of laminating a conductive metal layer with the tips of the conductive bumps in contact with each other, and heating and pressing to integrate; and
By patterning the first conductive metal layer and the second conductive metal layer, a second capacitance electrode corresponding to the first capacitance electrode is formed on the first conductive metal layer. Forming a wiring pattern having an insulating gap for electrically insulating and an insulating gap for electrically separating the pair of resistance electrodes, and forming a wiring pattern electrically connected to the bump on the second conductive metal layer And a wiring pattern forming step for manufacturing the printed wiring board with a built-in film element. A dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer;
A selective application of a conductive paste to one major surface of the first conductive metal layer separates the first capacitance electrode and the dielectric region from the dielectric region over the first conductive metal layer. An electrode forming step of forming a resistance electrode disposed in a pair;
A resistor forming step of forming a resistor straddling between the pair of resistance electrodes by selectively applying a resistance paste to one principal surface of the first conductive metal layer;
A semi-cured synthetic resin sheet having through holes provided close to positions corresponding to the respective resistance electrodes is prepared as an insulating layer, and the insulating layer is provided on one main surface of the first conductive metal layer. The first and second electrodes, the dielectric, and the resistor are stacked so as to cover at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistor. And filling the through hole with a conductor, further laminating a second conductive metal layer, heating and pressurizing and integrating,
By patterning the first conductive metal layer and the second conductive metal layer, a second capacitance electrode corresponding to the first capacitance electrode is formed on the first conductive metal layer. Forming a wiring pattern having an insulation gap for electrically insulating and an insulation gap for electrically separating the pair of resistance electrodes, and electrically connecting the conductor filled in the through-hole to the second conductive metal layer. And a wiring pattern forming step for forming a wiring pattern to be connected to the film. A dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer;
A selective application of a conductive paste to one major surface of the first conductive metal layer separates the first capacitance electrode and the dielectric region from the dielectric region over the first conductive metal layer. An electrode forming step of forming a resistance electrode disposed in a pair;
A resistor forming step of forming a resistor straddling between the pair of resistance electrodes by selectively applying a resistance paste to one principal surface of the first conductive metal layer;
A semi-cured synthetic resin sheet having through holes provided close to positions corresponding to the respective resistance electrodes is prepared as an insulating layer, the through holes of the insulating layer are filled with a conductor, and the insulating layer is formed. The first and second electrodes so as to cover at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistor on one main surface of the first conductive metal layer, Laminating to cover the dielectric and the resistor, and further laminating a second conductive metal layer, and heating and pressing to integrate,
By patterning the first conductive metal layer and the second conductive metal layer, a second capacitance electrode corresponding to the first capacitance electrode is formed on the first conductive metal layer. Forming a wiring pattern having an insulation gap for electrically insulating and an insulation gap for electrically separating the pair of resistance electrodes, and electrically connecting the conductor filled in the through-hole to the second conductive metal layer. And a wiring pattern forming step for forming a wiring pattern to be connected to the film. A dielectric region forming step of forming a dielectric region by applying a dielectric paste to a part of one main surface of the first conductive metal layer;
A selective application of a conductive paste to one major surface of the first conductive metal layer separates the first capacitance electrode and the dielectric region from the dielectric region over the first conductive metal layer. An electrode forming step of forming a resistance electrode disposed in a pair;
A resistor forming step of forming a resistor straddling between the pair of resistance electrodes by selectively applying a resistance paste to one principal surface of the first conductive metal layer;
An insulating layer is laminated on one main surface of the first conductive metal layer so as to cover at least the first capacitance electrode, the resistance electrode, the dielectric region, and the resistor, and on the insulating layer Laminating a second conductive metal layer and heating and pressurizing and integrating,
An interlayer connection hole is provided near the position corresponding to each of the resistance electrodes to expose the main surface of the opposing metal layer that penetrates the insulating layer from the outside of the first or second conductive metal layer; Electrically connecting the first and second conductive metal layers by plating the inner wall surface of
By patterning the first conductive metal layer and the second conductive metal layer, a second capacitance electrode corresponding to the first capacitance electrode is formed on the first conductive metal layer. Forming a wiring pattern having an insulating gap for electrically insulating and an insulating gap for electrically separating the pair of resistance electrodes, and forming a predetermined wiring pattern on the second conductive metal layer; A method of manufacturing a printed wiring board with a built-in film element, comprising: Providing a plurality of combined bodies in which conductive bumps are formed on one main surface of the third conductive metal layer, an insulating layer is stacked, and the tips of the conductive bumps are inserted into and protrude from the insulating layer; ,
The combined bumps are stacked on both outer surfaces of the printed wiring board with a built-in film element that has undergone the wiring pattern forming process, with the tips of the protruding conductive bumps in contact with each other, and the protruding conductive bumps are heated and pressed. A process of plastically deforming and electrically connecting and integrating;
The method for producing a printed wiring board with a built-in film element according to claim 1, further comprising a step of patterning an outermost layer. Forming conductive bumps on one of the wiring portions on both outer layer surfaces of the printed wiring board with built-in film element that has undergone the wiring pattern forming step; and
Laminating an insulating layer on the surface on which the conductive bumps are formed, passing the tip of the conductive bumps through the insulating layer, laminating another wiring board whose outer layer is patterned, and heating and pressurizing The method for manufacturing a printed wiring board with a built-in film element according to any one of claims 1 to 7, further comprising a step of plastically deforming and integrating the leading ends of the conductive bumps penetrating. Prior Symbol another wiring board, film element embedded print of claim 8, wherein the kite is manufactured by the manufacturing method of the membrane elements embedded printed circuit board according to any one of claims 1 to 7 A method for manufacturing a wiring board. The first capacitance electrode and the resistive electrode forming a pre-Symbol pair, film element manufacturing method of the embedded printed circuit board according to any one of claims 1 to 9, characterized in that consists of silver paste. A first wiring pattern group formed of a plurality of wiring patterns electrically independent from each other formed on one surface of the insulating layer;
A second wiring pattern group formed of a plurality of wiring patterns electrically independent from each other formed on the other surface of the insulating layer;
A plurality of resistor electrodes formed of a conductive paste in proximity to each other and on the inner surfaces of the plurality of electrically independent wiring patterns in the first wiring pattern group;
A resistor formed of a resistance paste across the resistor electrodes;
A dielectric layer formed on the inner surface of the wiring pattern of the first wiring pattern group with one end edge facing an insulating gap between the wiring pattern and another wiring pattern;
A printed wiring board with a built-in film element, comprising: a capacitance electrode formed of the same conductive paste as the resistor electrode from the other wiring pattern to the dielectric layer.   The first wiring pattern is formed of a conductive paste that penetrates through the insulating layer and has a tip abutting on the second wiring pattern and a tip portion connected to the second wiring pattern by plastic deformation. The printed wiring board with a built-in film element according to claim 11, further comprising a frustoconical interlayer connection portion.

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