JPH0574911A - Tester and testing method for integrated circuit - Google Patents
Tester and testing method for integrated circuitInfo
- Publication number
- JPH0574911A JPH0574911A JP3261305A JP26130591A JPH0574911A JP H0574911 A JPH0574911 A JP H0574911A JP 3261305 A JP3261305 A JP 3261305A JP 26130591 A JP26130591 A JP 26130591A JP H0574911 A JPH0574911 A JP H0574911A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit
- power supply
- digital integrated
- evaluation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ディジタル集積回路の
故障解析，特性解析に用いる試験装置および試験方法に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a test apparatus and a test method used for failure analysis and characteristic analysis of digital integrated circuits.
【０００２】[0002]
【従来の技術】従来、ディジタル集積回路のチップ表面
に温度変化型液晶を塗布してチップ表面の微少発熱点を
検出する液晶解析方法がディジタル集積回路の故障解
析，特性解析に用いられている。温度変化型の液晶は、
転移温度を境にして光学的性質が急変する。偏光フィル
タつきの顕微鏡を用いて上記の光学的性質の差異を識別
することができる。光源側と接眼レンズ側２枚の偏光フ
ィルタの偏光面が垂直になるように調節すると、転移温
度以下では光を通し、転移温度以上では光を通さなくな
る。このため、ディジタル集積回路のチップ上で発熱に
より転移温度以上の温度になっている部分は黒色にな
る。微少発熱を検出するには、ディジタル集積回路のチ
ップの平均温度を液晶の転移温度の直前になるように制
御する必要がある。このように温度を制御すると、ディ
ジタル集積回路のチップ上の微少発熱点のみが転移温度
を越えるために、この発熱点が黒色として検出できる。2. Description of the Related Art Conventionally, a liquid crystal analysis method in which a temperature-changing liquid crystal is applied to a chip surface of a digital integrated circuit to detect a minute heat generation point on the chip surface has been used for failure analysis and characteristic analysis of the digital integrated circuit. The temperature change type liquid crystal is
The optical properties change suddenly at the transition temperature. A microscope with a polarizing filter can be used to identify the above differences in optical properties. When the polarization planes of the two polarizing filters on the light source side and the eyepiece lens side are adjusted to be vertical, light is transmitted below the transition temperature and is not transmitted above the transition temperature. Therefore, a portion of the chip of the digital integrated circuit, which has a temperature equal to or higher than the transition temperature due to heat generation, becomes black. In order to detect the minute heat generation, it is necessary to control the average temperature of the chip of the digital integrated circuit so that it is just before the transition temperature of the liquid crystal. When the temperature is controlled in this way, only the minute heat generation point on the chip of the digital integrated circuit exceeds the transition temperature, so that this heat generation point can be detected as black.
【０００３】一般に、液晶解析において、ディジタル集
積回路の電源端子には直流かあるいは直流オフセット付
き低周波正弦波電圧が印加される。入力端子には電源電
圧と同じ電圧か接地電圧が印加されるか、あるいはオー
プン状態にされる。直流オフセット付き正弦波電圧を用
いたときは、電圧のピーク付近でのみ微少発熱点が転移
温度を越えるように調整する。このようにすると、正弦
波の周波数に応じて微少発熱点が黒変するため、発熱点
の検出が容易になる。Generally, in liquid crystal analysis, a direct current or a low frequency sine wave voltage with a direct current offset is applied to a power supply terminal of a digital integrated circuit. The same voltage as the power supply voltage, the ground voltage, or the open state is applied to the input terminal. When using a sine wave voltage with a DC offset, adjust so that the minute heating point exceeds the transition temperature only near the peak of the voltage. In this case, since the minute heat generation point turns black depending on the frequency of the sine wave, it becomes easy to detect the heat generation point.
【０００４】以上説明した従来の液晶解析では、ディジ
タル集積回路の入力端子に印加する電圧は電源電圧と同
じか、接地電圧かあるいは電圧を印加せずオープン状態
で解析を実施している。In the conventional liquid crystal analysis described above, the voltage applied to the input terminal of the digital integrated circuit is the same as the power supply voltage, the ground voltage, or the voltage is not applied and the analysis is performed in an open state.
【０００５】[0005]
【発明が解決しようとする課題】上記の方法では、ディ
ジタル集積回路内部にショート箇所あるいはリーク箇所
等の発熱の原因となる箇所が含まれていても、その箇所
に電圧が印加されるとは限らない。例えば、ディジタル
集積回路内部のある回路のノードと接地端子間にリーク
パスがあった場合に、そのノードが“Ｈ”レベルになら
ないとリーク電流が流れないため、微少発熱も生じな
い。このように、従来のディジタル集積回路のチップ上
の微少発熱点を検出する液晶解析では、ディジタル集積
回路の入力端子が、電源電圧か接地電圧あるいはオープ
ン状態で解析を実施していたため、リーク箇所，ショー
ト箇所等の異常箇所が含まれていても、それらの異常箇
所に電圧が印加されるとは限らないため、微少発熱が検
出できないことがあった。According to the above method, even if the digital integrated circuit includes a portion causing heat such as a short-circuit portion or a leakage portion, the voltage is not always applied to the portion. Absent. For example, when there is a leak path between a node of a certain circuit inside the digital integrated circuit and the ground terminal, a leak current does not flow unless the node goes to the “H” level, so that minute heat generation does not occur. As described above, in the liquid crystal analysis for detecting the minute heat generation point on the chip of the conventional digital integrated circuit, since the input terminal of the digital integrated circuit is analyzed with the power supply voltage, the ground voltage, or the open state, the leak location, Even if an abnormal portion such as a short-circuited portion is included, the voltage is not always applied to the abnormal portion, so that minute heat generation may not be detected.
【０００６】本発明は、上記の欠点を改善するために提
案されたもので、その目的は、ディジタル集積回路内部
のリーク箇所，ショート箇所等の異常箇所の検出率を向
上させる試験装置および試験方法を提供することにあ
る。The present invention has been proposed in order to improve the above-mentioned drawbacks, and its object is a test apparatus and a test method for improving the detection rate of abnormal points such as leak points and short points in a digital integrated circuit. To provide.
【０００７】[0007]
【課題を解決するための手段】本発明にかかる集積回路
の試験装置の請求項１に記載の発明は、評価ディジタル
集積回路（以下、単に評価集積回路という）の電源電圧
および入力パルスの“Ｈ”レベル発生用電圧として印加
するための直流オフセット付き正弦波電源と、評価集積
回路の入力に印加する入力パルスの“Ｈ”レベルが電源
電圧の変化に比例して変化するパルスを発生する入力パ
ターン発生回路と、評価集積回路に流れる電流を測定す
る電流測定回路と、電源電流が設定値を越えた場合に入
力パターンの送出を停止する入力パターン送出／停止制
御回路と、評価集積回路のチップ表面に塗布された温度
変化型液晶の微少発熱点を検出するための光学顕微鏡
と、評価集積回路のチップに塗布した液晶の光学的性質
が変化する転移温度の直前の温度に評価集積回路の平均
温度を設定するための温度制御装置とを備えたものであ
る。The invention according to claim 1 of an integrated circuit test apparatus according to the present invention is a power supply voltage of an evaluation digital integrated circuit (hereinafter, simply referred to as an evaluation integrated circuit) and "H" of an input pulse. A sine wave power supply with a DC offset to be applied as a level generation voltage and an input pattern that generates a pulse in which the "H" level of the input pulse applied to the input of the evaluation integrated circuit changes in proportion to the change in the power supply voltage. A generator circuit, a current measuring circuit for measuring the current flowing through the evaluation integrated circuit, an input pattern sending / stopping control circuit for stopping the sending of the input pattern when the power supply current exceeds a set value, and the chip surface of the evaluation integrated circuit. Optical microscope for detecting minute heat generation points of temperature change type liquid crystal coated on the surface and transition temperature at which optical properties of liquid crystal coated on the chip of the evaluation integrated circuit change It is obtained by a temperature control device for setting the average temperature of the evaluation integrated circuit just before the temperature.
【０００８】また、請求項２に記載の発明は、評価集積
回路のチップ表面に温度変化型液晶を塗布し、この評価
集積回路のチップに塗布した液晶の光学的性質が変化す
る転移温度の直前の温度に評価集積回路の平均温度を設
定し、評価集積回路に直流オフセット付き正弦波電圧を
電源電圧として印加し、“Ｈ”レベルが電源電圧の変化
に比例して変化するパルスを入力パターンとして印加
し、電源の正弦波電圧を０Ｖあるいは０Ｖ近くまで低下
させてた場合に、評価集積回路に流れる電源電流が設定
値を越えているかどうかを判定し、設定値を越えた場合
に入力パターンの送出を停止し、次に、正弦波電圧を上
昇させた後、設定値を越えた電源電流が流れていること
による評価集積回路のチップ表面の微少発熱箇所を、液
晶の光学的性質を利用して光学顕微鏡を用いて検出する
ようにしたものである。Further, in the invention described in claim 2, the temperature change type liquid crystal is applied to the surface of the chip of the evaluation integrated circuit, and the temperature immediately before the transition temperature at which the optical property of the liquid crystal applied to the chip of the evaluation integrated circuit changes. The average temperature of the evaluation integrated circuit is set to the temperature of, the sine wave voltage with DC offset is applied to the evaluation integrated circuit as the power supply voltage, and the pulse whose "H" level changes in proportion to the change of the power supply voltage is used as the input pattern. When the sine wave voltage of the power supply is applied and dropped to 0V or close to 0V, it is determined whether the power supply current flowing in the evaluation integrated circuit exceeds the set value, and if it exceeds the set value, the input pattern After stopping the transmission and then raising the sine wave voltage, the minute heat generation point on the chip surface of the evaluation integrated circuit due to the power supply current exceeding the set value is used to improve the optical properties of the liquid crystal. It is obtained so as to detect using an optical microscope with.
【０００９】さらに、請求項３に記載の発明は、請求項
１に記載の発明において、評価集積回路の内部回路がス
イッチングしている時間帯および動作時の直流的電流が
流れている時間帯に入力パターンの停止を禁止する禁止
パルス発生回路を設けたものである。Further, in the invention described in claim 3, in the invention described in claim 1, in the time zone in which the internal circuit of the evaluation integrated circuit is switching and the time zone in which a direct current during operation is flowing. A prohibition pulse generation circuit for prohibiting the stop of the input pattern is provided.
【００１０】また、請求項４に記載の発明は、請求項２
に記載の発明において、評価集積回路に流れる電源電流
が設定値を越えているかどうかの判定を、評価集積回路
の内部回路がスイッチングしている時間帯および動作時
の直流的電流が流れている時間帯を除いた時間帯に行う
ようにしたものである。The invention according to claim 4 is the same as claim 2
In the invention described in, the judgment as to whether or not the power supply current flowing through the evaluation integrated circuit exceeds the set value is performed by the time zone during which the internal circuit of the evaluation integrated circuit is switching and the time during which the direct current during operation is flowing. It is designed to be performed during the time period excluding the band.
【００１１】[0011]
【作用】評価集積回路のチップ上のリーク箇所，ショー
ト箇所等で発熱を生じている場合は、温度変化型の液晶
を用いて発熱箇所を特定する方法は非常に検出感度の高
い手段である。ただし、評価集積回路に電源電圧，入力
電圧を印加しただけではリーク箇所，ショート箇所に電
圧が印加されて発熱を生ずるとは限らない。例えばある
回路のノードと接地端子間にリークパスがあった場合に
は、そのノードが“Ｈ”レベルのときにリーク電流が流
れる。ある回路のノードと電源端子間にリークパスがあ
った場合には、そのノードが“Ｌ”レベルのときにリー
ク電流が流れる。When heat is generated at a leak location, a short location or the like on the chip of the evaluation integrated circuit, the method of identifying the heat generation location using the temperature change type liquid crystal is a means with extremely high detection sensitivity. However, the application of the power supply voltage and the input voltage to the evaluation integrated circuit does not necessarily cause the voltage to be applied to the leak portion and the short portion to generate heat. For example, when there is a leak path between a node of a circuit and the ground terminal, a leak current flows when the node is at the “H” level. When there is a leak path between a node of a circuit and a power supply terminal, a leak current flows when the node is at “L” level.
【００１２】評価集積回路内部の各ノードを順次“Ｈ”
および“Ｌ”に設定して電源電流の増加の有無をチェッ
クすれば、そのノードにリーク箇所あるいはショート箇
所が内在しているか否かがチェックできる。評価集積回
路内部のすべてのノードを１回以上“Ｈ”および“Ｌ”
に設定するには、評価集積回路に機能試験で使用する入
力パターンを評価集積回路の全入力端子に入力すること
により達成できる。入力パターンが変化する１サイクル
毎に電源電流の増加を監視し、増加した時点で入力パタ
ーンの送出を停止すれば、電源電流が増加した状態を保
持することができる。この状態で、液晶解析を実施すれ
ば、電源電流が流れることによって発熱を生じている箇
所を特定することができる。"H" is sequentially applied to each node inside the evaluation integrated circuit.
By setting to "L" and checking whether or not the power supply current increases, it is possible to check whether or not there is a leak part or a short part in the node. All nodes in the evaluation integrated circuit are "H" and "L" once or more
Can be set by inputting the input pattern used in the functional test to the evaluation integrated circuit to all the input terminals of the evaluation integrated circuit. If the increase in the power supply current is monitored for each cycle in which the input pattern changes and the output of the input pattern is stopped at the time of the increase, the state in which the power supply current has increased can be maintained. If liquid crystal analysis is performed in this state, it is possible to identify the location where heat is generated due to the flow of the power supply current.
【００１３】なお、検出した発熱箇所がリーク箇所，シ
ョート箇所と必ずしも一致しない場合があり注意を要す
る。例えば評価集積回路内部にショート箇所があった場
合、そのショート箇所を通してトランジスタ等に大電流
が流れる場合がある。このような場合、ショート箇所は
トランジスタより電圧降下が小さいため発熱が小さく、
トランジスタでの発熱が大きくなる。液晶解析を実施す
るとトランジスタの発熱が検出され、ショート箇所の発
熱は検出されない。このため、発熱箇所を特定した後、
回路動作の面から真の故障原因を解明する必要がある。It should be noted that the detected heat-generating portion may not always coincide with the leak portion or the short-circuited portion. For example, if there is a short circuit in the evaluation integrated circuit, a large current may flow through the transistor or the like through the short circuit. In such a case, the short-circuited portion has a smaller voltage drop than the transistor, and therefore generates less heat,
The heat generated in the transistor becomes large. When liquid crystal analysis is performed, the heat generation of the transistor is detected, and the heat generation at the short circuit portion is not detected. Therefore, after identifying the heat generation point,
It is necessary to elucidate the true cause of failure in terms of circuit operation.
【００１４】本発明の請求項１，２記載の発明は、評価
集積回路に入力パターンを入力し、同時に電源電流の増
加を監視し、異常に電源電流が増加した点で入力パター
ンの送出を停止し、微小発熱状態を評価集積回路に塗布
した液晶の光学的変化から検出する。According to the first and second aspects of the present invention, the input pattern is input to the evaluation integrated circuit, at the same time, the increase of the power supply current is monitored, and the transmission of the input pattern is stopped when the power supply current increases abnormally. Then, the minute heat generation state is detected from the optical change of the liquid crystal applied to the evaluation integrated circuit.
【００１５】また、本発明の請求項３，４記載の発明
は、前述した請求項１，２記載の発明において、評価集
積回路に流れる電源電流が設定値を越えているかどうか
の判定を行うのに、評価集積回路の内部回路のスイッチ
ングしている時間帯や動作時の直流的電流が流れている
時間帯を避けることにより、より正確な判定を行う。Further, in the inventions according to claims 3 and 4 of the present invention, in the invention according to claims 1 and 2, it is judged whether or not the power supply current flowing through the evaluation integrated circuit exceeds a set value. In addition, a more accurate determination is performed by avoiding a time zone in which the internal circuit of the evaluation integrated circuit is switching or a time zone in which a direct current flows during operation.
【００１６】以下、実施例により本発明を詳細に説明す
る。The present invention will be described in detail below with reference to examples.
【００１７】[0017]
【実施例】図１は本発明の第１の実施例を説明するため
のブロック図である。同図の評価集積回路１００は、温
度変化型の液晶がチップ表面に塗布された集積回路であ
る。直流オフセット付き正弦波電源１は、評価集積回路
１００の電源端子に印加する電源電圧用の電源で、同時
に入力パターン発生回路２から送出されるパルスの
“Ｈ”レベル用電源としても使用される。電流測定回路
３は、あらかじめ設定された設定電流値を越える電源電
流が流れた場合、入力パターン送出／停止制御回路４へ
電流設定値を越えたことの信号を送る。つぎに、入力パ
ターン送出／停止制御回路４は、入力パターンの送出を
停止する信号を入力パターン発生回路２へ入力する。図
１の温度制御装置５は、評価集積回路１００のチップの
平均温度を液晶の光学的性質が変化する転移温度の直前
の温度に制御する装置である。光学顕微鏡６は、液晶の
光学的性質の変化を利用して、評価集積回路１００の微
少発熱の検出に使用する。1 is a block diagram for explaining a first embodiment of the present invention. The evaluation integrated circuit 100 shown in the figure is an integrated circuit in which a temperature change type liquid crystal is applied to the surface of the chip. The sine wave power supply 1 with DC offset is a power supply for the power supply voltage applied to the power supply terminal of the evaluation integrated circuit 100, and is also used as a power supply for the “H” level of the pulse transmitted from the input pattern generation circuit 2. The current measuring circuit 3 sends a signal that the current setting value is exceeded to the input pattern sending / stopping control circuit 4 when the power supply current exceeding the preset setting current value flows. Next, the input pattern transmission / stop control circuit 4 inputs a signal for stopping the transmission of the input pattern to the input pattern generation circuit 2. The temperature control device 5 of FIG. 1 is a device that controls the average temperature of the chip of the evaluation integrated circuit 100 to a temperature immediately before the transition temperature at which the optical properties of the liquid crystal change. The optical microscope 6 is used to detect the minute heat generation of the evaluation integrated circuit 100 by utilizing the change in the optical property of the liquid crystal.
【００１８】直流オフセット付き正弦波電源１の出力波
形を図３に示す。直流オフセット電圧はＶDD0 、正弦波
電圧はＶｐ・ｓｉｎωｔで、電源の出力ＶDDはそれが加
算されて、ＶDD＝ＶDD0 ＋Ｖｐ・ｓｉｎωｔとなる。こ
の電圧が評価集積回路１００の電源および入力パターン
発生回路２から送出されるパルスの“Ｈ”レベル用電源
として使用される。The output waveform of the sine wave power supply 1 with a DC offset is shown in FIG. The DC offset voltage is V DD0 , the sine wave voltage is Vp · sin ωt, and the output V DD of the power source is added to V DD = V DD0 + Vp · sin ωt. This voltage is used as the power supply of the evaluation integrated circuit 100 and the power supply for the “H” level of the pulse transmitted from the input pattern generation circuit 2.
【００１９】直流オフセット付き正弦波電源１，評価集
積回路１００への電源供給および入力パターン発生回路
２から送出されるパルスの“Ｈ”レベル発生回路の一例
を図４に示す。パルス出力回路２′は、入力パターン発
生回路２の中の１個のパルスの出力回路の例である。こ
のようなパルス出力回路２′は、評価集積回路１００の
入力数だけ設けられる。このパルス出力回路２′の中の
インバータ回路ＩＮＶにはＶDDとは異なる電源電圧ＶCC
が印加される。なお、Ｑはトランジスタ、Ｒは抵抗器で
ある。この例では、評価集積回路１００に印加される入
力パルスの“Ｈ”レベルは評価集積回路１００に印加さ
れる電源電圧ＶDDにほぼ等しくなる。FIG. 4 shows an example of a sine wave power supply with a DC offset 1, a power supply to the evaluation integrated circuit 100, and an "H" level generation circuit of the pulse sent from the input pattern generation circuit 2. The pulse output circuit 2 ′ is an example of an output circuit for one pulse in the input pattern generation circuit 2. Such pulse output circuits 2 ′ are provided as many as the number of inputs of the evaluation integrated circuit 100. The inverter circuit INV in the pulse output circuit 2'has a power supply voltage V CC different from V DD.
Is applied. In addition, Q is a transistor and R is a resistor. In this example, the “H” level of the input pulse applied to the evaluation integrated circuit 100 becomes substantially equal to the power supply voltage V DD applied to the evaluation integrated circuit 100.
【００２０】電源電圧を大幅に変化させる場合に、入力
の“Ｈ”レベルの電圧を固定してしまうと、電源電圧よ
り入力電圧の“Ｈ”レベルが高くなると評価集積回路１
００の入力回路が損傷を受ける場合があり、電源電圧よ
り“Ｈ”レベルが大幅に低くなると評価集積回路１００
の入力回路が正常に動作しない場合がある。このため、
入力電圧の“Ｈ”レベルは図４に示したように電源電圧
ＶDDに追従して変化させている。If the input "H" level voltage is fixed when the power supply voltage is changed significantly, the evaluation integrated circuit 1 will have a higher input voltage "H" level than the power supply voltage.
00 may be damaged, and if the “H” level becomes significantly lower than the power supply voltage, the evaluation integrated circuit 100
The input circuit of may not operate normally. For this reason,
The "H" level of the input voltage is changed following the power supply voltage V DD as shown in FIG.
【００２１】次に、図１のブロック図に従って、試験方
法の手順を説明する。温度制御装置５，光学顕微鏡６
は、評価集積回路１００のチップ表面の微少発熱を検出
できる状態に設定しておく。次に、直流オフセット付き
正弦波電源１の正弦波電圧を０Ｖか０Ｖ付近に設定し、
直流オフセット電圧ＶDD0 のみを評価集積回路１００お
よびパルス出力回路２′に印加する。この状態で、集積
回路用入力パターンを評価集積回路１００に印加し、電
流測定回路３を動作させる。電流測定回路３が設定電流
値を越えたことを判定すると、自動的に入力パターンの
送出が停止し、評価集積回路１００に設定電流値を越え
た電流が流れる状態が保持される。入力パターンの送出
が停止した状態で、直流オフセット付き正弦波電源１の
正弦波電圧を上昇させ、液晶評価による評価集積回路１
００のチップ表面の微少発熱の検出を開始する。Next, the procedure of the test method will be described with reference to the block diagram of FIG. Temperature control device 5, optical microscope 6
Is set in a state in which the minute heat generation on the chip surface of the evaluation integrated circuit 100 can be detected. Next, set the sine wave voltage of the sine wave power supply 1 with a DC offset to 0 V or near 0 V,
Only the DC offset voltage V DD0 is applied to the evaluation integrated circuit 100 and the pulse output circuit 2 '. In this state, the integrated circuit input pattern is applied to the evaluation integrated circuit 100 to operate the current measuring circuit 3. When the current measuring circuit 3 determines that the current exceeds the set current value, the output of the input pattern is automatically stopped, and the state in which the current exceeding the set current value flows in the evaluation integrated circuit 100 is maintained. The evaluation integrated circuit 1 based on the liquid crystal evaluation is performed by increasing the sine wave voltage of the sine wave power supply 1 with a DC offset in a state where the input pattern transmission is stopped.
The detection of slight heat generation on the chip surface of 00 is started.
【００２２】図２は本発明の第２の実施例を説明するた
めのブロック図である。図１との違いは、禁止パルス発
生回路７を追加した点である。図１の電流測定回路３に
流れる電流には、リーク箇所，ショート箇所に流れる異
常電流の他に、評価集積回路１００がスイッチングする
ときのスイッチング電流が含まれ、さらに、評価集積回
路１００によっては動作時の直流的電流も含まれる。こ
のため、検出したいリーク電流の値が小さい場合は、上
記のスイッチング電流、あるいは動作時の直流的電流に
埋もれて検出できなくなる。図２の禁止パルス発生回路
７は、上記のスイッチング電流，動作時の直流的電流の
影響を除外する回路である。図５に禁止パルスの波形の
一例を示す。この図で、Ｔは入力パターンのサイクルタ
イム、Ｄは入力パターンの停止を禁止する時間帯あるい
は電流測定を禁止する時間帯、Ｅは入力パターン停止可
能時間帯あるいは電流測定時間帯である。図２の入力パ
ターン発生回路２で発生する入力パルスの遅延時間，パ
ルス幅を調整することにより、図５のＥの時間帯には評
価集積回路１００にスイッチング電流および動作時の直
流電流が流れないような範囲に設定する。FIG. 2 is a block diagram for explaining the second embodiment of the present invention. The difference from FIG. 1 is that an inhibit pulse generation circuit 7 is added. The current flowing through the current measuring circuit 3 in FIG. 1 includes a switching current when the evaluation integrated circuit 100 switches in addition to an abnormal current flowing through a leak point or a short point. The direct current of time is also included. For this reason, when the leak current value to be detected is small, it cannot be detected because it is buried in the switching current or the direct current during operation. The inhibition pulse generation circuit 7 of FIG. 2 is a circuit for eliminating the influence of the switching current and the direct current during operation. FIG. 5 shows an example of the waveform of the inhibition pulse. In this figure, T is the cycle time of the input pattern, D is the time zone in which the stop of the input pattern is prohibited or the time zone in which the current measurement is prohibited, and E is the input pattern stoppable time zone or the current measurement time zone. By adjusting the delay time and pulse width of the input pulse generated by the input pattern generation circuit 2 of FIG. 2, no switching current and no DC current during operation flow through the evaluation integrated circuit 100 during the time zone E of FIG. Set it in such a range.
【００２３】なお、評価集積回路１００の内部回路のス
イッチング動作は比較的短時間に終了するため、スイッ
チング電流の流れる時間帯も短い。このため、スイッチ
ング電流の流れない時間帯を抽出することは容易であ
る。Since the switching operation of the internal circuit of the evaluation integrated circuit 100 is completed in a relatively short time, the time period during which the switching current flows is short. Therefore, it is easy to extract the time zone in which the switching current does not flow.
【００２４】図２の禁止パルス発生回路７の出力である
禁止パルスは、入力パターンの停止を禁止する場合は、
図２の経路Ａで入力パターン送出／停止制御回路４へ入
力し、電源電流測定を禁止する場合は経路Ｂで電流測定
回路３へ入力する。いずれの入力方法でも効果は同じで
ある。The prohibition pulse output from the prohibition pulse generation circuit 7 of FIG. 2 is used to prohibit the stop of the input pattern.
It is input to the input pattern sending / stopping control circuit 4 via the path A in FIG. 2, and is input to the current measuring circuit 3 via the path B when the power supply current measurement is prohibited. The effect is the same regardless of the input method.
【００２５】以上のような構成にすると、スイッチング
電流，動作時の直流的電流の影響を受けず、電流測定回
路を動作させることができる。With the above configuration, the current measuring circuit can be operated without being affected by the switching current and the direct current during operation.
【００２６】[0026]
【発明の効果】本発明にかかる請求項１，２に記載の発
明は、評価集積回路に入力パターンを入力し、同時に電
源電流の増加を監視し、異常に電源電流が増加した点で
入力パターンの送出を停止し、微小発熱状態を評価集積
回路に塗布した液晶の光学的変化から検出するようにし
たので、評価集積回路内部にリーク箇所，ショート箇所
等の異常箇所を内在する場合、その異常箇所に電流が流
れる状態に評価集積回路の内部状態を固定することがで
きるため、液晶による発熱箇所の検出が容易となり、集
積回路の故障解析，特性解析に利用できる。According to the first and second aspects of the present invention, the input pattern is input to the evaluation integrated circuit, the increase of the power supply current is monitored at the same time, and the input pattern is abnormally increased. Is stopped and the minute heat generation state is detected from the optical change of the liquid crystal applied to the evaluation integrated circuit. Therefore, if there is an abnormal point such as a leak point or a short point inside the evaluation integrated circuit, the abnormality will be detected. Since the internal state of the evaluation integrated circuit can be fixed to the state in which the current flows to the location, it becomes easy to detect the location of heat generation by the liquid crystal, which can be used for failure analysis and characteristic analysis of the integrated circuit.
【００２７】さらに、請求項３，４に記載の発明は、前
述した請求項１，２記載の発明において、評価集積回路
に流れる電源電流が設定値を越えているかどうかの判定
を行うのに、評価集積回路の内部回路のスイッチングし
ている時間帯や動作時の直流的電流が流れている時間帯
を避けるようにしたので、スイッチング電流，動作時の
直流的電流の影響を受けずに、電流測定を行うことがで
きる。Further, in the inventions according to claims 3 and 4, in the inventions according to claims 1 and 2 described above, it is determined whether or not the power supply current flowing through the evaluation integrated circuit exceeds a set value. The internal circuit of the evaluation integrated circuit is designed to avoid the time zone during switching and the time zone during which direct current flows during operation, so that the current is not affected by the switching current and direct current during operation. A measurement can be made.
【図１】本発明の一実施例の構成を示すブロック図であ
る。FIG. 1 is a block diagram showing a configuration of an exemplary embodiment of the present invention.
【図２】本発明の他の実施例の構成を示すブロック図で
ある。FIG. 2 is a block diagram showing the configuration of another embodiment of the present invention.
【図３】図１，図２の直流オフセット付き正弦波電源の
出力電圧波形を示す図である。FIG. 3 is a diagram showing an output voltage waveform of the sine wave power source with DC offset shown in FIGS. 1 and 2.
【図４】直流オフセット付き正弦波電源，評価集積回路
への電源供給および入力パターン発生回路の一例を示す
図である。FIG. 4 is a diagram showing an example of a sine wave power supply with a DC offset, power supply to an evaluation integrated circuit, and an input pattern generation circuit.
【図５】図２の禁止パルス発生回路の出力波形を示す図
である。5 is a diagram showing an output waveform of the inhibit pulse generating circuit of FIG.
１ 直流オフセット付き正弦波電源 ２ 入力パターン発生回路 ３ 電流測定回路 ４ 入力パターン送出／停止制御回路 ５ 温度制御装置 ６ 光学顕微鏡 ７ 禁止パルス発生回路 １００ 評価ディジタル集積回路 Ｔ 入力パターンのサイクルタイム Ｄ 入力パターンの停止を禁止する時間帯あるいは
電流測定を禁止する時間帯 Ｅ 入力パターン停止可能時間帯あるいは電流測定
時間帯1 DC offset sine wave power supply 2 Input pattern generation circuit 3 Current measurement circuit 4 Input pattern transmission / stop control circuit 5 Temperature control device 6 Optical microscope 7 Inhibit pulse generation circuit 100 Evaluation digital integrated circuit T Input pattern cycle time D Input pattern For prohibiting stop of current or for prohibiting current measurement E Input pattern stoptable time or current measurement time
Claims (4)
び入力パルスの“Ｈ”レベル発生用電圧として印加する
ための直流オフセット付き正弦波電源と、前記評価ディ
ジタル集積回路の入力に印加する入力パルスの“Ｈ”レ
ベルが前記電源電圧の変化に比例して変化するパルスを
発生する入力パターン発生回路と、前記評価ディジタル
集積回路に流れる電流を測定する電流測定回路と、電源
電流が設定値を越えた場合に入力パターンの送出を停止
する入力パターン送出／停止制御回路と、前記評価ディ
ジタル集積回路のチップ表面に塗布された温度変化型液
晶の微少発熱点を検出するための光学顕微鏡と、前記評
価ディジタル集積回路のチップに塗布した液晶の光学的
性質が変化する転移温度の直前の温度に前記評価ディジ
タル集積回路の平均温度を設定するための温度制御装置
とを備えたことを特徴とする集積回路の試験装置。1. A sine wave power source with a DC offset for applying as a power supply voltage of an evaluation digital integrated circuit and a voltage for generating an "H" level of an input pulse, and an input pulse "" applied to an input of the evaluation digital integrated circuit. An input pattern generation circuit that generates a pulse whose H "level changes in proportion to a change in the power supply voltage, a current measurement circuit that measures a current flowing through the evaluation digital integrated circuit, and a case where the power supply current exceeds a set value. An input pattern sending / stopping control circuit for stopping the sending of an input pattern, an optical microscope for detecting a minute heat generation point of a temperature change type liquid crystal applied to the chip surface of the evaluation digital integrated circuit, and the evaluation digital integrated circuit. The average of the evaluated digital integrated circuit at a temperature just before the transition temperature at which the optical properties of the liquid crystal applied to the chip of the circuit change. An integrated circuit testing device, comprising: a temperature control device for setting a temperature.
温度変化型液晶を塗布し、この評価ディジタル集積回路
のチップに塗布した液晶の光学的性質が変化する転移温
度の直前の温度に前記評価ディジタル集積回路の平均温
度を設定し、前記評価ディジタル集積回路に直流オフセ
ット付き正弦波電圧を電源電圧として印加し、“Ｈ”レ
ベルが前記電源電圧の変化に比例して変化するパルスを
入力パターンとして印加し、前記電源の正弦波電圧を０
Ｖあるいは０Ｖ近くまで低下させた場合に、前記評価デ
ィジタル集積回路に流れる電源電流が設定値を越えてい
るかどうかを判定し、設定値を越えた場合に前記入力パ
ターンの送出を停止し、次に、前記正弦波電圧を上昇さ
せた後、設定値を越えた電源電流が流れていることによ
る前記評価ディジタル集積回路のチップ表面の微少発熱
箇所を、液晶の光学的性質を利用して光学顕微鏡を用い
て検出することを特徴とする集積回路の試験方法。2. A temperature-changeable liquid crystal is applied to the chip surface of the evaluation digital integrated circuit, and the evaluation digital integration is performed at a temperature just before a transition temperature at which the optical properties of the liquid crystal applied to the evaluation digital integrated circuit chip change. An average temperature of the circuit is set, a sine wave voltage with a DC offset is applied as a power supply voltage to the evaluation digital integrated circuit, and a pulse whose "H" level changes in proportion to the change of the power supply voltage is applied as an input pattern. , The sine wave voltage of the power source is 0
It is determined whether or not the power supply current flowing through the evaluation digital integrated circuit exceeds a set value when the voltage is reduced to V or near 0V, and when the set current is exceeded, the transmission of the input pattern is stopped, After increasing the sine wave voltage, a minute heat generation point on the chip surface of the evaluation digital integrated circuit due to a power supply current exceeding a set value flows, and an optical microscope is used to make use of the optical property of liquid crystal. A method for testing an integrated circuit, which is characterized by detecting by using.
び入力パルスの“Ｈ”レベル発生用電圧として印加する
ための直流オフセット付き正弦波電源と、前記評価ディ
ジタル集積回路の入力に印加する入力パルスの“Ｈ”レ
ベルが前記電源電圧の変化に比例して変化するパルスを
発生する入力パターン発生回路と、前記評価ディジタル
集積回路に流れる電流を測定する電流測定回路と、電源
電流が設定値を越えた場合に入力パターンの送出を停止
する入力パターン送出／停止制御回路と、前記評価ディ
ジタル集積回路の内部回路がスイッチングしている時間
帯および動作時の直流的電流が流れている時間帯に前記
入力パターンの停止を禁止する禁止パルス発生回路と、
前記評価ディジタル集積回路のチップ表面に塗布された
温度変化型液晶の微少発熱点を検出するための光学顕微
鏡と、前記評価ディジタル集積回路のチップに塗布した
液晶の光学的性質が変化する転移温度の直前の温度に前
記評価ディジタル集積回路の平均温度を設定するための
温度制御装置とを備えたことを特徴とする集積回路の試
験装置。3. A sine wave power supply with a DC offset for applying as a power supply voltage of the evaluation digital integrated circuit and a voltage for generating an "H" level of the input pulse, and an input pulse "" applied to the input of the evaluation digital integrated circuit. An input pattern generation circuit that generates a pulse whose H "level changes in proportion to a change in the power supply voltage, a current measurement circuit that measures a current flowing through the evaluation digital integrated circuit, and a case where the power supply current exceeds a set value. And an input pattern sending / stopping control circuit for stopping the sending of the input pattern, and the input pattern of the input pattern during the time when the internal circuit of the evaluation digital integrated circuit is switching and the time when a direct current during operation is flowing. A prohibition pulse generation circuit that prohibits stop,
An optical microscope for detecting a minute heat generation point of the temperature change type liquid crystal applied to the chip surface of the evaluation digital integrated circuit, and a transition temperature at which the optical property of the liquid crystal applied to the evaluation digital integrated circuit chip changes. A temperature control device for setting an average temperature of the evaluation digital integrated circuit to a temperature immediately before, an integrated circuit testing device.
温度変化型液晶を塗布し、この評価ディジタル集積回路
のチップに塗布した液晶の光学的性質が変化する転移温
度の直前の温度に前記評価ディジタル集積回路の平均温
度を設定し、前記評価ディジタル集積回路に直流オフセ
ット付き正弦波電圧を電源電圧として印加し、“Ｈ”レ
ベルが前記電源電圧の変化に比例して変化するパルスを
入力パターンとして印加し、前記電源の正弦波電圧を０
Ｖあるいは０Ｖ近くまで低下させた場合に、前記評価デ
ィジタル集積回路の内部回路がスイッチングしている時
間帯および動作時の直流的電流が流れている時間帯を除
いた時間帯において、前記評価ディジタル集積回路に流
れる電源電流が設定値を越えているかどうかを判定し、
設定値を越えた場合に前記入力パターンの送出を停止
し、次に、前記正弦波電圧を上昇させた後、設定値を越
えた電源電流が流れていることによる前記評価ディジタ
ル集積回路のチップ表面の微少発熱箇所を液晶の光学的
性質を利用して光学顕微鏡を用いて検出することを特徴
とする集積回路の試験方法。4. A temperature-changeable liquid crystal is applied to the chip surface of the evaluation digital integrated circuit, and the evaluation digital integration is performed at a temperature just before a transition temperature at which the optical properties of the liquid crystal applied to the evaluation digital integrated circuit chip change. An average temperature of the circuit is set, a sine wave voltage with a DC offset is applied as a power supply voltage to the evaluation digital integrated circuit, and a pulse whose "H" level changes in proportion to the change of the power supply voltage is applied as an input pattern. , The sine wave voltage of the power source is 0
When the voltage is lowered to V or near 0 V, the evaluation digital integrated circuit is used in a time period excluding a time period in which the internal circuit of the evaluation digital integrated circuit is switching and a time period in which a direct current during operation is flowing. Determine whether the power supply current flowing in the circuit exceeds the set value,
When the output exceeds the set value, the output of the input pattern is stopped, and after the sinusoidal voltage is increased, the chip surface of the evaluation digital integrated circuit is caused by the supply current exceeding the set value. The method for testing an integrated circuit, which is characterized in that the minute heat generation point of is detected by using an optical microscope by utilizing the optical property of liquid crystal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3261305A JP2603380B2 (en) | 1991-09-13 | 1991-09-13 | Test apparatus and test method for integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3261305A JP2603380B2 (en) | 1991-09-13 | 1991-09-13 | Test apparatus and test method for integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0574911A true JPH0574911A (en) | 1993-03-26 |
| JP2603380B2 JP2603380B2 (en) | 1997-04-23 |
Family
ID=17359947
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3261305A Expired - Fee Related JP2603380B2 (en) | 1991-09-13 | 1991-09-13 | Test apparatus and test method for integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2603380B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999040446A1 (en) * | 1998-02-05 | 1999-08-12 | Advantest Corporation | Current measuring method, current sensor, and ic tester using the same current sensor |
| US6801049B2 (en) | 2000-04-04 | 2004-10-05 | Advantest Corporation | Method and apparatus for defect analysis of semiconductor integrated circuit |
| JP2011109607A (en) * | 2009-11-20 | 2011-06-02 | Seiko Epson Corp | Circuit device, electronic equipment, and method for supplying power |
| CN115621147A (en) * | 2022-12-08 | 2023-01-17 | 无锡美科微电子技术有限公司 | Wafer detection method and device and electronic equipment |
-
1991
- 1991-09-13 JP JP3261305A patent/JP2603380B2/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999040446A1 (en) * | 1998-02-05 | 1999-08-12 | Advantest Corporation | Current measuring method, current sensor, and ic tester using the same current sensor |
| GB2340233A (en) * | 1998-02-05 | 2000-02-16 | Advantest Corp | Current measuring method,current sensor,and IC tester using the same current sensor |
| US6801049B2 (en) | 2000-04-04 | 2004-10-05 | Advantest Corporation | Method and apparatus for defect analysis of semiconductor integrated circuit |
| JP2011109607A (en) * | 2009-11-20 | 2011-06-02 | Seiko Epson Corp | Circuit device, electronic equipment, and method for supplying power |
| CN115621147A (en) * | 2022-12-08 | 2023-01-17 | 无锡美科微电子技术有限公司 | Wafer detection method and device and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2603380B2 (en) | 1997-04-23 |
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