JPH0574176A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To effectively restrain a penetration current and to achieve a flexible and high-integration CAM operation by a method wherein the gate voltage of a selection transistor is controlled so as to be within a prescribed range by means of a previously formed threshold value. CONSTITUTION:Data lines 1a to 1b, 2a to 2b are connected and not connected respectively to a coincidence retrieval line 16 according to the electrical connection state of memory cells 11a to 11b, 12a to 12b. At this time, the threshold voltage of a transistor 14 is formed previously to be a prescribed voltage in a manufacturing process. When a coincidence is retrieved, a connection means 21 is made active, a selection word line 15 which has been connected to the gate electrode of the transistor 14 and the coincidence retrieval line 16 are initialized to a floating high state by using a floating means 20. Thereby, it is possible to control the gate voltage of the transistor 14 so as to be within a prescribed range and to restrain a penetration current between a coincidence cell and a noncoincidence cell.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a CAM (Content Addr
essable Memory: content access memory).

[0002]

2. Description of the Related Art Conventionally, a complete parallel type CAM (content access memory) has been used as a semiconductor memory circuit having a function of performing coincidence detection of search data and stored data in parallel for all bits and outputting a stored address or data of the matched data. :
Content Addressable Memory (also called associative memory)
Is well known (edited by Takuo Kanno, edited by Tetsuya Iizuka, "CM
Design of OS VLSI "Baifukan, P176-P177).

However, the configuration example per bit of the conventional CAM is composed of an SRAM cell and an exclusive NOR circuit, and it is impossible to construct a CAM having a large cell size and a practical capacity. Met.

In the case of IC cards and the like as personal databases that have been commercialized in recent years, the CA as described above is used.
RO with pre-stored data instead of M configuration
The structure is such that the data of M (read only memory) is sequentially searched one by one to find the desired data. For this reason, the more data such as the Japanese dictionary and the English-Japanese dictionary, the more time it takes to perform a search, and there is no one that has a fast and flexible search function.

However, US Pat. No. 3,701,980 (US Pat. No. 3,701,980) suggests the possibility of a large capacity associative memory.
Patent 3,701,980, Oct. 1972) or JP-A-1-194
The invention described in Japanese Patent Laid-Open No. 196 can be mentioned. First, the former US patent is based on DRAM and has the structure of a CAM cell in which a normal 2-bit memory is one set, and the latter is based on EPROM non-volatile memory. The CAM is composed of a set of 2 bits. Therefore, both are SRA
Higher integration is possible than M-based CAM. However, DRAM-based ones still have area problems.
Further, EPROM-based ones cannot be flexibly written and read.

[0006]

As described above, an effective means for realizing a highly integrated and flexible CAM has not yet been found.

Therefore, an object of the present invention is to provide a semiconductor integrated circuit which enables flexible and highly integrated CAM.

[0008]

To achieve the above object, a first aspect of the present invention includes a first storage cell defining an electrical connection from a first data line to a match search line, Second
Second memory cell that defines electrical disconnection from the data line of the first data line to the coincidence search line, and the first data line and the second memory cell according to the connection definition state of the first and second memory cells. A select transistor for connecting and disconnecting each of the data lines to and from the coincidence search line, and the threshold voltage of the select transistor has a predetermined value created in the manufacturing process. An integrated circuit is provided.

It is desirable that a current drive type sense amplifier is connected to the match search line so that the gate voltage Vw of the select transistor satisfies the following condition at the time of match search. Vt ≦ Vw ≦ Vs + Vt ′ where Vt: threshold voltage of the select transistor (source O
V bias: Vs: potential of match detection line at match / mismatch search Vt ': threshold voltage of select transistor source biased at match / mismatch detection

A second aspect of the invention is a first memory cell defining an electrical connection from a first data line to a match search line and an electrical connection from a second data line to the match search line. A second storage cell defining a non-connection and these first and second storage cells
Connected to a select transistor for connecting and disconnecting the first data line and the second data line to and from the coincidence search line according to the connection definition state of the memory cell, and a gate electrode of the select transistor. It has connection means for electrically connecting the select word line and the match search line, and floating means for floating the select word line, and activates the connection means at the time of match search, and is connected by this connection means. The present invention provides a semiconductor integrated circuit characterized in that the select word line and the coincidence search line are initialized to a floating high state.

Further, it is preferable that the threshold voltage of the select transistor has a predetermined value created in the manufacturing process, and further, the gate voltage Vw of the select transistor at the time of matching search satisfies the following condition. It is preferable to configure. Vt ≦ Vw ≦ Vh + Vt ′ where Vt: threshold voltage of the select transistor (source O
Vh) Vh: H (high) potential of the data line at the time of matching / mismatch search Vt ': Threshold voltage of the select transistor source biased at the time of matching / mismatch detection

In each of the above aspects, it is preferable that the built-in threshold voltage Vt of the select transistor (during source OV bias) is set higher than that of the peripheral circuit.

[0013]

In the semiconductor integrated circuit according to the first aspect of the present invention, the threshold voltage of the select transistor that selects each memory cell is set to a predetermined value in the manufacturing process. Therefore, the gate voltage of this select transistor is controlled so that it becomes a voltage within a predetermined range limited by the built-in threshold voltage, and a match-through current at the time of match / mismatch detection is detected. Can be suppressed.

In the semiconductor integrated circuit according to the second aspect of the present invention, the select word line connected to the gate electrode of the select transistor of each memory cell and the coincidence search line are electrically connected through a connecting means, and By floating the select word line, it is possible to suppress a through current between a matching cell and a mismatching cell at the time of detecting a match or a mismatch. Here, in the case where the threshold voltage of the select transistor is set to a predetermined value in the manufacturing process, the shoot-through current is controlled by controlling the gate voltage of the select transistor to be within the predetermined range. Can be further suppressed.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, before entering the description of the present invention, a flash EE of a 2-bit 1-set CAM newly considered will be described with reference to FIG.
The problems in the PROM memory structure will be described.

In the figure, the memory pair 31 in which the memory cells 31a and 31b are one set and the memory pair 32 in which the memory cells 32a and 32b are one set are one CAM cell each. The example given in this example is called a stack cell structure, in which the control gate 34 is laminated immediately above the floating gate 33 for accumulating charges, and has a structure suitable for high integration. ..

FIG. 4 shows variations in the threshold voltage Vt depending on the charge storage state of the floating gate 33 of each memory cell. The low threshold voltage Vt (L) of a memory cell having a normal stack structure is 0.5 to 3.5.
It is about V and has a variation of about 3V. It is said that it is extremely difficult in terms of structure or manufacturing to further suppress this variation. However, in the case of the CAM structure, this variation is fatal. The following explanation will be continued with this point as one of the issues.

Electrons are injected into the floating gate 33 of the memory cell 31a, and the high threshold voltage Vt (H).
(This is defined as data “0” L (low)), but the memory cell 31b has the inverted low threshold voltage Vt (L).
The memory cell 32a has a low threshold voltage Vt (L), and the memory cell 32b has a high threshold voltage Vt (H). .. That is, “0” L (row) data is stored in the CAM cell formed by the memory pair 31 as the CA of the memory pair 32.
It is assumed that “1” H (high) data is defined in M. In this state, the matching search data 39 is added to each CAM cell.
Consider a case where "0" L (row) and "0" L (row) of the data of 1 are detected to match.

First, the ground transistor 38 is turned off,
The match search sense amplifier 37 is activated. The coincidence search amplifier 37 is a current drive type amplifier and has a drive capability by itself. Therefore, the match search line 36 is 1.
The potential is set to about 5 to 2.0V. It is desirable that this set potential has a small value so as not to affect the accumulated charge of the floating gate 33, and it is generally considered that 2 V or less is essential.

Here, as a general CAM operation, the charges of the high-potential precharged match search line are not matched CA.
The data line of the M cell is discharged by "0" L (low) and is changed to a low potential. A match search line that has caused this change indicates a mismatch, and conversely, a match search line that maintains a high potential without a change in potential indicates a match. In this example, memory pair 3
The data “1” H (high) of the second CAM cell is different from the search data “0” L (low), and the coincidence search line 36 is discharged by the data line 2a (“0” L (row)), so that the potential is low. Becomes

As a specific search operation, the data line 1a
Is applied with 0 V of "0" L (low) potential of the match search data, and 1.5 to 2.0 V of opposite "1" H (high) potential is applied to the data line 1b. Similarly, 0V of the “0” L (low) potential of the match search data is applied to the data line 2a.
Is applied, and the opposite "1" H (high) potential of 1.5 to 2.0 V is applied to the data line 2b. Also at this time,
For the above reason, the potential in the high state is set as low as about 1.5 to 2.0V.

In this state, when the select word line 35 becomes active, the threshold voltage Vt becomes Vt (H) (>
(6.5 V: see FIG. 4) memory cells 31a and 32b are kept in the off state. However, the memory cell 31b and the memory cell 32a operate differently.

First, attention is paid to the memory cell 32a. The memory cell 32a must be turned on in order to extract the charge from the match search line 36 and detect the mismatch. However, the threshold voltage Vt of this transistor
Has a value of 0.5 to 3.5 V (see FIG. 4). Also,
At this time, the source electrode side becomes the data line 2b, and 0V is applied. Therefore, the voltage Vw of the select word line 35 needs to be 3.5 V or more, and normally, about 4.5 V, which is higher by about 1 V, seems appropriate.

That is, the voltage Vw of the select word line 35
Only when ≧ 4.5V, the potential of the match search line 36 is dropped by the 0V potential of the data line 2a. On the other hand, the match search sense-up 37 is a current drive type and has drive capability. Therefore, the potential of the match search line 36 finally drops to about 1.0 to 1.5 V, and the mismatch is detected by the voltage drop of about 0.5 V. Of course, this potential drop detects a mismatch, but the memory cell 31 of the CAM cell storing the match data is detected by this.
Inconvenience will occur in b.

Considering the potential of each of the three electrodes (drain, gate, source) of the memory cell 31b, first, the gate is 4.5 V or more of the select word line 35, and the source is the potential of the coincidence search line 35 of 1. 0 to 1.5V, and the drain becomes 1.5 to 2.0V of the data line. That is,
The gate-source potential difference VGS of this transistor is 3.
It becomes 0-3.5 (4.5- (1.0-1.5)) V or more.

The threshold voltage Vt of the memory cell 31b is at least 0.5V (see FIG. 4). That is, VGS (= 3.0 to 3.5)> Vt (= 0.5), and the memory cell 3 due to the substrate bias effect at this time is obtained.
Even considering the increase in the threshold voltage of 1b, the transistor of the memory cell 31b is turned on. For this reason,
A through current flows from the high potential of the data line 1b to the low potential of the data line 2a.

In the case of an associative memory, generally, the matching search operation is simultaneously performed over a plurality of select word lines. Therefore, the shoot-through current in each select word line becomes an extremely large value in the entire chip, which is a fatal problem of inoperability. Further, the high potential of the data line 1b raises the potential of the data coincidence search line 35, which causes a problem that the potential difference detection by the coincidence search sense amplifier 37 becomes difficult.

Based on such a new consideration, the semiconductor integrated circuit according to the present invention will be specifically described with reference to the accompanying drawings. FIG. 1 shows a first embodiment of the present invention. The memory cell shown in FIG. 1 is called a non-volatile memory having a MONOS structure, and is a memory transistor 1 for storing data.
3 and its select transistor 14. Depending on whether or not electrons are trapped in the nitride film forming the memory transistor 13, enhancement type or depletion type transistor characteristics are shown. on the other hand,
The memory transistor 13 and the select transistor 14 provided in the series are enhancement-type transistors manufactured in a normal manufacturing process.

The present invention focuses on the fact that the variation in the threshold voltage Vt of the select transistor 14 is extremely small, and proposes a new associative memory structure in which electrical interference between memory cells during matching search is suppressed. ..

As an example, negative charges are accumulated in the memory transistor 13 of the memory cell 11a shown in FIG.
The inverted data of the (low) state is written in the memory cell 11b. In addition, positive charges are accumulated in the memory transistor 13 of the memory cell 12a and the "1" H (high) state is obtained, and its inverted data is written in the memory cell 12b. The memory cells 11a and 11b and the memory cells 12a and 12b form a memory pair 11 and a memory pair 12, respectively, and are 2-bit CAM cells.

Each memory cell 11a, 11b, 12a, 1
The gate electrode of the select transistor 14 of 2b is the same select word line 15 and the source electrode is the match search line 1
Connected to 6. Further, the match search line 16 is provided with a match search sense amplifier 17 and a ground transistor 18.

Here, regarding the injection of electrons (accumulation of negative charges) and the extraction of electrons (accumulation of positive charges) to the memory gate of the memory transistor 13 of the memory cell, Takaak is explained.
i Nozaki et al., ”A 1-Mb EEPROM with MONOS Memory
Cell for Semiconductor Disk Application, "IEEE JS
solid-State Circuits, vol26, no., pp.497-501, Apr.199
Detailed in 1. Also, illustration of the control line of the memory transistor 13 is omitted.

First, the data read operation of the memory cell will be briefly described. The normal read operation is performed using the selection circuit 5 and the sense amplifier 6 provided ahead of the data lines 1a, 1b, 2a, 2b. The selection circuit 5 connects the sense amplifier 6 to the data line 1b. This amplifier is a current detection type, and the data line 1b is kept at 1.5 to 2.0 V when not read. Next, 5V is applied to the select word line 15 to turn on the select transistor 14 of the memory cell 11b. On the other hand, positive charges are accumulated in the memory transistor 13, the memory transistor 13 is a depletion type, and it is turned on even if the voltage applied to the memory gate is 0V. Therefore, both the memory transistor 13 and the select transistor 14 provided in series between the data line 1b and the match search line 16 are turned on. At this time, the coincidence search line 16 is fixed to the ground potential by the ground transistor 18, and therefore the potential of the data line 1b decreases and changes to about 1.0 to 1.5V. This change is detected by the sense amplifier 6 and the result is output. Here, the reason why the potential of the data line 1b is set to 2 V or less is to suppress the influence on the charge accumulated in the memory transistor at the time of data reading.

Next, the coincidence detecting operation will be described. First, data is written by using the memory cells 11a, 11b, 12a, and 12b as a pair of memory cells of two cells. This set does not necessarily have to be adjacent memory cells, but in this example, contradictory data is written to the adjacent cells for ease of explanation.

The CAM cell formed by the memory pair 11 is "0" L (low), and the CAM cell of the memory pair 12 is "1" H (high). The match search data 19 is to detect "0" L (row) and "0" L (row) in the memory pairs 11 and 12, respectively. Therefore, the CAM cell data of the memory pair 11 matches the search data, but the CAM cell data of the memory pair 12 does not match.

First, "0" L (low) is applied to the data line 1a and "1" H (high) is applied to the data line 1b,
"0" L (low) is applied to the data line 2a, and "1" H (high) is applied to the data line 2b. Further, the ground transistor 18 is turned off, and the match search line 16 is set to the "1" H (high) state.

In this state, the select word line 15 is "1".
When it becomes H (high), a voltage of "1" H (high) is applied to the gate of the select transistor 14 of each of the memory cells 11a, 11b, 12a, 12b forming the memory pair 11, 12.

Regarding the memory cells 11a and 12b, the memory transistor 13 is of the enhancement type because it stores electrons, and the memory gate is applied with 0V and kept in the off state, as in the above-described data reading. Therefore, the "0" L (low) state of the data line 1a and the "1" H (high) state of the data line 2b are the match search line 16
Does not affect. However, this is different in the case of the memory cell 11b and the memory cell 12a in which the memory transistor 13 is the depletion type. In particular,
Setting the voltage value of "0" L (low) or "1" H (high) is an important problem.

A specific description will be given below. First, in the case of the memory cell 12a, the accumulated data "1" H (high) is different from the search data "0" L (low). Therefore, data line 2
It is necessary to extract the charges in the “1” H (high) state of the match search line 16 depending on the “0” L (low) state of a.

Here, it is assumed that the data line 2a is set to 0 V (L state), the match search line 16 is set to 1.5 to 2.0 V (H state), and the select word line is set to 5 V (H state). It is assumed that it is applied. Then, the source-gate potential difference VGS of the select transistor 14 of the memory cell 12a becomes 5V. That is, VGS = (H voltage of select word line 15)-(L voltage of data line 2a) = 5-0 = 5 Also, the threshold voltage V of this select transistor 14
t is about 0.8 V like the threshold value of the peripheral transistor.

Therefore, 5V> threshold voltage Vt = 0.8
V, and the select transistor 1 of the memory cell 12a
4 turns on and lowers the potential of the match search line 16. The coincidence search sense amplifier is also a current detection type amplifier like the sense amplifier 6 at the time of data reading, and a voltage drop occurs due to the current drawing from the data line 2a, and 1.0 to 1.5.
It falls to a potential of about V.

On the other hand, in the case of the memory pair 11, the accumulated data "0" L (row) and the search data "0" L (row) match each other, and the data line 1b and the matching search line 16 are not connected. Need to keep.

However, the selection word line 15 has 5
V is applied, and the mismatch potential of the match search line 16 is 1.0 to
Assuming that the voltage is 1.5 V, the source-gate potential difference VGS of the select transistor 14 of the memory cell 11b is VGS = 5- (1.0-1.5) = 4.0-3.5> 0.
8 (the threshold voltage Vt of the select transistor), and even considering the rise of the threshold voltage Vt due to the substrate bias effect, the select transistor 14 of the memory cell 11b is turned on and the data line 1b and the coincidence search line 16 become Connected. That is, the "1" H (high) potential of 1.5 to 2.0 V of the data line 1b and the "0" L (low) potential of 0 V of the data line 2a are conducted, and a through current flows.

Although the process up to this point is the same as the above-mentioned examination, in the present invention, the control using the select transistor built in the semiconductor manufacturing process is performed. Therefore, the select word voltage Vw or the select transistor 14
This problem can be solved very easily by controlling the threshold voltage Vt of. This will be explained below.

First, in the above example, the select word voltage Vw
Was set to 5V, but this does not need to be set so high,
It may be higher than the threshold voltage Vt of the select transistor 14. However, if you set it too low, the search speed will slow down. In addition, the upper limit of the memory cell 11b in which the potential (1.0 to 1.5 V) of the coincidence search line 16 dropped by the select transistor 14 of the memory cell 12a is the source electrode and the word voltage Vw of the select word line 15 is the gate potential is used. It is possible to raise the word voltage Vw to a voltage difference that does not turn on the select transistor 14.

When this is expressed by an equation, Vw> Vt (0.8V) Vw− (1.0 to 1.5) <Vt ′ where Vt ′ = Vt + ΔV (substrate bias effect amount, about 1V), that is, Vt <Vw <(potential when the match search lines do not match) + Vt ′ Formula (1)

That is, if the word voltage of the select word line 15 is selected to be, for example, a little less than 3V during the matching search operation, only the select transistor 14 of the memory cell 12a is turned on and the select transistor 14 of the memory cell 11b is turned off. You can As a result, the "1" H (high) potential of the data line 11b is changed from 1.5 to 2.0 V to the data line 2
It is possible to suppress the through current to the "0" L (low) potential 0V of a and suppress the deterioration of the search speed to such an extent that it does not pose a practical problem.

This is impossible in the conventional nonvolatile type associative memory, and the structure for controlling the select gate transistor having the threshold voltage built in the manufacturing process is used and the select word is selected in the match search operation. This is possible by properly selecting the word voltage of the line.

Further, as can be seen from the equation (1), the threshold voltage Vt of the select gate transistor is set to about 3.0 V, so that 3.0 <Vw <(1.0-1. 5) + (3.0 + 1), and it is also possible to set the word voltage Vw to about 5V and set it to the same voltage as when reading data. By doing so, the control of the select word line voltage can be simplified.

Next, a second embodiment of the present invention is shown in FIG. This is also an associative memory having a structure for controlling the select transistor 14 having the threshold voltage Vt created in the manufacturing process.

The difference from the first embodiment is that there is a tri-state buffer 20 for floating the select word line 15 at the time of data matching search and a connection means 21 for connecting the matching search line 16. Memory cells 11a, 11
The memory states of b, 12a and 12b are the same as those in the first embodiment.

Further, the match search sense amplifier 27 lowers the potential due to the pre-charged charge of the match search line 16 being extracted by the "0" L (low) potential 0V of the data line 2a connected to the memory cell 12a. Is not detected, and there is no steady search current instead of the current drive type as in the first embodiment. Therefore,
It is a lower power consumption type sense amplifier, and is superior as a sense system for an associative memory based on the simultaneous multiple search operation.

The basic idea is that when a mismatch is detected during the match search and the potential of the match search line 16 decreases, the potential of the select word line 15 is also decreased simultaneously by the connecting means 21. As a result, the voltage difference between the source electrode (match search line 16) and the gate electrode (select word line 15) of the select transistor 14 is set to almost 0, and the select transistor 14 is maintained in the off state or a state close thereto. ..

However, even at this time, the data line 1b is "1".
Since the potential in the H (high) state is 1.5 to 2.0 V,
Similarly to the first embodiment, the word voltage Vw of the select word line 15 must satisfy the following expression (2) similar to the expression (1) at the time of matching search. Vt <Vw <(data line voltage of “1” H) + Vt ′ Formula (2) where Vt ′ = Vt + ΔV (substrate bias effect, about 1V)

Here, as compared with the equation (1), the maximum value of Vw can be set higher by about 0.5V. This is different from the first embodiment in that the select transistor 1
There is a possibility that the voltage difference between the source electrode (match search line 16) and the gate electrode (select word line 15) of No. 4 is almost 0V, and only the path having the data line 1b as the source electrode side becomes a steady current path. Because. Therefore, the search speed is slightly improved.

An example of a specific driving method will be shown below. First, the ground transistor 18 is turned off. Then, the connecting means 21 connects the select word line 15 and the coincidence search line 16, and the tri-state buffer 20
This causes the select word line 15 to float. Further, the coincidence search line 16 has a maximum allowable value {(1.5
~ 2.0) + Vt '} is precharged. At this time, the data lines 1a, 1b, 2a, 2b are all "1" H.
A potential of 1.5 to 2.0 V in the (high) state is applied.

When the precharge of the coincidence search line 16 and the select word line 15 is completed, the potentials corresponding to the coincidence search data 19 are applied to the respective data lines 1a, 1b, 2a ,.
Given to 2b. That is, "0" L (low) potential 0V is applied to the data lines 1a and 2a, and "1" H (high) potential 1.5 to 2.0V is applied to the data lines 1b and 2b (hereinafter, this The state is called the search start state).

Similar to the first embodiment, the memory cell 11
The memory transistors 13 of a and 12b are of the enhanced type and have a gate voltage of 0V, and both are in the off state. However, the memory transistors 13 of the memory cells 11b and 12a are of the depletion type and are in the ON state.

The source electrode of the select transistor 14 of the memory cell 12a is connected to the data line 2a, and the gate electrode thereof is connected to the select word line 15. Therefore, the gate-source potential difference VGS of this select transistor 14
Is 1.5 to 2.0 V in the search start state.

The select word line 15 is connected to the coincidence search line 16 by the connecting means 21. Therefore, the potential difference between the drain electrode (connected to the coincidence search line 16) and the gate electrode (connected to the select word line 15) of the select transistor 14 of the memory cell 12a is constantly 0V.
become. Therefore, the charges of the match search line 16 are
Is pulled out by.

In this state, the difference from the first embodiment is that the coincidence search sense amplifier 27 does not have a steady driving capability. The pchMOS 27b fed back from the output of the coincidence search sense amplifier 27 is an extremely weak countermeasure for noise and the like and does not serve as a driver. Therefore, although the power consumption is low because it does not have a steady drive current, the potential of the match search line 16 cannot be fixed within a certain range.

When the charge that has been charged up is extracted and the potential drops, and the threshold voltage of the inverter 27a of the match search sense amplifier 27 is cut off, its output is "1" H.
It detects that it goes high. So basically,
The potential of the coincidence search line is lowered to 0V which is the pulled-out "0" L (low) potential.

While paying attention to this point, consider the select transistor 14 of the memory cell 11b when the electric charge of the coincidence search line 16 is extracted and the potential decreases.
In the initial search state, the source electrode, the gate electrode, and the drain electrode of the select transistor 14 of the memory cell 11b are all in the "1" H (high) state of 1.5 to 1.5.
It is set to 2.0V and remains off.

However, the charge of the search match line 16 is pulled to the low potential by the "0" L (low) state of the data line 2a. If the potential of the match search line 16 at this time is Vs, then Vs + Δv = Vw (potential of the select word line 15)
<Potential of the data line 1b (Δv << 1) Expression (3) is obtained.

Therefore, the gate voltage of the select transistor 14 rises above the data line 1b, and there is no current path using the data line 1b as the source electrode side. A possible path is a path with the match search line 16 on the source electrode side.
The gate-source potential difference VGS at this time is VGS = Vw−Vs = Δv from the equation (3). Here, it becomes a problem how the value of Δv is compared with the threshold value Vt ′ of the select transistor 14 at that time. However, this Δv is a transient minute voltage difference, and is constantly 0 V, and as a result, there is no problem.

The cause of this minute voltage difference is the potential of the select word line 15 and the potential of the select word line 15, which is searched by the resistance, the junction capacitance or the parasitic capacitance due to the formation of the select word line 15, the coincidence search line 16 or the connecting means 21 on the semiconductor substrate. This is because a potential fluctuation time difference occurs at each point of the match line 16 potential. However, this time difference is extremely small, and as a result, the amount of current that temporarily flows is also very small.

To suppress this, the resistance of the wiring material is reduced, the number of connecting means 21 is increased, or "0" L of the data lines 1a and 2a is set to such an extent that the time difference does not matter.
There are various suppression methods such as slowly pulling in the low potential due to the (low) state. That is, with the above configuration, the gate-source potential difference VGS of the select transistor 14 is constantly maintained at the threshold voltage Vt ′ regardless of which of the data line 1b side or the match search line 16 side is used as the source electrode.
The select transistor 14 of the memory cell 11b maintains the off state.

Therefore, the electric charge of the coincidence search line 16 is extracted by the data line 2a without passing a steady through current from the data line 1b to the data line 2a, and the threshold Vt (about 0) of the final select transistor 14 is extracted. .8V). This potential drop is detected by the inverter of the coincidence search sense amplifier 27, and the "1" H (high) state is output.

For normal reading in the memory, the connection means 2 is used.
1 is cut off, the precharge transistor 28 is turned off,
The ground transistor 18 is turned on. Furthermore, the selection circuit 5
Through each memory cell 11a, 11b, 12a, 12b
Any one of the data lines 1a, 1b, 2a, 2b of is connected to a current detection type sense amplifier 6 having a current driving capability, and the select word line 15 is set to the "1" H (high) state to select the select transistor 14. It is activated, the potential change of the data line is detected, and the data is read.

Here, it is unnecessary to lower the drive voltage of the select word line 15 as in the case of matching search, and it is usually selected to be 5V (power supply voltage). However, for the data line connected to the current detection type sense amplifier 6, the charge charge of the memory transistor 13 is held,
It is set to a low potential of 1.5 to 2.0V. The data line potential remains 1.5 to 2.0 V without change in the memory transistor 13 of the enhancement type (accumulation of negative charge), while it is 1.
It is set to cause a potential drop to 0 to 1.5V. The potential difference based on this data is detected and output.

Further, as in the first embodiment, the threshold voltage Vt of the select transistor 14 is set to about 2.5V instead of being set to about 0.8V like that of a normal peripheral transistor. From the formula (2), 2.5 <Vw <(1.5 to 2.0) + (2.5 + 1.
0) = 5.0 to 5.5, and Vw can be set to 5V as in the normal data read. As a result, the select word line 1
It becomes easy to control the power supply of the tri-state buffer 20 that drives the drive circuit 5.

Regarding the above structure or its control,
This is possible only when the configuration using the select transistor 14 having a threshold voltage Vt having an extremely good controllability, which is built in in the manufacturing process, is taken. 0.5 ~
Configuration with a large memory of 3.5 V) is impossible.

In these embodiments, the MONO is mainly used.
Although the example of the nonvolatile memory having the S structure has been described, it goes without saying that the invention can be applied to an EEPROM or a ROM having a built-in gate by a normal process as a select gate.

[0074]

For the first time, the present invention makes it possible to effectively suppress shoot-through current when a CAM structure based on a nonvolatile memory is formed. Moreover, the match search operation can be performed by treating 2 bits as one memory pair without changing the memory layout, which has a great effect on high integration, to a normal nonvolatile memory.

For this reason, it is extremely easy to partially use it as a CAM or as an ordinary nonvolatile memory, and it is possible to construct a highly integrated CAM having a large degree of freedom.

Further, by using this CAM as a database memory which has been regarded as important in recent years, a large-capacity database system having an extremely high-speed arbitrary keyword search function can be realized.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a first embodiment of a semiconductor integrated circuit according to the present invention.

FIG. 2 is a configuration diagram of a second embodiment of a semiconductor integrated circuit according to the present invention.

FIG. 3 is a configuration diagram of a stack type memory for explaining a semiconductor integrated circuit according to the present invention.

4 is a distribution diagram of threshold voltages of stack type memory cells used in the semiconductor integrated circuit shown in FIG.

[Explanation of symbols]

 1a, 1b, 2a, 2b data line 5 selection circuit 6 sense amplifier 11a, 11b, 12a, 12b memory cell 11, 12 memory pair 13 memory transistor 14 select transistor 15 select word line 16 match search line 17 match search sense amplifier 19 match Search data

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[Procedure amendment]

[Submission date] October 22, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Claim 4

[Correction method] Change

[Correction content]

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0019

[Correction method] Change

[Correction content]

First, the ground transistor 38 is turned off,
The match search sense amplifier 37 is activated. The coincidence search amplifier 37 is a current drive type amplifier and has a drive capability by itself. Therefore, the match search line 36 is 1.
The potential is set to about 5 to 2.0V. It is desirable that this set potential has a small value so as not to affect the accumulated charge of the floating gate 33, and it is generally considered that 2 V or less is essential.

[Procedure 3]

[Document name to be amended] Statement

[Name of item to be corrected] 0023

[Correction method] Change

[Correction content]

First, attention is paid to the memory cell 32a. The memory cell 32a must be turned on in order to extract the charge from the match search line 36 and detect the mismatch. However, the threshold voltage Vt of this transistor
Has a value of 0.5 to 3.5 V (see FIG. 4). Also,
At this time, the source electrode side becomes the data line 2a, and 0V is applied. Therefore, the voltage Vw of the select word line 35 needs to be 3.5 V or more, and normally, about 4.5 V, which is higher by about 1 V, seems appropriate.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0024

[Correction method] Change

[Correction content]

That is, the voltage Vw of the select word line 35
Only when ≧ 4.5V, the potential of the match search line 36 is dropped by the 0V potential of the data line 2a. On the other hand, the coincidence search sense amplifier 37 is a current drive type and has a drive capability. Therefore, the potential of the match search line 36 finally drops to about 1.0 to 1.5 V, and the mismatch is detected by the voltage drop of about 0.5 V. Of course, this potential drop detects a mismatch, but the memory cell 31 of the CAM cell storing the match data is detected by this.
Inconvenience will occur in b.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Name of item to be corrected] 0025

[Correction method] Change

[Correction content]

Considering the potential of each of the three electrodes (drain, gate, source) of the memory cell 31b, first, the gate is 4.5 V or more of the select word line 35, and the source is the potential of the coincidence search line 35 of 1. 0 to 1.5V, and the drain becomes 1.5 to 2.0V of the data line. That is,
The gate-source potential difference V _GS of this transistor is
It becomes 3.0 to 3.5 (4.5- (1.0 to 1.5)) V or more.

[Procedure Amendment 6]

[Document name to be amended] Statement

[Correction target item name] 0026

[Correction method] Change

[Correction content]

The threshold voltage Vt of the memory cell 31b is at least 0.5V (see FIG. 4). That is, V _GS (= 3.0 to 3.5)> Vt (= 0.5), and the memory cell 3 due to the substrate bias effect at this time is obtained.
Even considering the increase in the threshold voltage of 1b, the transistor of the memory cell 31b is turned on. For this reason,
A through current flows from the high potential of the data line 1b to the low potential of the data line 2a.

[Procedure Amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0034

[Correction method] Change

[Correction content]

Next, the coincidence detecting operation will be described. First, data is written in the memory cells 11a, 11b, 12a, 12b as a memory pair of two cells. This set does not necessarily have to be adjacent memory cells, but in this example, contradictory data is written to the adjacent cells for ease of explanation.

[Procedure Amendment 8]

[Document name to be amended] Statement

[Item name to be corrected] 0040

[Correction method] Change

[Correction content]

Here, it is assumed that the data line 2a is set to 0 V (L state), the match search line 16 is set to 1.5 to 2.0 V (H state), and the select word line is set to 5 V (H state). It is assumed that it is applied. Then, the source and gate potential difference V _GS of the select transistor 14 of the memory cell 12a
Is 5V. That is, V _GS = (H voltage of select word line 15)-(L voltage of data line 2a) = 5-0 = 5 Also, the threshold voltage V of this select transistor 14
t is about 0.8 V like the threshold value of the peripheral transistor.

[Procedure Amendment 9]

[Document name to be amended] Statement

[Correction target item name] 0043

[Correction method] Change

[Correction content]

However, the selection word line 15 has 5
V is applied, and the mismatch potential of the match search line 16 is 1.0 to
If it is set to 1.5V, the source-gate potential difference V _GS of the select transistor 14 of the memory cell 11b is V _GS = 5- (1.0 to 1.5) = 4.0 to 3.5>
It becomes 0.8 (threshold voltage Vt of the select transistor), and even considering the rise of the threshold voltage Vt due to the substrate bias effect, the select transistor 14 of the memory cell 11b is turned on, and the data line 1b and the match search line. 16 are connected. That is, the "1" H (high) potential of 1.5 to 2.0 V of the data line 1b and the "0" L (low) potential of 0 V of the data line 2a are conducted, and a through current flows.

[Procedure Amendment 10]

[Document name to be amended] Statement

[Correction target item name] 0059

[Correction method] Change

[Correction content]

The source electrode of the select transistor 14 of the memory cell 12a is connected to the data line 2a, and the gate electrode thereof is connected to the select word line 15. Therefore, the gate-source potential difference V _{GS of} this select transistor 14
Is 1.5 to 2.0 V in the search start state.

[Procedure Amendment 11]

[Document name to be amended] Statement

[Correction target item name] 0061

[Correction method] Change

[Correction content]

In this state, the difference from the first embodiment is that the coincidence search sense amplifier 27 does not have a steady driving capability. The pchMOS 27b fed back from the output of the coincidence search sense amplifier 27 is an extremely weak measure against noise and the like, and does not serve as a driver. Therefore, although the power consumption is low because it does not have a steady drive current, the potential of the match search line 16 cannot be fixed within a certain range.

[Procedure Amendment 12]

[Document name to be amended] Statement

[Correction target item name] 0065

[Correction method] Change

[Correction content]

Therefore, the gate voltage of the select transistor 14 rises above the data line 1b, and there is no current path using the data line 1b as the source electrode side. A possible path is a path with the match search line 16 on the source electrode side.
At this time, the gate-source potential difference V _GS is V _GS = Vw−Vs = Δv from the equation (3). Here, it becomes a problem how the value of Δv is compared with the threshold value Vt ′ of the select transistor 14 at that time. However, this Δv is a transient minute voltage difference, and is constantly 0 V, so that it does not pose a problem as a result.

[Procedure Amendment 13]

[Document name to be amended] Statement

[Correction target item name] 0067

[Correction method] Change

[Correction content]

To suppress this, the resistance of the wiring material is reduced, the number of connecting means 21 is increased, or "0" L of the data lines 1a and 2a is set to the extent that the time difference does not matter.
There are various suppression methods such as slowly pulling in the low potential due to the (low) state. That is, according to the above configuration, the gate-source potential difference V _{GS of} the select transistor 14 is constantly maintained at the threshold voltage V regardless of whether the data line 1b side or the match search line 16 side is used as the source electrode.
It does not become larger than t ′, and the select transistor 14 of the memory cell 11b maintains the off state.

Claims (7)

[Claims] 1. A first memory cell defining an electrical connection from a first data line to a match search line and a second memory cell defining an electrical disconnection from a second data line to the match search line. And a select transistor for connecting and disconnecting the first data line and the second data line to and from the coincidence search line in accordance with the connection definition state of the first and second memory cells, respectively. And a threshold voltage of the select transistor has a predetermined value created in a manufacturing process. 2. The semiconductor according to claim 1, wherein a current drive type sense amplifier is connected to the coincidence search line, and the gate voltage Vw of the select transistor satisfies the following condition at the time of coincidence search. Integrated circuit. Vt ≦ Vw ≦ Vs + Vt ′ where Vt: threshold voltage of the select transistor (source O
V bias: Vs: potential of match detection line at match / mismatch search Vt ': threshold voltage of select transistor source biased at match / mismatch detection 3. The semiconductor integrated circuit according to claim 1, wherein the built-in threshold voltage Vt of the select transistor (during source OV bias) is set higher than that of the peripheral circuit. 4. A first memory cell defining an electrical connection from a first data line to a match search line and a second memory cell defining an electrical disconnection from a second data line to the match search line. And a select transistor for connecting and disconnecting the first data line and the second data line to and from the coincidence search line in accordance with the connection definition state of the first and second memory cells, respectively. A connecting means for electrically connecting the select word line connected to the gate electrode of the select transistor and the coincidence search line, and a floating means for floating the select word line,
A semiconductor integrated circuit, wherein the connection means is activated at the time of matching search, and the select word line and the matching search line connected by the connection means are initialized to a floating high state. 5. The semiconductor integrated circuit according to claim 4, wherein the threshold voltage of the select transistor is configured to have a predetermined value built in during a manufacturing process. 6. The semiconductor integrated circuit according to claim 4, wherein the gate voltage Vw of the select transistor at the time of matching search is configured to satisfy the following conditions. Vt ≦ Vw ≦ Vh + Vt ′ where Vt: threshold voltage of the select transistor (source O
Vh) Vh: H (high) potential of the data line at the time of matching / mismatch search Vt ': Threshold voltage of the select transistor source biased at the time of matching / mismatch detection 7. The built-in threshold voltage Vt (during source OV bias) of the select transistor is set higher than that of the peripheral circuit.
The semiconductor integrated circuit according to 1.