JPH057307A - Automatic synchronizm switching system - Google Patents

Abstract

PURPOSE:To obtain an automatic synchronizm switching system easy to operate by comparing a voltage level outputted from a sync chip sample part with that outputted from a pedestal sample part, and switching internal synchronizm and external synchronizm based on a compared result. CONSTITUTION:The sync chip sample part 17 outputs some fixed voltage level by the input of a sync chip sample pulse generated from the timing generation circuit 16 of a synchronous signal processing part 15 or the input of a pulse corresponding to the same. Besides, the pedestal sample part 23 too outputs some fixed voltage level in response to the input of a pedestal sample pulse generated from the circuit 16 or the pulse corresponding to it. A level comparison circuit 14 compares these voltage levels, and when there is level difference, it is discriminated that a synchronous signal is superposed on G signal, and the internal synchronization is selected, and when there is no level difference, the external synchronization is selected. Accordingly, the external synchronizm and the internal synchronizm can be switched automatically without recognizing beforehand whether the synchronous signal is superposed previously on G signal or not.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous automatic switching system in an image processing apparatus. In the image processing device, when the sync signal is superimposed on the G signal of the video signal (RGB signal), the sync signal is separated from the G signal by the sync separation circuit, and the sync signal is processed by the sync signal processing unit. To process.

In this case, it would be convenient if the video signal could be processed without grasping in advance whether or not the sync signal is superimposed on the G signal.

[0003]

2. Description of the Related Art As a conventional image processing apparatus, for example, there is one as shown in FIG. In FIG. 7, 1 is R,
The video signal processing unit 1 is a video signal processing unit to which the video signals of B and G are input, and the video signal processing unit 1 processes the video signal. The processed video signal is finally displayed on the screen.

Reference numeral 2 denotes a sync separation circuit to which the G signal is input. The sync separation circuit 2 separates the sync signal superimposed on the G signal and outputs a sync signal (composite sync signal). Reference numeral 3 is a selector, and the selector 3 switches between internal synchronization and external synchronization. Reference numeral 4 denotes a sync signal processing unit, and the sync signal processing unit 4 processes the sync signal such as separating the horizontal sync signal and the vertical sync signal from the composite sync signal.

In this image processing apparatus, it is grasped in advance whether or not the sync signal is superimposed on the G signal of the video signals (RGB signals) output from the connected signal generator or television camera, Based on that information,
I used to change the switches. 5
Indicates an image processing apparatus.

[0006]

In such a conventional image processing apparatus, whether or not the sync signal is superimposed on the G signal of the video signal (RGB signal) is grasped in advance, and the information thereof is recorded. There is a problem that the operation is complicated because it is necessary to perform an operation of switching a switch or the like based on.

The present invention has been made in view of such conventional problems, and an object of the present invention is to provide a synchronous automatic switching system which does not require an operation for switching a switch or the like and is easy to operate. ..

[0008]

FIG. 1 illustrates the principle of the present invention. In FIG. 1, 12 is a sync separation circuit that separates a sync signal from a G signal of a video signal (RGB signal), 15 is a sync signal processing unit that processes the sync signal, and 16 is a sync that is phase-synchronized with the input sync signal. Generates a chip sample pulse and a pedestal sample pulse, and generates a pulse that corresponds to the sync tip sample pulse and a pulse that corresponds to the pedestal sample pulse at the specified timing when the sync signal is not input. A circuit, 17 is a sync chip sample unit for sampling the video signal by inputting the sync chip sample pulse or a pulse corresponding thereto and outputting a certain voltage level, and 23 is a pedestal sample pulse or a pulse corresponding thereto. Input the above video signal Pedestal sampling unit for outputting a constant voltage level ranging Mr. is, 14 is a level comparator for comparing the two voltage levels.

[0009]

[Function] The sync tip sample section outputs a certain voltage level by the input of the sync tip sample pulse or the pulse corresponding thereto, and the pedestal sample section outputs the certain voltage level by the input of the pedestal sample pulse or the pulse corresponding thereto. Outputs the voltage level of.

These voltage levels are compared, and if there is a level difference, it is determined that the sync signal is superimposed on the G signal of the video signals (RGB signals), internal synchronization is selected, and the level difference is determined. If not, it is determined that the sync signal is not superimposed on the G signal of the video signals (RGB signals),
Select external sync. As described above, since the external synchronization and the internal synchronization are automatically switched without grasping in advance whether the synchronization signal is superimposed on the G signal of the video signals (RGB signals), the operation of switching the switch or the like. There is no need to carry out, and the operation becomes easy.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. 2 to 6 are views showing an embodiment of the present invention.
In FIG. 2, reference numeral 11 denotes a video signal processing unit, and the video signal processing unit 11 processes the video signal by inputting the video signal (RGB signal) and finally displays it on the screen.

Reference numeral 12 is a sync separation circuit to which the G signal is input. The sync separation circuit 12 separates the sync signal (composite sync signal) from the G signal. 13 is a selector, and selector 1
3 switches the external synchronization and the internal synchronization based on the output of the level comparison circuit 14 described later. Reference numeral 15 denotes a sync signal processing unit, which separates the sync signal into a horizontal sync signal and a vertical sync signal and outputs the separated sync signal.

Reference numeral 16 is a timing generation circuit in the synchronization signal processing section 15. When the synchronization signal is input, the timing generation circuit 16 generates a sync tip sample pulse and a pedestal sample pulse that are phase-synchronized with the signal and synchronizes them. When no signal is input, a pulse corresponding to the sync tip sample pulse and a pulse corresponding to the pedestal sample pulse are always generated at a predetermined timing.

Reference numeral 17 denotes a sync chip sample section, which receives the sync chip sample pulse and outputs a certain voltage level obtained by sampling the G signal. That is, as shown in FIG. 3, the sync tip sampling unit 17 includes a capacitor 18 that cuts a direct current component, a clamp circuit 19 that clamps an input signal to a certain constant potential, and a switch 20 that closes when a sync tip sample pulse is input. It has a capacitor 21 and a buffer 22 that are charged when the switch 20 is closed and discharged when the switch 20 is opened. A certain voltage level is held by the capacitor 21 and the buffer 22 (see FIG. 4).

Reference numeral 23 is a pedestal sample section, and the pedestal sample section 23 outputs a certain voltage level obtained by sampling the G signal by inputting a pedestal sample pulse. The pedestal sample unit 23 includes a switch 24 connected to the clamp circuit 19 and a capacitor 25.
And a buffer 26.

Reference numeral 14 is the level comparison circuit. The level comparison circuit 14 compares the voltage level from the sync tip sump section 17 with the voltage level from the pedestal sampling section 23. If there is no level difference between the switching signals for switching to synchronization,
A switching signal for switching to external synchronization is output. next,
The operation will be described.

As shown in FIG. 5, when the synchronization signal is superimposed on the G signal, the timing generation circuit 16 outputs the sync tip sample pulse to the sync tip sample section 17.
Then, the pedestal sample pulse is output to the pedestal sampling unit 23 at a predetermined timing. In the sync tip sampling unit 17, the DC component of the G signal is cut by the capacitor 18 and clamped to a certain potential by the clamp circuit 19, and when the sync tip sample pulse is input, the switch 20 is closed and the capacitor 21 is charged. To do. During the period other than the sync tip sample pulse, the switch 20 is open and the capacitor 21 is discharged, but the discharge is not completed until the next sync tip sample pulse comes in, so that a certain voltage level is held (Fig. 4, see).

On the other hand, the pedestal sampling unit 23 also performs the same operation as the sync chip sampling unit 17 at a predetermined timing. Since there is a level difference between the voltage level of the sync tip sampling unit 17 and the voltage level of the pedestal sampling unit 23, the level comparison circuit 14 sends a switching signal for switching to internal synchronization to the selector 13, and the selector 13 switches to internal synchronization. .. As a result, the internal sync signal is input to the sync signal processing unit 15.

Next, as shown in FIG. 6, when the sync signal is not superposed on the G signal, the voltage level of the sync chip sampling section 17 and the voltage level of the pedestal sampling section 23 are outside the effective video period. Because of the horizontal blanking signal of, the level is the same and no level difference is detected. In this case, the selector 13 selects external synchronization, and the external synchronization signal is input to the synchronization signal processing unit 15.

As described above, since the internal synchronization and the external synchronization can be automatically switched, it is not necessary to carry out the operation of switching the switch as in the conventional case, and the operation is simplified.

[0021]

As described above, according to the present invention, it is not necessary to know in advance whether or not a sync signal is superimposed on a video signal, and it is possible to automatically switch between internal synchronization and external synchronization. Therefore, the operation becomes easy.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of the principle of the present invention.

FIG. 2 is a diagram showing an embodiment of the present invention.

FIG. 3 is a block diagram of a sync tip sample unit and a pedestal sample unit.

FIG. 4 is an explanatory diagram of charge / discharge.

FIG. 5 is an explanatory diagram when a synchronization signal is superimposed.

FIG. 6 is an explanatory diagram when a sync signal is not superimposed.

FIG. 7 is a diagram showing a conventional example.

[Explanation of symbols]

 11: video signal processing unit 12: synchronization separation circuit 13: selector 14: level comparison circuit 15: synchronization signal processing unit 16: timing generation circuit 17: sync tip sample unit 18: capacitor 19: clamp circuit 20, 24: switch 21, 25: Capacitors 22 and 26: Buffer memory 23: Pedestal sample section

Claims (1)

Claim: What is claimed is: 1. An image processing apparatus for separating a sync signal from a video signal by a sync separation circuit (12) and processing the sync signal by a sync signal processing section (15) A timing generation circuit that generates sync-tip sample pulses and pedestal sample pulses that are phase-synchronized, and generates a pulse that corresponds to the sync-tip sample pulse and a pulse that corresponds to the pedestal sample pulse at a predetermined timing when the sync signal is not input. )
A sync tip sample pulse (17) for sampling the video signal and outputting a certain voltage level by inputting the sync tip sample pulse or a pulse corresponding thereto; and a pedestal sample pulse or a pulse corresponding thereto. A pedestal sampling unit (23) that samples the video signal by input and outputs a certain voltage level and a level comparison unit (10) that compares two voltage levels are provided, and internal synchronization and external synchronization are performed according to the level comparison result. Synchronous automatic switching method characterized by automatic switching.