JPH0567014A - Protocol processor - Google Patents

Abstract

PURPOSE:To provide a protocol processor by which a check sum value can be calculated at a high speed. CONSTITUTION:This device is equipped with a check sum computing element 7 which is connected with a bus 2 in a protocol processor 1. The check sum computing element 7 temporarily holds the address of a main storage part 3 in which the initial data for calculating a check sum value outputted by a processor 4 are stored, outputs it to the bus 2, and outputs an address value to which only the preliminarily decided number of bits is added at each time of the execution of one time of arithmetic operation. An arithmetic number of time counter 72 receives an arithmetic number of time value outputted from the processor 4, subtracts one by one from the value at each time of the execution of one time of arithmetic operation, and outputs an arithmetic operation end command to the bus 2 when the result is turned to 0. An accumulator 73 reads the data stored in the address of the main storage part 3 outputted from an address counter 71, accumulates the read data, and outputs the result to the bus 2, until receiving the above mentioned arithmetic operation end command.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a protocol processor, and more particularly to a protocol processor having a checksum calculator for calculating a checksum value used for processing a checksum of a frame in a protocol of a local area network. Regarding

[0002]

2. Description of the Related Art A plurality of information processing apparatuses are connected by a transmission line or the like to form a local area network, and data is transmitted or received between the plurality of information processing apparatuses or between the plurality of local area networks. When transmitting / receiving data, in order to prevent a transmission error occurring during data transmission, for example, a checksum value is inserted into transmission data by a predetermined method, and transmission is performed together with other data. At the receiving side, the received checksum value is compared with the checksum value generated from the other received data by a predetermined method, and if the result is equal to these two checksum values, the data is detected without error. It is judged that the data has been received, and if the compared checksum values are different from each other, it means that there is an error in data reception,
Retransmission of this data often prevents errors that occur when transmitting the data.

When the above-mentioned checksum is generated from the received data in the local area network, when the conventional protocol processing device receives the data, it is stored in advance in the protocol processing device by the processor provided therein. The checksum described above is generated using a program that exists.

For example, the magazine interface 198.
TCP / IP as described in “Program example of checksum calculation” in FIG. 6 on page 246 of May 8 issue.
The calculation of the checksum based on the Internet protocol (IP) defined by (Transmission control protocol / Internet protocol) shows an example of a program for calculating the checksum described in the programming language C.

[0005]

The above-mentioned conventional protocol processing device operates the processing components for performing various processes in the protocol processing device using a program prepared in advance for calculating the checksum. Then, the desired checksum is obtained. However, there is a drawback in that the efficiency of data transmission is reduced because a long execution time is required when the checksum is obtained using a program.

An object of the present invention is to perform checksum processing exclusively in a processing device of a protocol which processes data according to a predetermined protocol for data received and used in a local area network as described above. An object of the present invention is to provide a protocol processing device which is provided with an arithmetic unit and can perform checksum processing at high speed.

[0007]

In the protocol processing device of the first aspect of the present invention, the processing of the data received according to the protocol of the local area network is temporarily stored in the internal storage section via the bus under the control of the processor. In a protocol processing device that performs data, the operation count value output from the processor via the bus is received and temporarily stored, and the operation count value is decremented by 1 for each operation, and the operation count value is zero. And the address value that stores the first data to be calculated among the data stored in the storage unit is received from the processor via the bus, and the address value is received. Is temporarily held until the next calculation, and the address value is set to a predetermined value until the value of the calculation counter reaches zero. Input an address counter that increments by several units and holds it until the next operation, and data starting from the address value output from the address counter to the bus in bit units until the value of the operation number counter becomes zero. It comprises a checksum calculator comprising an accumulator for accumulating and holding the result and outputting the value to the bus in response to a read instruction from the processor.

The protocol processing device according to the second aspect of the present invention is a protocol for processing data once stored in an internal storage section via a bus under the control of a processor having a built-in processing of data received according to a protocol of a local area network. In the processing device, when the operation count value output from the processor via the bus is received and temporarily stored, and the operation count value is reduced by 1 for each operation, the operation count value becomes zero. An operation counter that stops and an address value storing the first data to be calculated among the data stored in the storage unit are received from the processor via the bus, and the address value is then calculated. The address value is a unit of a predetermined number of bits until it is temporarily held until the value of the operation number counter reaches zero. An address counter which increases and holds until the next operation execution signal is received, and an initial value of a checksum output by the processor via the bus is read, and the bit unit is added until the value of the operation number counter becomes zero. A checksum calculator comprising an accumulator for inputting and accumulating data having an address value output from the address counter to the bus as a head, storing the result, and outputting the value to the bus in response to a read instruction from a processor. Is equipped with.

[0009]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a protocol processing device of the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. 3 is a target of checksum calculation. It is explanatory drawing which shows an example of the header contained in the following received data, and the data following it.

The protocol processing apparatus 1 of the present invention shown in FIG. 1 performs data communication with another information processing apparatus (not shown) connected by a local area network via a LAN controller 6. To do. LA
The N controller 6 reads the data temporarily stored in the buffer memory 5 under the control of the processor 4 and transmits the data according to a predetermined protocol to the communication partner, and the data transmitted from the partner. Is received and the received data is written in the buffer memory 5. The received data is read from the buffer memory 5 and written in the main memory 3 under the control of the processor 4 at an appropriate time. The control by the processor 4 and the transmission of data from the buffer memory 5 to the main storage unit 3 are performed via the bus 2. Further, the protocol processing device 1 is provided with a checksum calculator 7 connected to the processor 4 and the main storage unit 3 via the bus 2.

The checksum computing unit 7 holds the value of the number of computations output from the processor 4, decrements the value by 1 every time the computation of an accumulator described later is performed, and stops when the value reaches 0. 72, an address counter 71 for outputting to the bus 2 the address value of the data to be read by the accumulator 73 among the data stored in the main memory 3 for the accumulator 73, which will be described later, and stored in the main memory 3. When a predetermined number of bits of data stored after the address output by the address counter 73 is read out from the read data and the read data is accumulated as a numerical value and the value of the operation number counter becomes zero. , This accumulation operation is stopped and the accumulated result is held and output to the bus 2 in response to a read instruction from the processor. It is composed of an accumulator 73.

The address counter 71 is an accumulator 7.
Each time 3 performs one operation, it outputs to the bus 2 a value obtained by adding the address value by a predetermined number of bits to the address value output immediately before. After that, such an operation is repeated until the above-mentioned operation end signal is received via the bus 2.

The accumulator 73 has an address value output from the address counter 71 via the bus 2 for a predetermined number of bits and an address of the main storage unit 3 for a predetermined number of bits continuous to this address value. The data stored inside is read and accumulated with the value input immediately before reading. The method of performing the accumulation depends on the protocol adopted by the network for data transmission.
That is, the data in which the checksum value is inserted in the data to be transmitted in advance is transmitted, and the receiving side extracts the checksum value inserted in this data and calculates the checksum based on other received data. Then, the sum of the above-mentioned extracted checksum value is calculated, and when the value becomes 0, for example, it is determined that the data is normally received without error, and when the checksum is calculated by the method determined from the received data. A method is often used in which the result and the checksum value separately transmitted from the transmitting side are extracted and the two are compared, and if the two are equal, it is determined that the data has been transmitted normally.

In order to calculate the checksum, there is a method of accumulating data in units of bits specified in advance by a protocol with respect to data specified as a numerical value, and
The above-described checksum value is calculated by accumulating the one's complement numbers of the data of the predetermined number of bits read by the accumulator 73, and is compared with the checksum value transmitted separately as described above. The method is known.

As described above, when using the one's complement of the value when the data of the predetermined number of bits is expressed as a numerical value, the one's complement is accumulated with respect to the data input to the accumulator 73 in advance. You just have to do it. Also, when data is transmitted, the checksum value is also transmitted to the accumulator 7
When the calculation is started at 3, the checksum value transmitted first from the processor 4 is stored in this accumulator 73.
It is obvious that the value of the received data may be accumulated with respect to the input checksum value.

In this way, the checksum value calculated by the accumulator 73 and output to the bus 2 may be judged by the processor 4 as to whether or not the checksum value is in accordance with the protocol prescribed in advance.

FIG. 3B shows a "magazine interface" 1
3 is an explanatory diagram showing the relationship between the header and data and the checksum defined by the TCP protocol described in FIG. 3 on page 228 of the June 988 issue.
FIG. 3A is an explanatory diagram of a virtual header used when calculating a checksum related to the header and data shown in FIG. 3B. One horizontal line in FIG. 3B is composed of 32 bits as indicated by numbers 0 to 31, and the data shown in the drawing is inserted and transmitted.
When calculating the checksum, the term of the checksum in FIG. 3B is treated as 0, and the virtual header shown in FIG. 3A is generated based on the data received by the processor 4. Accumulation is performed every 16 bits including the data part shown in FIG. 3B, and the accumulated data is inserted into the checksum part shown in FIG. 3B and transmitted. It is compared with the checksum value.

The checksum portion shown in FIG. 3 (B) includes the virtual header shown in FIG. 3 (A), and is a value indicating the one's complement of the sum of the one's complements for every 16 bits. Will be inserted and sent.

In the protocol processing device 10 according to another embodiment of the present invention shown in FIG. 2, the LAN controller 6, the buffer memory 5, the main memory 3 and the processor 4 have already been described with reference to FIG. It uses exactly the same thing. A checksum calculator 70 is connected to these components via the bus 2. The address matching circuit 75 among the elements constituting the checksum calculator 70
Since the components other than the accumulator 74 are the same as those already described in FIG. 1, the description of these components will be omitted hereinafter.

The address matching circuit 75 compares the address value of the address counter 71 with the address value of the bus which indicates from which address of the main memory unit 3 the data sent from the main memory unit 3 is output to the bus 2. Then, it is detected that both match. When a match is detected, the accumulator 74 reads the data sent from the main storage unit 3 via the bus 2 and accumulates the already read data. Such an operation is performed until the value of the operation number counter 72 becomes zero, and when the read instruction from the processor is received, the operation result is output to the bus 2.

[0022]

As described above, the protocol processing device of the present invention performs the checksum calculation on the received data by the dedicated checksum calculator, so that the calculation by the software program is performed as in the conventional case. Since the checksum can be calculated at high speed, data having no error can be transmitted at high speed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a protocol processing device of the present invention.

FIG. 2 is a block diagram showing an implementation of a protocol processing device of the present invention which is different from FIG.

FIG. 3 is an explanatory diagram showing an example of headers and data that are targets of checksum calculation.

[Explanation of symbols]

 1 protocol processor 2 bus 3 main memory 4 processor 5 buffer memory 6 LAN controller 7 checksum calculator 70 checksum calculator 71 address counter 72 calculation counter 73 accumulator 74 accumulator 75 address matching circuit

Claims (4)

[Claims] 1. A protocol processing device for performing processing of data received according to a protocol of a local area network on data once stored in an internal storage section via a bus under the control of a processor having a built-in processor, the processor processing the data via the bus. The operation number counter which receives the operation number value output as a result and temporarily stores it, and subtracts the operation number value by 1 for each operation and stops when the operation number value becomes zero. The address value storing the data to be calculated first among the stored data is received from the processor via the bus, and the address value is temporarily held until the next calculation, and the value of the operation number counter is stored. Address counter that increases the address value by a predetermined number of bits until it becomes zero and holds it until the next calculation. And the data having the address value output from the address counter to the bus in the bit unit at the beginning as input data via the bus and accumulating and holding the result. A protocol processing device comprising a checksum calculator comprising an accumulator which outputs the value to the bus in response to a read instruction from the protocol processor. 2. A protocol processing device for processing data received according to a protocol of a local area network for data once stored in an internal storage unit via a bus under the control of a processor having a built-in processor, the processor processing the data via the bus. The operation number counter which receives the operation number value output as a result and temporarily stores it, and subtracts the operation number value by 1 for each operation and stops when the operation number value becomes zero. The address value storing the data to be calculated first among the stored data is received from the processor via the bus, and the address value is temporarily held until the next calculation, and the value of the operation number counter is stored. Until the address becomes zero, the address value is incremented by a predetermined number of bits and held until the next operation and output to the bus. Address counter, and an initial value of the checksum output from the processor via the bus is read, and an address value output from the address counter to the bus in the bit unit is read until the value of the operation number counter becomes zero. A protocol processing device comprising a checksum computing unit comprising an accumulator for inputting and accumulating the head data, accumulating the results, holding the result, and outputting the value to the bus in response to a read instruction from a processor. 3. A protocol processing device for processing data received according to a protocol of a local area network, for processing data once stored in an internal storage unit via a bus under the control of a processor having a built-in processor, the processor processing the data via the bus. The operation number counter which receives the operation number value output as a result and temporarily stores it, and subtracts the operation number value by 1 for each operation and stops when the operation number value becomes zero. The address value storing the data to be calculated first among the stored data is received from the processor via the bus, and the address value is temporarily held until the next calculation, and the value of the operation number counter is stored. Address counter that increases the address value by a predetermined number of bits until it becomes zero and holds it until the next calculation. Interface, an address matching circuit that compares the address value of the address counter with the address value output from the processor to the bus to detect a match, and the address matching circuit matches until the value of the operation count counter reaches zero. Protocol processing characterized by comprising a checksum calculator comprising an accumulator for inputting and accumulating data on the bus upon detection of the value, holding the result, and outputting the value to the bus in response to a read instruction from the processor. apparatus. 4. A protocol processing device for processing data received according to a protocol of a local area network for data once stored in an internal storage section via a bus under the control of a processor having a built-in protocol, the processor processing the bus via the bus. The operation number counter which receives the operation number value output as a result and temporarily stores it, and subtracts the operation number value by 1 for each operation and stops when the operation number value becomes zero. The address value storing the data to be calculated first among the stored data is received from the processor via the bus, and the address value is temporarily held until the next calculation, and the value of the operation number counter is stored. Address counter that increases the address value by a predetermined number of bits until it becomes zero and holds it until the next calculation. Input, an address matching circuit for detecting a match by comparing the address value of the address counter with the address value output from the processor to the bus, and the initial value of the checksum read by the processor. An accumulator that inputs data on the bus when the match is detected by the address match circuit until the value of the operation counter reaches zero to the initial value of the sum, accumulates the result, and outputs the value to the bus. A protocol processing device comprising a checksum computing unit comprising: