JPH0563109A - Mold type ic package - Google Patents
Mold type ic packageInfo
- Publication number
- JPH0563109A JPH0563109A JP3244489A JP24448991A JPH0563109A JP H0563109 A JPH0563109 A JP H0563109A JP 3244489 A JP3244489 A JP 3244489A JP 24448991 A JP24448991 A JP 24448991A JP H0563109 A JPH0563109 A JP H0563109A
- Authority
- JP
- Japan
- Prior art keywords
- package
- contact hole
- mold type
- generated
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、外部接続端子の変形の
おそれがなく、回路基板への実装面積が小さくて済むモ
ールド型ICパッケージに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mold type IC package which is free from deformation of external connection terminals and requires a small mounting area on a circuit board.
【0002】[0002]
【従来の技術】図3は、従来のモールド型ICパッケー
ジの構造を説明するための一部を内視した斜視図、図4
は同じくその側面図である。以下、図中における同一符
号は同一又は相当するものを示す。ICチップ1は、リ
ード部の構成部品、リードフレームの一部であるタブ3
に固着されている。該ICチップ1内にはボンディング
・パッドと呼ばれる複数のチップ端子接続部があり、こ
れらのパッドと対応する複数のインナーリード(リード
のパッケージ内の部分)4とは金線等の金属ワイヤ2に
より接続され、電気的に導通している。これらICチッ
プ1、金属ワイヤ2、タブ3およびインナーリード4は
モールド樹脂部8内に埋めこまれている。各インナーリ
ード4からパッケージ外に伸びるアウターリード5は、
半田メッキされており外部接続端子として利用される。
実装の際は、通常アウターリード先端部を回路基板上の
配線等へ載せて加熱し、半田付けにより装着する。2. Description of the Related Art FIG. 3 is a perspective view showing a part of a conventional mold type IC package for explaining the structure thereof, and FIG.
Is also a side view thereof. Hereinafter, the same reference numerals in the drawings indicate the same or corresponding ones. The IC chip 1 includes a component part of the lead portion and a tab 3 which is a part of the lead frame.
Is stuck to. The IC chip 1 has a plurality of chip terminal connection portions called bonding pads, and these pads and a plurality of inner leads (portions inside the package of the leads) 4 corresponding to these pads are connected by a metal wire 2 such as a gold wire. Connected and electrically conducting. The IC chip 1, the metal wire 2, the tab 3, and the inner lead 4 are embedded in the mold resin portion 8. The outer leads 5 extending from the inner leads 4 to the outside of the package are
Solder plated and used as an external connection terminal.
At the time of mounting, the tip of the outer lead is usually placed on a wiring or the like on the circuit board, heated, and then mounted by soldering.
【0003】[0003]
【発明が解決しようとする課題】従来のICパッケージ
では、回路基板との接続部となるアウターリード5は一
般に薄くて細長の形状となるため輸送時等に変形を生じ
易く、その変形による接続不良が発生し易いという問題
があった。また、モールド成型時、アウターリード自体
や隣接するアウターリード間へのフラッシュの付着は避
けられず、これを除去するための特別の工程を設ける必
要があった。また、アウターリードが存在するため実装
面積を縮小化し難いという問題もあった。更には、フラ
ットタイプのICパッケージでは、アウターリードの存
在のためにパッケージの薄型化が困難となっていた。In the conventional IC package, the outer lead 5, which is a connecting portion with the circuit board, is generally thin and elongated, so that the outer lead 5 is likely to be deformed during transportation. However, there is a problem that is likely to occur. Further, during molding, it is unavoidable that flash attaches to the outer leads themselves or between adjacent outer leads, and it is necessary to provide a special step for removing the flash. In addition, there is a problem that it is difficult to reduce the mounting area due to the presence of the outer leads. Further, in the flat type IC package, it is difficult to reduce the thickness of the package due to the presence of the outer leads.
【0004】本発明は、上記問題点を解消するためにな
されたもので変形、フラッシュ付着の心配がなく、パッ
ケージの薄型化・実装面積の縮小化が可能なモールド型
ICパッケージを提供することを目的とする。The present invention has been made in order to solve the above problems, and it is an object of the present invention to provide a mold type IC package which can be thinned and the mounting area can be reduced without fear of deformation and adhesion of flash. To aim.
【0005】[0005]
【課題を解決するための手段】上記目的を達成するため
本発明は、モールド型ICパッケージにおいて、モール
ド樹脂部内にインナーリードから前記パッケージの上面
又は裏面に通じるコンタクトホールを設け、該コンタク
トホール内に半田、銅等の導電材料を充填して外部接続
用コンタクト部としたものである。In order to achieve the above object, the present invention provides a mold type IC package in which a contact hole communicating from an inner lead to an upper surface or a back surface of the package is provided in a mold resin portion. A contact portion for external connection is formed by filling a conductive material such as solder or copper.
【0006】[0006]
【作用】上記のように構成したICパッケージを使用す
るには、回路基板の配線上にこれを載せ従来と同様な方
法で加熱し装着する。これによりICチップは、コンタ
クトホールを介して回路基板上の配線に電気的に接続さ
れる。To use the IC package constructed as described above, the IC package is placed on the wiring of the circuit board, heated and mounted in the same manner as in the prior art. As a result, the IC chip is electrically connected to the wiring on the circuit board through the contact hole.
【0007】[0007]
【実施例】図1に本発明ICパッケージの一実施例の断
面図を、図2にその底面図を示す。これらの図において
5は、パッケージ(モールド樹脂)内のリード、インナ
ーリード4からパッケージの上面又は裏面へ通じる通孔
(以下“コンタクトホール”と呼ぶ。)である。該コン
タクトホール5は、モールド金型によりモールド成型時
に形成される。本パッケージに用いるリードフレームは
アウターリード部をもたないが、タブ3、インナーリー
ド4をつなぐタイバーは通常通り設けられており、これ
らは通常行われるようにモールド成型後、切断・除去さ
れる。この状態での特性テストは、剣山状ソケットにパ
ッケージを載せ、コンタクトホール5内に該ソケットの
ピンを通してインナーリード4に電気接続して行う。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view of an embodiment of the IC package of the present invention, and FIG. 2 is a bottom view thereof. In these drawings, reference numeral 5 is a lead in the package (mold resin), and a through hole (hereinafter referred to as a "contact hole") communicating from the inner lead 4 to the upper surface or the back surface of the package. The contact hole 5 is formed at the time of molding by a molding die. Although the lead frame used in this package does not have an outer lead portion, a tie bar that connects the tab 3 and the inner lead 4 is provided as usual, and these are cut and removed after molding as usual. The characteristic test in this state is performed by mounting the package on the sword-shaped socket and electrically connecting it to the inner lead 4 through the pin of the socket in the contact hole 5.
【0008】次に、コンタクトホール5内に半田や銅
線、銅ボール等の導電材料を半田メッキしたものを充
填、又は銅線、銅ボール、導電性接着剤を充填してから
半田メッキするなどして外部接続用コンタクト部6を形
成し、本ICパッケージは完成する。Next, the contact hole 5 is filled with solder or a copper wire, a copper ball, or another conductive material solder-plated, or a copper wire, copper ball, or conductive adhesive is filled and then solder-plated. Then, the contact portion 6 for external connection is formed, and the present IC package is completed.
【0009】このICパッケージを実装するには、回路
基板上に設けた配線上にこれを載せ従来と同様な方法で
加熱する。これによりICチップは、コンタクトホール
内の導電材料を介して回路基板上の配線に半田付けさ
れ、電気的に接続される。To mount this IC package, it is placed on the wiring provided on the circuit board and heated in the same manner as in the prior art. As a result, the IC chip is soldered and electrically connected to the wiring on the circuit board through the conductive material in the contact hole.
【0010】[0010]
【発明の効果】以上説明したように、本発明のモールド
型ICパッケージにおいては、回路基板との接続部は変
形を生じ易いアウターリードでなく、モールド樹脂内の
コンタクトホールに導電材料を充填したコンタクト部で
構成されるので、成型不備、輸送時の変形による接続不
良、フラッシュ付着に伴うその除去工数の問題が解消さ
れる。またアウターリードをもたないため立体的に小型
化することができ、パッケージの薄型化・実装面積の縮
小化が可能となる。As described above, in the mold type IC package of the present invention, the contact portion in which the circuit board is connected is not the outer lead which is easily deformed, but the contact hole in the mold resin is filled with the conductive material. Since it is composed of parts, problems of molding defects, connection failure due to deformation during transportation, and removal man-hours due to flash adhesion are solved. Further, since it does not have outer leads, it can be three-dimensionally downsized, and the package can be made thinner and the mounting area can be reduced.
【図1】本発明ICパッケージの一実施例の断面図であ
る。FIG. 1 is a sectional view of an embodiment of an IC package of the present invention.
【図2】同実施例の底面図である。FIG. 2 is a bottom view of the embodiment.
【図3】従来のICパッケージの一部を内視した斜視図
である。FIG. 3 is a perspective view in which a part of a conventional IC package is viewed.
【図4】同じくその側面図である。FIG. 4 is a side view of the same.
【符号の説明】 1:ICチップ、2:金属ワイヤ、3:タブ、4:イン
ナーリード、5:アウターリード、6:コンタクトホー
ル、7:コンタクト部、8:モールド樹脂部。[Explanation of reference numerals] 1: IC chip, 2: metal wire, 3: tab, 4: inner lead, 5: outer lead, 6: contact hole, 7: contact portion, 8: molded resin portion.
Claims (1)
ールド樹脂部内にインナーリードから前記パッケージの
上面又は裏面に通じるコンタクトホールを設け、該コン
タクトホール内に半田、銅等の導電材料を充填して外部
接続用コンタクト部としたことを特徴とするモールド型
ICパッケージ。1. In a mold type IC package, a contact hole communicating from an inner lead to an upper surface or a back surface of the package is provided in a mold resin portion, and the contact hole is filled with a conductive material such as solder or copper for external connection. A mold type IC package characterized by being a contact portion.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3244489A JPH0563109A (en) | 1991-08-29 | 1991-08-29 | Mold type ic package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3244489A JPH0563109A (en) | 1991-08-29 | 1991-08-29 | Mold type ic package |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0563109A true JPH0563109A (en) | 1993-03-12 |
Family
ID=17119433
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3244489A Withdrawn JPH0563109A (en) | 1991-08-29 | 1991-08-29 | Mold type ic package |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0563109A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07307405A (en) * | 1994-05-11 | 1995-11-21 | Goldstar Electron Co Ltd | Semiconductor package using solder ball and its preparation |
JPH08316361A (en) * | 1995-05-24 | 1996-11-29 | Nec Kyushu Ltd | Semiconductor device |
US5841192A (en) * | 1994-07-21 | 1998-11-24 | Sgs-Thomson Microelectronics S.A. | Injection molded ball grid array casing |
US5866948A (en) * | 1995-07-18 | 1999-02-02 | Hitachi Cable, Ltd. | Interposer for semiconductor device |
EP0780896A3 (en) * | 1995-12-19 | 1999-04-14 | Texas Instruments Incorporated | Improvements in or relating to electronic packages |
JP2006295051A (en) * | 2005-04-14 | 2006-10-26 | Sony Corp | Semiconductor device and its manufacturing method |
JP2009049173A (en) * | 2007-08-20 | 2009-03-05 | Mitsui High Tec Inc | Semiconductor device and its manufacturing method |
-
1991
- 1991-08-29 JP JP3244489A patent/JPH0563109A/en not_active Withdrawn
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07307405A (en) * | 1994-05-11 | 1995-11-21 | Goldstar Electron Co Ltd | Semiconductor package using solder ball and its preparation |
US5841192A (en) * | 1994-07-21 | 1998-11-24 | Sgs-Thomson Microelectronics S.A. | Injection molded ball grid array casing |
JPH08316361A (en) * | 1995-05-24 | 1996-11-29 | Nec Kyushu Ltd | Semiconductor device |
US5866948A (en) * | 1995-07-18 | 1999-02-02 | Hitachi Cable, Ltd. | Interposer for semiconductor device |
US6031292A (en) * | 1995-07-18 | 2000-02-29 | Hitachi Cable, Ltd. | Semiconductor device, interposer for semiconductor device |
EP0780896A3 (en) * | 1995-12-19 | 1999-04-14 | Texas Instruments Incorporated | Improvements in or relating to electronic packages |
JP2006295051A (en) * | 2005-04-14 | 2006-10-26 | Sony Corp | Semiconductor device and its manufacturing method |
JP2009049173A (en) * | 2007-08-20 | 2009-03-05 | Mitsui High Tec Inc | Semiconductor device and its manufacturing method |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19981112 |