JPH0563008B2 - - Google Patents

Info

Publication number
JPH0563008B2
JPH0563008B2 JP62094621A JP9462187A JPH0563008B2 JP H0563008 B2 JPH0563008 B2 JP H0563008B2 JP 62094621 A JP62094621 A JP 62094621A JP 9462187 A JP9462187 A JP 9462187A JP H0563008 B2 JPH0563008 B2 JP H0563008B2
Authority
JP
Japan
Prior art keywords
margin
cut surface
vapor
electrode
film capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62094621A
Other languages
Japanese (ja)
Other versions
JPS63260011A (en
Inventor
Kazuyoshi Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marcon Electronics Co Ltd
Original Assignee
Marcon Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marcon Electronics Co Ltd filed Critical Marcon Electronics Co Ltd
Priority to JP9462187A priority Critical patent/JPS63260011A/en
Publication of JPS63260011A publication Critical patent/JPS63260011A/en
Publication of JPH0563008B2 publication Critical patent/JPH0563008B2/ja
Granted legal-status Critical Current

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  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は積層フイルムコンデンサの製造方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a method of manufacturing a multilayer film capacitor.

(従来の技術) 一般に積層フイルムコンデンサは、たとえば大
口径巻芯に互いにずらした誘電体フイルムに蒸着
電極を施した金属化フイルム一対を積層巻回し、
両端面にメタリコン電極を形成してなる母素子を
前記大口径巻芯から取りはずし、回転鋸刃で半径
方向に切断し得られるもので、第10図に示すよ
うな切断面となる蒸着電極21の両側面にマージ
ン部22を有するもの、または第11図に示すよ
うに蒸着電極21が両側面に露出したものそれぞ
れがある。第10図および第11図中23は誘電
体フイルム、24はメタリコン電極である。
(Prior Art) In general, a laminated film capacitor is manufactured by laminating and winding a pair of metallized films, each of which has vapor-deposited electrodes on dielectric films offset from each other, around a large-diameter winding core.
The mother element formed with metallicon electrodes on both end faces is removed from the large-diameter winding core and cut in the radial direction with a rotary saw blade to form the vapor-deposited electrode 21 with a cut surface as shown in FIG. There are those that have margin portions 22 on both sides, and those that have vapor deposition electrodes 21 exposed on both sides as shown in FIG. In FIGS. 10 and 11, 23 is a dielectric film, and 24 is a metallicon electrode.

しかして、第10図に示すものは両側面にマー
ジン部22を有するため単位体積当たりの有効静
電容量が制限され、また蒸着電極21形成におけ
る蒸着時のマスクずれ、飛散などにより静電容量
がばらつく欠点を有し、第11図に示すものは誘
電体フイルム23が薄いため切断時に対向電極間
短絡あるいは緑面放電が生ずる危険性を有し信頼
性に乏しい欠点を有していた。
However, since the one shown in FIG. 10 has margin portions 22 on both sides, the effective capacitance per unit volume is limited, and the capacitance is also reduced due to mask displacement and scattering during vapor deposition during the formation of the vapor deposition electrode 21. The dielectric film 23 shown in FIG. 11 is thin, so there is a risk of short-circuiting between opposing electrodes or green surface discharge during cutting, resulting in poor reliability.

そのためこれらの欠点を除去することを目的と
した技術として特公昭61−29533号公報がある。
この公報に開示された技術は切断面における蒸着
電極マージン形成手段として切断によつて両側面
部に露出した蒸着電極の先端部分を化学的に溶解
除去するもので、必要かつ最小限のマージン部を
得ようとするものである。
Therefore, Japanese Patent Publication No. 61-29533 is a technique aimed at eliminating these drawbacks.
The technique disclosed in this publication is a means of forming a margin of the vapor deposition electrode at the cut surface by chemically dissolving and removing the tip of the vapor deposition electrode exposed on both side surfaces by cutting, thereby obtaining the necessary and minimum margin. This is what we are trying to do.

しかしながら、化学種の侵入制御が困難で、内
部マージンのコントロールが難しく、また化学種
の水洗処理などのプロセスが必要で蒸着電極マー
ジン形成プロセスの複雑化となることはもとよ
り、化学種の除去が困難で信頼性を損ねる問題を
かかえていた。
However, it is difficult to control the invasion of chemical species, it is difficult to control the internal margin, and processes such as water washing of chemical species are required, which complicates the vapor deposition electrode margin formation process, and it is difficult to remove chemical species. However, there were problems with reliability.

(発明が解決しようとする問題点) 上記構成になる切断面へのマージン部形成手段
では、マージン部形成寸法のコントロールが難し
く、かつ水洗処理が必要であるためプロセスが複
雑化すると同時に化学種の除去が困難で信頼性を
損ねる結果となつていた。
(Problems to be Solved by the Invention) With the above-described means for forming a margin on a cut surface, it is difficult to control the margin formation dimensions, and water washing is required, which complicates the process and at the same time causes the chemical species to It was difficult to remove, resulting in a loss of reliability.

本発明は上記の点に鑑みてなされたもので、作
業性良好にして切断面に精度よく任意の蒸着電極
マージン形成を可能とした積層フイルムコンデン
サの製造方法を提供することを目的とするもので
ある。
The present invention has been made in view of the above points, and it is an object of the present invention to provide a method for manufacturing a laminated film capacitor that has good workability and enables formation of an arbitrary vapor-deposited electrode margin on a cut surface with high accuracy. be.

[発明の構成] (問題点を解決するための手段) 本発明の積層フイルムコンデンサの製造方法
は、長さ方向一端部に余白部を残し蒸着電極を施
した金属化フイルムを交互に複数枚積層し両端面
にメタリコン電極を形成して母素子を切断して得
られた単位素子の切断面に沿つて電気的に蒸着電
極の一部を放電除去し、前記切断面に蒸着電極マ
ージンを形成することを特徴とするものである。
[Structure of the Invention] (Means for Solving the Problems) The method for manufacturing a multilayer film capacitor of the present invention includes alternately laminating a plurality of metalized films each having a vapor-deposited electrode, leaving a blank space at one end in the length direction. Then, metallicon electrodes are formed on both end faces, and a part of the vapor deposited electrode is electrically discharged and removed along the cut surface of the obtained unit element by cutting the mother element, and a vapor deposited electrode margin is formed on the cut surface. It is characterized by this.

(作用) 以上の手段によれば、切断面への蒸着電極マー
ジン形成として電気的に行うものであるため、マ
ージン形成のコントロールが容易であり、かつバ
ラツキのない均一なマージン形成が可能となり任
意な定格の積層フイルムコンデンサの確保ならび
に諸特性良好にして信頼性の向上に大きく寄与で
きると同時に、プロセスが簡略化され作業性およ
び能率向上に大きく寄与できる。
(Function) According to the above means, since the margin formation of the evaporation electrode on the cut surface is performed electrically, the margin formation can be easily controlled, and uniform margin formation without variation is possible. This can greatly contribute to improving reliability by securing a laminated film capacitor of the specified rating and having good characteristics, while at the same time simplifying the process and greatly contributing to improving workability and efficiency.

(実施例) 以下、本発明の一実施例につき説明する。第1
図および第2図は本発明によつて得られた積層フ
イルムコンデンサを示すもので、このコンデンサ
1形成手段としてたとえば第3図に示すように幅
方向の一方端に余白部2を形成し、蒸着電極3を
施した金属化フイルム4一対を大口径巻芯(図示
せず)に積層巻回し、両端面にメタリコン電極5
を形成してなる母素子6を前記大口径巻芯から取
りはずし回転鋸刃で半径方向に切断し、しかるの
ち第4図に示すように切断によつて得た単位素子
7のメタリコン電極5を一括して正電位を印加
し、切断面8,9それぞれに負電位を印加した金
属ブラシ10を当接・放電させ蒸着電極3先端部
を除去し切断面8,9それぞれに蒸着電極マージ
ン11を形成してなるものである。
(Example) An example of the present invention will be described below. 1st
2 and 2 show a laminated film capacitor obtained according to the present invention. As a means for forming this capacitor 1, for example, as shown in FIG. A pair of metallized films 4 provided with electrodes 3 are laminated and wound around a large-diameter winding core (not shown), and metallicon electrodes 5 are provided on both end faces.
The mother element 6 formed with the above is removed from the large-diameter winding core and cut in the radial direction with a rotating saw blade.Then, as shown in FIG. 4, the metallicon electrodes 5 of the unit elements 7 obtained by cutting are collectively Then, a metal brush 10 applied with a negative potential is brought into contact with the cut surfaces 8 and 9 to remove the tip of the vapor deposition electrode 3, and a vapor deposition electrode margin 11 is formed on each of the cut surfaces 8 and 9. This is what happens.

なお、この場合の電流は印加電圧によつて異な
るが、およそ3mH以下が適当である。
Note that the current in this case varies depending on the applied voltage, but is suitably approximately 3 mH or less.

以上のように構成してなる積層フイルムコンデ
ンサの製造方法によれば、第5図に示すように印
加電圧により蒸着電極マージン11寸法を制御
し、かつ放電電流を適宜制限して過剰エネルギー
の放電を抑えることによつて任意で、かつ均一な
蒸着電極マージン11形成が容易に可能となり、
誘電体としてのフイルムの沿面放電劣化がなく、
容量バラツキ、絶縁抵抗バラツキのない積層フイ
ルムコンデンサを容易に得ることができる。
According to the method for manufacturing a multilayer film capacitor constructed as described above, as shown in FIG. 5, the dimension of the deposited electrode margin 11 is controlled by the applied voltage, and the discharge current is appropriately limited to prevent excessive energy from being discharged. By suppressing the evaporation electrode margin 11, it becomes possible to easily form the evaporation electrode margin 11 arbitrarily and uniformly.
There is no creeping discharge deterioration of the film as a dielectric material,
A multilayer film capacitor with no variation in capacitance or variation in insulation resistance can be easily obtained.

なお、単位素子形成手段として上記実施例では
大口径巻芯に巻回して形成した母素子を半径方向
に切断することによつて得るものを例示して説明
したが、第6図に示すように長帯金属化フイルム
12を交互に積層し、第7図に示すように熱プレ
スにより熱圧着一体化し両端面にメタリコン電極
13を形成してなる母素子14をメタリコン電極
13を直角にa−a方向に複数に切断するように
してもよい。
In the above embodiment, the unit element forming means is obtained by radially cutting a mother element formed by winding it around a large-diameter winding core, but as shown in FIG. As shown in FIG. 7, the metallized film strips 12 are laminated alternately, and the metallicon electrodes 13 are formed on both end faces of the mother element 14. It may be cut into a plurality of pieces in the direction.

また、蒸着電極マージン11形成手段として上
記実施例ではメタリコン電極5を一括して正電位
を印加し、切断面8,9に負電位を印加する方法
を例示して説明したが、第8図に示すように一方
の切断面8に正電位を、他方の切断面9に負電位
を印加しても同効である。
Further, in the above embodiment, as a means for forming the vapor deposition electrode margin 11, a method of applying a positive potential to the metallicon electrodes 5 all at once and applying a negative potential to the cut surfaces 8 and 9 was explained as an example, but FIG. As shown, the same effect can be obtained by applying a positive potential to one cut surface 8 and applying a negative potential to the other cut surface 9.

さらに、以上の説明に加え第9図に示すように
蒸着電極マージン5形成面に樹脂15を塗布し、
蒸着電極マージン5を密封するようにすれば信頼
性を高めるうえでより効果的である。またこの場
合樹脂に代えて蒸着電極マージン5形成面を熱溶
着しても同効である。
Furthermore, in addition to the above explanation, as shown in FIG. 9, a resin 15 is applied to the surface on which the vapor deposition electrode margin 5 is formed,
It is more effective to improve reliability if the vapor deposition electrode margin 5 is sealed. Further, in this case, the same effect can be achieved even if the surface on which the vapor deposition electrode margin 5 is formed is thermally welded instead of using resin.

[発明の効果] 本発明によれば切断面に所望の蒸着電極マージ
ン形成が容易となり、諸特性劣化要因を除去した
信頼性の高い積層フイルムコンデンサが得られる
実用的価値の高い積層フイルムコンデンサの製造
方法を得ることができる。
[Effects of the Invention] According to the present invention, it is easy to form a desired evaporated electrode margin on the cut surface, and a highly reliable multilayer film capacitor that eliminates various characteristics deterioration factors can be obtained, and a multilayer film capacitor with high practical value can be manufactured. How can you get it?

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第4図は本発明の一実施例に係り、第
1図および第2図はコンデンサを示し第1図は要
部破断斜視図、第2図はA−A断面図、第3図は
母素子を示す一部展開斜視図、第4図は蒸着電極
マージン形成手段を示す斜視図、第5図は印加電
圧−蒸着電極マージン深さとの相関図、第6図〜
第7図は他の実施例に係る母素子形成手段に係り
第6図は金属化フイルムの積層状態を示す斜視
図、第7図は母素子の斜視図、第8図は本発明の
他の実施例に係る蒸着電極マージン形成手段を示
す斜視図、第9図は他の実施例に係るコンデンサ
を示す側断面図、第10図および第11図は従来
例に係るコンデンサそれぞれを示す要部破断斜視
図である。 2……余白部、3……蒸着電極、4……金属化
フイルム、5……メタリコン電極、6……母素
子、7……単位素子、8……切断面、9……切断
面、11……蒸着電極マージン、13……メタリ
コン電極、14……母素子、15……樹脂。
1 to 4 relate to an embodiment of the present invention, FIGS. 1 and 2 show a capacitor, FIG. 1 is a perspective view of the main parts, FIG. The figure is a partially expanded perspective view showing the mother element, FIG. 4 is a perspective view showing the vapor deposition electrode margin forming means, FIG. 5 is a correlation diagram between applied voltage and vapor deposition electrode margin depth, and FIGS.
FIG. 7 shows a mother element forming means according to another embodiment, FIG. 6 is a perspective view showing a stacked state of metallized films, FIG. 7 is a perspective view of the mother element, and FIG. 8 is a perspective view of another embodiment of the present invention. FIG. 9 is a perspective view showing a vapor deposition electrode margin forming means according to an embodiment, FIG. 9 is a side sectional view showing a capacitor according to another embodiment, and FIG. 10 and FIG. FIG. 2... Margin, 3... Vapor deposited electrode, 4... Metallized film, 5... Metallicon electrode, 6... Mother element, 7... Unit element, 8... Cut surface, 9... Cut surface, 11 ... Vapor deposition electrode margin, 13 ... Metallicon electrode, 14 ... Mother element, 15 ... Resin.

Claims (1)

【特許請求の範囲】 1 長さ方向一端部に余白部を残し蒸着電極を施
した金属化フイルムを交互に複数枚積層し両端面
にメタリコン電極を形成して母素子を形成する手
段と、該母素子を切断し単位素子を得る手段と、
該単位素子の切断面に沿つて電気的に前記蒸着電
極の一部を放電除去し前記切断面に蒸着電極マー
ジンを形成する手段とを具備したことを特徴とす
る積層フイルムコンデンサの製造方法。 2 切断面への蒸着電極マージン形成としてメタ
リコン電極と切断面間に電圧を印加・放電するこ
とによつて行うことを特徴とする特許請求の範囲
第1項記載の積層フイルムコンデンサの製造方
法。 3 切断面への蒸着電極マージン形成として切断
面間に電圧を印加・放電することによつて行うこ
とを特徴とする特許請求の範囲第1項記載の積層
フイルムコンデンサの製造方法。 4 蒸着電極マージンを形成した切断面を樹脂に
て被覆することを特徴とする特許請求の範囲第1
項〜第3項のいずれかに記載の積層フイルムコン
デンサの製造方法。 5 蒸着電極マージンを形成した切断面を熱溶着
により被覆することを特徴とする特許請求の範囲
第1項〜第3項のいずれかに記載の積層フイルム
コンデンサの製造方法。
[Scope of Claims] 1. A means for forming a mother element by alternately stacking a plurality of metallized films on which vapor-deposited electrodes are applied, leaving a margin at one end in the length direction, and forming metallicon electrodes on both end faces; means for cutting the mother element to obtain unit elements;
A method for manufacturing a multilayer film capacitor, comprising means for electrically discharging and removing a part of the vapor deposited electrode along a cut surface of the unit element to form a vapor deposit electrode margin on the cut surface. 2. The method for manufacturing a multilayer film capacitor according to claim 1, wherein the formation of a vapor deposited electrode margin on the cut surface is carried out by applying and discharging a voltage between the metallicon electrode and the cut surface. 3. The method of manufacturing a multilayer film capacitor according to claim 1, wherein the formation of a vapor deposition electrode margin on the cut surfaces is carried out by applying and discharging a voltage between the cut surfaces. 4. Claim 1, characterized in that the cut surface on which the vapor deposited electrode margin is formed is covered with a resin.
A method for manufacturing a multilayer film capacitor according to any one of items 1 to 3. 5. The method for manufacturing a multilayer film capacitor according to any one of claims 1 to 3, characterized in that the cut surface on which the vapor-deposited electrode margin is formed is covered by thermal welding.
JP9462187A 1987-04-16 1987-04-16 Manufacture of laminated film capacitor Granted JPS63260011A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9462187A JPS63260011A (en) 1987-04-16 1987-04-16 Manufacture of laminated film capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9462187A JPS63260011A (en) 1987-04-16 1987-04-16 Manufacture of laminated film capacitor

Publications (2)

Publication Number Publication Date
JPS63260011A JPS63260011A (en) 1988-10-27
JPH0563008B2 true JPH0563008B2 (en) 1993-09-09

Family

ID=14115326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9462187A Granted JPS63260011A (en) 1987-04-16 1987-04-16 Manufacture of laminated film capacitor

Country Status (1)

Country Link
JP (1) JPS63260011A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02290009A (en) * 1989-04-28 1990-11-29 Marcon Electron Co Ltd Manufacture of laminated film capacitor

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497413A (en) * 1972-05-10 1974-01-23
JPS5565423A (en) * 1978-11-13 1980-05-16 Nichicon Capacitor Ltd Method of manufacturing laminated film capacitor
JPS5610736A (en) * 1979-07-06 1981-02-03 Tech Res & Dev Inst Of Japan Def Agency Haar development type signal detector
JPS5721808A (en) * 1980-07-15 1982-02-04 Matsushita Electric Ind Co Ltd Method of creeping deposited film
JPS6129533A (en) * 1984-07-20 1986-02-10 日本特殊塗料株式会社 Vibration-damping treatment method of car

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497413A (en) * 1972-05-10 1974-01-23
JPS5565423A (en) * 1978-11-13 1980-05-16 Nichicon Capacitor Ltd Method of manufacturing laminated film capacitor
JPS5610736A (en) * 1979-07-06 1981-02-03 Tech Res & Dev Inst Of Japan Def Agency Haar development type signal detector
JPS5721808A (en) * 1980-07-15 1982-02-04 Matsushita Electric Ind Co Ltd Method of creeping deposited film
JPS6129533A (en) * 1984-07-20 1986-02-10 日本特殊塗料株式会社 Vibration-damping treatment method of car

Also Published As

Publication number Publication date
JPS63260011A (en) 1988-10-27

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