JPH056208A - Controller and control method therefor - Google Patents

Abstract

PURPOSE:To prepare a program without being conscious of the address of the multi-direction access memory of a special function part, to speedily recognize an operation executed by the instruction by observing the instruction form and to obtain the high readability of the program. CONSTITUTION:At a CPU unit 1, it is discriminated according to an instruction symbol that the instruction is correspondent to the special function part, that the program is executed with an instruction step using the instruction symbol expressing the class and that the instruction step under execution is correspondent to the special function part, the contents of the instruction step are stored in a multi-direction access memory 41 of a correspondent special function unit 4A, and the execution is requested to the special function unit 4A. Then, the contents of the instruction step stored in the multi-direction access memory 41 are accessed based on the instruction symbol without depending on a memory address and executed at the special function unit 4A.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control device provided with a special function part for performing special control other than standard program control such as sequence control performed by the CPU part in response to a command from the CPU part, and its control. It is about the method.

[0002]

2. Description of the Related Art A programmable controller as a control device was originally just a replacement of a relay board,
Due to the ease and flexibility of the program and the advancement of higher functionality, the applicable fields have expanded dramatically. Along with this, not only sequence control but also various controls such as analog control, positioning control, communication control, monitor display, etc. have come to be performed by a programmable controller. The sequence control is mainly C which is one of the constituent units of the programmable controller.
The PU unit is in charge of control, and various types of control other than the sequence control are mainly controlled by the special function unit group and are shared and controlled. Further, the CPU unit controls the whole by writing instruction data and reading result data to the special function unit group. As the control system becomes large-scale and complicated, the special function unit is now indispensable.

The reading / writing of data with the special function unit in the CPU unit will be described below. FIG. 7 is a system configuration diagram of the programmable controller. In the figure, reference numeral 1 is a CPU unit that controls the entire programmable controller, and includes a program memory 11 in which a sequence program is stored, and a device memory 12 used in the sequence program or storing operation result data. 2 is a program device for creating a sequence program to be stored in the program memory 11, 3 is a communication cable connecting the CPU unit 1 and the program device 2, 4 is an input / output unit, and 4A is a special function unit. Two-port memory 41 as a multidirectional access memory capable of reading and writing data between the unit 4A and the CPU unit 1
Equipped with.

FIGS. 21A to 21C show examples of the structure of the 2-port memory 41. The structures of the 2-port memory 41A of the 2CH D / A unit, the 2-port memory 41B of the 8CH D / A unit, and the 2-port memory 41C of the display unit are respectively shown. Here is an example:

FIG. 22 shows a format of an instruction for reading / writing data from / to the special function unit in the CPU unit 1. In the figure, 5 is a CPU unit 1
Is an instruction to read data from the special function unit 4A, the input / output NO 51 corresponding to the mounting position of the special function unit 4A, the start address 52 when reading the data in the 2-port memory 41 of the special function unit, and the read data Is composed of a head device 53 of the device memory 12 for storing the data and a score 54 of data to be transferred. Reference numeral 6 is an instruction for the CPU unit 1 to write data to the special function unit 4A. The input / output NO 61 and the special function unit 4 corresponding to the mounting position of the special function unit 4A.
It is composed of a head address 62 of the 2-port memory 41 for writing the data of A, a head device 63 of the device memory 12 in which the data for writing is stored, and a score 64 of the data to be transferred.

FIG. 23 is a diagram showing a specific example of an instruction for reading / writing data from / to the special function unit 4A in the CPU unit 1. In the figure, 6A is the device D at the address 2 of the 2-port memory 41 of the special function unit 4A mounted at the input / output NO50 position.
This is an instruction to write the contents of 0 for one point, and 6B is an input / output
This is a command for writing one point of the contents of the device D0 to the address 8 of the 2-port memory 42 of the special function unit 4A mounted at the position of O50.

Next, a specific operation, for example, input / output NO
2CH D / as special function unit 4A at position 50
Consider a program in which an A unit (special function unit having two digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output on the 1st CH. In this case, as can be seen from the port memory configuration example shown in FIG. 21a, the content of the device D0 may be written in address 2 of the 2-port memory 41A. That is, the program 6A in FIG. 23 is obtained. The user uses the programming device 2 to program 6 in FIG.
A is created and the program memory 11 of the CPU unit 1 is created.
The program 6A is written in the program via the communication cable 3.

Next, when the CPU unit 1 actually executes the program 6A written in the program memory 11, 2 of the 2CH D / A units mounted at the position of the input / output NO50 designated by the program. The contents of the device D0 of the device memory 12 are written to the address 2 of the port memory 41A. 2CH D / A unit is 2
An analog value corresponding to the contents of address 2 of the port memory 41A is output.

Next, for example, at the input / output NO50 position, 8
Consider a program in which a CH D / A unit (special function unit having eight digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output on the 1st CH. In this case, 2 in FIG.
As is clear from the port memory configuration example, the contents of the device D0 may be written in the address 8 of the 2-port memory 41B, that is, the program 6B in FIG. The user can use the programming device 2 to execute the process shown in FIG.
The program 6B is created and the program 6B is written into the program memory 11 of the CPU unit 1 via the communication cable 3. Next, the CPU unit 1 actually executes the program 6B written in the program memory 11.
Input / output N specified by the program when executing
The content of the device D0 of the device memory is written to address 8 of the 2-port memory 41B in the 8CH D / A unit mounted at the position of O50. 8CH D /
The A unit outputs an analog value according to the contents of address 8 in the buffer memory 41B.

Further, for example, regarding a program for mounting a display unit as a special function unit 4A having a display function at the position of input / output NO50 and displaying a character corresponding to the contents of the device D0 in the first row and third column Think In this case, as can be seen from the buffer memory configuration example of FIG. 21c, the content of the device D0 may be written in address 2 of the 2-port memory 41C, that is, the program 6A in FIG. The user creates the program 6A in FIG. 23 by the programming device 2 and writes the program 6A in the program memory 11 of the CPU unit 1 via the communication cable 3. Next, the CPU unit 1 actually causes the program memory 11
When executing the program 6A written in, the contents of the device D0 of the device memory are written to the address 2 of the 2-port memory 41C of the display unit mounted at the position of the input / output NO50 designated by the program 6A.
The display unit represents a character corresponding to the contents of address 2 of the 2-port memory 41C.

As described above, conventionally, there are only a few kinds of commands for the special function unit, such as FROM and TO, and it has been attempted to process all the special function units with these commands. Therefore, the program 6A may at some time be on the first channel. It becomes an analog output command, and sometimes it becomes a display command. Also, when analog output is performed on the 1st CH of the D / A unit, it becomes program 6A or program 6B due to the difference in the number of channels of the D / A unit. It becomes a program.)

[0012]

As described above, the conventional control method of the control device has a small number of types of instructions for the special function section, and all the processing for the special function section is performed with these few instructions. Command a completely different operation, and the format of the instruction for the same operation is different, the operation commanded by the instruction is completely unknown by looking at the instruction format, and the address of the multi-directional read memory is taken into consideration. There was a problem that the program had to be created, and the creation of the program was troublesome.

The present invention has been made to solve the above problems, and a program can be created without being aware of the address of the multi-directional access memory of the special function section, and its instruction format An object of the present invention is to obtain a control device and a control method thereof in which the operation performed by an instruction can be immediately understood and the readability of a program is good.

[0014]

According to a first aspect of the present invention, there is provided a control method for a control device, comprising: a CPU section for controlling a program; and a multidirectional access memory accessible from the CPU section. In a control device provided with a plurality of special function parts for performing special control according to the command of step 1, and creating a program having command steps using command symbols representing the special function part corresponding commands and their types. The CPU unit executes the program, determines that the command step being executed is a special function unit corresponding command by the command symbol, and determines the contents of the command step in the multidirectional direction of the corresponding special function unit. The step of storing the data in the access memory and requesting the special function unit to execute it, and the step of storing the multi-directional access memory in the special function unit. The by contents of the instruction step is made of a step of performing access based on the instruction symbol regardless of the memory address.

The control method of the control device according to the second invention is the control method of the control device according to the first invention, wherein the command symbol of the command step represents a command corresponding to the special function part and the special symbol. It is composed of a second symbol indicating a function type, and it is determined by the first symbol that the instruction step being executed is a special function unit corresponding instruction, and the special function unit stores it in the multi-directional access memory. The contents of the instruction step are accessed and executed based on the second symbol without depending on the memory address.

Further, a program control method for a control device according to a third aspect of the present invention is the control device according to the first aspect, wherein a multidirectional access memory having command information corresponding to each of the plurality of special function units is provided. A step of storing and creating a program having an instruction step using an instruction symbol representing the instruction corresponding to the special function section and its type, and executing the program in the CPU section and executing the program. It is determined by the instruction symbol that the instruction step is an instruction corresponding to the special function section, the instruction information stored in the multi-directional access memory of the corresponding special function section is accessed, and the instruction information and the instruction step If the contents match, a step of requesting the special function unit to execute the special function unit according to the command information, and the special function unit The execution portion of the instruction information stored to access memory to access based on the instruction symbol, is made of a step of executing instructions.

The control method of the control device according to the fourth aspect of the present invention is the control method of the control device according to the third aspect of the invention, wherein the instruction symbol of the instruction step represents the special function corresponding instruction and the special symbol. It is composed of a second symbol representing a function type, and it is determined by the first symbol that the instruction step being executed is the instruction corresponding to the special function unit, and the special function unit stores it in the multi-directional access memory. The executed part of the executed instruction information is accessed based on the second symbol to execute the instruction.

A control device according to a fifth aspect of the present invention includes a CPU section for performing program control, and a special function section for performing special control according to a command from the CPU section, and the special function section accesses the special function section. Has a memory for storing the instruction information to be accessed and accessible from both the CPU section and the special function section, and an information storage unit for storing the instruction information in the memory, and the CPU section has an arbitrary instruction name. And an instruction discriminating means for discriminating that the instruction in the program inputted in step 3 is an instruction for accessing the special function section, and decoding the instruction for accessing the special function section to obtain the instruction information stored in the memory. And an instruction executing means for executing the decoded instruction based on the above.

A control device according to a sixth aspect of the present invention includes a CPU section for performing program control, and a special function section for performing special control according to a command from the CPU section, and the special function section accesses the special function section. Has a command information memory that stores the command information to be accessed and that can be accessed from the CPU unit, and the CPU unit has an instruction in the program input with an arbitrary command name that accesses the special function unit. And an instruction executing means for decoding an instruction for accessing the special function unit and executing the decoded instruction based on the instruction information stored in the instruction information memory. Is.

A control device according to a seventh aspect of the present invention includes a CPU section for performing program control and a special function section for performing special control according to a command from the CPU section. The special function section accesses the special function section. And a first instruction information memory that is accessible from the CPU unit, the CPU unit including a second instruction information memory that can store the instruction information and the first instruction information memory. Data transfer means for transferring and storing the command information stored in the command information memory in the second command information memory,
An instruction discriminating means for discriminating that the instruction in the program inputted with an arbitrary instruction name is an instruction for accessing the special function section, and decoding the instruction for accessing the special function section,
An instruction executing means for executing the decoded instruction based on the instruction information stored in the second instruction information memory.

A control device according to an eighth aspect of the present invention is the control device according to the sixth aspect, wherein the special function section stores a sequence program instead of the instruction information memory and is accessible from the CPU section. And reading the sequence program corresponding to the instruction to access the special function unit decoded by the CPU unit from the sequence program storage memory and executing the sequence program.

According to a ninth aspect of the present invention, in the control device according to the seventh aspect, the special function section stores a sequence program instead of the first instruction information memory, and C
It has a first sequence program storage memory accessible from the PU unit, and the CPU unit transfers the sequence program stored in the first sequence program storage memory instead of the second instruction information memory. A second sequence program storage memory for storing is stored, and the sequence program corresponding to the decoded instruction to access the special function unit is read from the second sequence program storage memory and executed.

A control device according to a tenth aspect of the present invention is the control device according to the sixth aspect, wherein the special function section stores a microcomputer program instead of the instruction information memory and is accessible from the CPU section. And reads the microcomputer program corresponding to the instruction to access the special function unit decoded by the CPU unit from the microcomputer program storage memory and executes the program.

An eleventh aspect of the present invention is the control device according to the seventh aspect, wherein the special function section stores a microcomputer program instead of the first instruction information memory, and C
A first microcomputer program storage memory accessible from the PU unit is provided, and the CPU unit transfers the microcomputer program stored in the first microcomputer program storage memory instead of the second instruction information memory. A second microcomputer program storage memory for storing the stored microcomputer is stored, and the microcomputer program corresponding to the decoded instruction to access the special function unit is read from the second microcomputer program storage memory and executed.

[0025]

According to the first aspect of the present invention, the CPU unit executes the program having the instruction step using the instruction symbol corresponding to the special function portion corresponding instruction and its type, and the instruction step being executed has the special function. It is determined by the instruction symbol that the instruction is a section corresponding instruction, the content of the instruction step is stored in the multi-directional access memory of the corresponding special function section, and the special function section is requested to execute the instruction. The contents of the instruction step stored in the multi-directional access memory in the functional unit are accessed and executed based on the instruction symbol without depending on the memory address.

Further, in the second invention, the instruction symbol of the instruction step in the first invention comprises the first symbol representing the special function unit corresponding instruction and the second symbol representing the special function type, which is being executed. It is determined by the first symbol that the instruction step is the instruction corresponding to the special function unit, and the execution portion of the instruction information stored in the multi-directional access memory by the special function unit is the second symbol. Is executed according to the instruction and the instruction is executed.

In the third invention, the instruction information corresponding to each of the plurality of special function units is stored in the corresponding multidirectional access memory, and the CPU unit identifies the special function unit corresponding instruction and its type. A program having an instruction step using an instruction symbol indicating is executed, and it is determined by the instruction symbol that the instruction step being executed is an instruction corresponding to the special function unit, and the multidirectional access of the corresponding special function unit is performed. When the instruction information stored in the memory is accessed and the instruction information and the content of the instruction step match, the special function unit is requested to execute the instruction information, and the special function unit performs the multidirectional operation. The execution portion of the instruction information stored in the access memory is accessed by the instruction symbol to execute the instruction.

Further, in the fourth invention, the instruction symbol of the instruction step in the third invention comprises the first symbol representing the special function unit corresponding instruction and the second symbol representing the special function type, which is being executed. It is determined by the first symbol that the instruction step is the instruction corresponding to the special function unit, and the execution portion of the instruction information stored in the multi-directional access memory by the special function unit is the second symbol. Is executed according to the instruction and the instruction is executed.

In the fifth invention, the instruction discriminating means of the CPU portion discriminates that the instruction in the program inputted with an arbitrary instruction name is an instruction to access the special function portion,
The instruction executing means decodes an instruction to access the special function unit, stores information for an instruction to access the special function unit included in the special function unit, and is a memory accessible from both the CPU unit and the special function unit. The decoded command is executed based on the command information stored in the CPU, and the special function unit performs special control according to a command from the CPU unit.

In the sixth invention, the instruction executing means of the CPU section decodes the instruction for accessing the special function section among the instructions in the program inputted by an arbitrary instruction name, and the special function section has the above-mentioned. The decoded instruction is executed based on the instruction information stored in the instruction information memory accessible from the CPU unit.

In the seventh invention, the data transfer means of the CPU section has the second command information memory which the CPU section has the command information stored in the first command information memory of the special function section. The instruction execution means decodes the instruction for accessing the special function part among the instructions in the program inputted with an arbitrary instruction name, and stores the instruction in the second instruction information memory. The decoded instruction is executed based on the usage information.

In the eighth invention, the instruction executing means of the CPU section decodes the instruction for accessing the special function section among the instructions in the program inputted with an arbitrary instruction name, and the decoded special function section is executed. The CP having the sequence program corresponding to the instruction to be accessed, which is included in the special function unit.
It is executed by reading it from the sequence program storage memory accessible from the U section.

In the ninth invention, the data transfer means of the CPU section stores the sequence program stored in the first sequence program storage memory of the special function section in the second sequence program storage memory of the CPU section. The command executing means transfers and stores the command, and the command executing means decodes a command for accessing the special function part of the commands in the program inputted with an arbitrary command name, and corresponds to the command for accessing the decoded special function part. The sequence program is read from the second sequence program storage memory and executed.

In the tenth aspect of the invention, the instruction executing means of the CPU section decodes the instruction for accessing the special function section among the instructions in the program inputted with an arbitrary instruction name, and the decoded special function section is executed. The CP having the special function unit has a microcomputer program corresponding to an instruction to be accessed.
The program is read from the microcomputer program storage memory accessible from the U section and executed.

In the eleventh aspect, the data transfer means of the CPU section stores the microcomputer program stored in the first microcomputer program storage memory of the special function section in the second microcomputer program storage memory of the CPU section. The command executing means transfers and stores the command, and the command executing means decodes a command for accessing the special function part of the commands in the program inputted with an arbitrary command name, and corresponds to the command for accessing the decoded special function part. The microcomputer program is read from the second microcomputer program storage memory and executed.

[0036]

【Example】

Example 1. An embodiment of the first invention will be described below with reference to the drawings. The configuration of the programmable controller as the control device is almost the same as that of the conventional example shown in FIG. 7, and the description thereof will be omitted.

FIG. 1 is a diagram showing the format of the special function unit corresponding instruction 7, and shows that an arbitrary instruction name can be described after Z_. In the figure, 71 is an input / output NO corresponding to the mounting position of the special function unit, and 72 is a portion described as necessary.

The instruction symbol Z _... in the special function unit corresponding instruction 7 indicates the special function corresponding instruction and its type, and is the first symbol Z_ indicating the special function corresponding instruction. , The second symbol indicating the special function type (for example, in the case of an instruction to output an analog value on the 1st channel, ANALOG_1
The symbol is written).

FIG. 2 shows an example of a special function unit corresponding instruction. In the figure, 7A is a command for writing the contents of the device D0 as an analog output command value on the 1st CH of the D / A unit mounted at the position of input / output NO50,
Reference numeral 7B is an instruction indicating the contents of the device D0 at the 1st row and 3rd column of the display unit mounted at the position of the input / output NO50.

3A to 3E show examples of the structure (contents) of the 2-port memory 41 as a bidirectional access memory which can be accessed from both the CPU unit 1 / special function unit 4A. In the figure, 41AA is a general example of the memory structure of the special function unit, 41BA is the analog output to the 1CH of the 2CHD / A unit or the 8CHD / A unit, and 41CA is the display unit erroneously commanding the analog output. 41DA is a configuration example of the 2-port memory 41 when the display position of the display unit is changed, and 41EA when the display unit is displayed.

FIG. 4 is an operation flow chart of the programmable controller and the program device shown in FIG. 7. Flow A is the program device 2 and flow B is the CP.
The flow C of the U unit 1 shows the operation flow of the special function device 4A.

Next, the operation will be described with reference to the flowchart shown in FIG. When a program is created by the programming device 2, if Z_ is entered at the beginning of the input of the instruction name of the instruction step, then the special function unit 4 can predefine and accept the input of any decipherable instruction name. I will keep it. Step 101 in Flow A
Then, the program device 2 creates a program of the format shown in FIG. 3, and transfers the program to the program memory 11 of the CPU unit 1 via the communication cable 3 in step 102. Next, in the flow B, the CPU unit 1 stores the sequence program transferred in step 111 in the program memory 11,
2 access and decrypt the first program step,
In step 113, the first two characters of the instruction name of the instruction are Z_
If so, it is determined that the instruction is for the special function unit.
If the command does not correspond to the special function unit, step 118
Perform normal sequence processing at.

Next, the CPU unit 1 performs step 11
An instruction determined to be a special function unit corresponding instruction in 4 and 115 and the device memory 12 designated by the instruction
If the data is stored in, the contents are stored in the 2-port memory 41 in the special function unit 4A attached to the position of the input / output NO designated by the command, and executed in the special function unit 4A in step 116. Make an interrupt as a command. When the special function unit 4A recognizes this interrupt in step 121 of the flow C, the special function unit 4A determines in step 122 the 2-port memory 4
The instruction corresponding to the special function unit stored in 1 is read, and it is checked whether or not the content of this instruction is the instruction defined by the special function unit 4A. If not, an error occurs, and error processing is performed in step 127. If not, the instruction is decoded in step 124 and the processing defined in step 125 is executed. At this time, if necessary, the device data contents stored in the 2-port memory 41 are used for execution.

Next, in step 126, the special function unit 4A stores information such as whether the special function unit 4A has executed normally / has an error, and if there is data to be returned to the CPU unit 1, the data is stored in the 2-port memory 41, and the CPU unit is stored. 1 makes the execution result accessible. At step 117 in the flow B, the CPU unit 1 performs a process determined based on the execution result, returns to the next step process, that is, step 112, and executes the next instruction.

The predetermined processing includes, for example, no processing when executed normally, error display when there is an error, and C
When there is data to be returned to the PU unit 1, the data is transferred to the device memory 12 or the like.

In the 2CHD / A unit (special function unit having two digital / analog conversion functions), Z_A
It is assumed that NALOG_1 is defined as an instruction to output an analog value on CH1 and Z_ANALOG_2 is defined as an instruction to output an analog value on CH2. Similarly, 8C
Even in the HD / A unit (special function unit having eight digital / analog conversion functions), Z_ANALOG_1 and Z_ANALOG_2 are on the 1st CH and 2C, respectively.
It is assumed that it is defined as an instruction for outputting an analog value to the Hth. Further, in the display unit, LOCATE is defined as a command for designating a display position and a command represented by PRINT.

In the above, 2 is placed at the position of input / output NO50.
CHD / A unit (digital / analog conversion function 2
Consider a program in the case of mounting a special function unit having two units and outputting an analog value corresponding to the contents of the device D0 on the 1st CH.

In this case, the program is the program step 7A shown in FIG. The user creates the program 7A of FIG. 3 by the programming device and writes the program 7A in the program memory 11 of the CPU unit 1 via the communication cable 3. Next, the program 7A in which the CPU unit 1 is actually written in the program memory 11
, The first two characters of the instruction name of the instruction are Z
_ Is determined, and it is determined that the instruction is a special function unit compatible instruction. Next, the CPU unit 1 determines the D of the device memory 12 designated by the program and the instruction.
The contents of 0 are stored in the 2-port memory 41 in the 2CHD / A unit mounted at the position of the input / output NO50 designated by the command, and the 2CHD / A unit is interrupted. When the 2CHD / A unit recognizes this interrupt, the 2CHD / A unit recognizes the 2-port memory 4
The special function unit corresponding instruction stored in 1 is 2CH
Check if the command is defined by D / A unit, 1CH
When it is judged that the instruction is to output the content of the device memory as an analog value to the eye, an analog value corresponding to the content of D0 of the device memory 12 stored in the 2-port memory 41 is output to 1CH.

Next, for example, at the position of input / output NO50, 8
CHD / A unit (8 digital / analog conversion functions
Consider a program in the case of mounting a special function unit having two units and outputting an analog value corresponding to the contents of the device D0 on the 1st CH. In this case as well, the program becomes the instruction e of FIG.

As described above, the special function unit corresponding command having the same function has the same command name of Z_ANALOG_1, and it is also easily understood that the command name is output and the analog value is output to the first channel.

Example 2. Next, an embodiment of the control device and method according to the third to fifth inventions will be described with reference to the drawings. The configuration of the programmable controller is almost the same as that of the conventional example and that of FIG. 7 described in the first aspect of the invention, and the description thereof will be omitted.

5a-d show a two-port memory 41 accessible by both the CPU unit / special function unit.
Is a configuration example (contents of special function unit corresponding command information). In the figure, 41AB is a general example of a special function unit. The memory is shown in bytes and all special function units are organized in this way. At address 0, the total number 4120 of special function unit corresponding instructions defined in the cono unit is stored. After that, information of each special function unit corresponding instruction is stored. This information will be described using the first instruction as an example. In the address 1, the instruction name 4121a of the special function unit corresponding instruction defined first is stored in the character code. At address 11, the number of device memories 4121b defined by the above instruction is set, and at address 12, the available type of device memory 4121c is set.
Is converted into a code and stored. The read / write section 4121d is stored in the address 13, and the start address 4121e of the buffer memory to be accessed is stored in the address 14.
In address 15, the number 4121f to be read / written from the top address of the buffer memory is stored. C when reading / writing to address 16
The handshake signal that the PU unit must perform and its ON / OFF state 4121g are set to the address 1
7 stores a flag 4121h indicating whether the instruction can be executed. Information of one command is 4121a ~
4121h is shown as a set of instruction information 4121, and information 4122 to 412n for each instruction is stored for the total number of special function unit corresponding instructions, which is stored at address 0 below.

In the following, 41BB is in 2 CHD / A units, 41CB is in 8 CHD / A units, 4
1DB is a configuration example of each memory in the display unit.

FIG. 6 shows C when executing a special function unit corresponding instruction in the embodiment using the method of the second invention.
There is a flow chart showing the processing operation of the PU unit.

Next, the operation will be described. When the program device 2 shown in FIG. 7 executes a program, if Z_ is entered at the beginning of the input of the command name, the input of any command name can be accepted thereafter, and the program device 2 shows the command name shown in FIG. Create a program of the form like
The program is written in the program memory 11 of the unit 1 via the communication cable 3. Next, when the CPU unit 1 executes the sequence program written in the program memory 11, if the first two characters of the instruction name of the instruction are Z_ in step 201 in the flowchart shown in FIG. If it is determined that there is a character other than Z_, a sequence process which is a normal instruction process is executed in step 2-8. The above operation is similar to that of the first invention. The above operation is similar to that of the first invention.

Next, the CPU unit 1 executes step 20.
The instruction determined to be the special function unit corresponding instruction in 3 is based on the special function unit corresponding instruction information stored in the 2-port memory 41 in the special function unit 4 mounted at the input / output no position designated by the instruction. The number of instructions 4120 defined in this unit is read, and the instructions corresponding to the character code are retrieved from the instructions of the special function unit corresponding to that number, and it is checked in step 203 whether this instruction is defined in this special function unit. . If no matching instruction is found, it is considered that this instruction name is not defined on the special function unit side, and an error is determined in step 207.
Error processing is performed with, and if found, it is regarded as defined and moves to the next processing. First, in step 204, it is determined whether the information necessary for executing the instruction is defined, that is, whether the instruction structure is correct. For example, the number and type of device memories are determined according to the instruction information corresponding to the special function unit. Find out.

The number of device memories is the number of device memories designated by 72 in FIG. 1 of the sequence program, and the type of device memory is the type of usable defect memory of the device memories designated by the number of device memories F5.
Codes such as H and F6H are shown. If the instruction structure is correct, then in step 205, it is checked whether this instruction can be executed by the execution enable / disable flag. If it is executable, in step 206, the read / write of the special function unit corresponding command information is executed. Discrimination, read / write start address, read / write number, handshake signal,
Processing is performed in accordance with information such as (device memory that must be turned ON / OFF when an instruction is executed and its ON / OFF state). If it is not executed, an error occurs, and predetermined error processing is performed in step 207.

If this processing is completed normally, or if an error occurs on the way, error processing such as error display is performed, and the processing of this instruction is completed at step 209, and then step 2
Return to 01 to execute the next instruction.

As in the case of the method of the first invention, also in the case of the method of the second invention, in the 2CHD / A unit (special function unit having two digital / analog conversion functions), Z_ANALOG_1 is Z_ANALOG_2 is an instruction to output an analog value on CH1
It is assumed that it is defined as an instruction to output an analog value on the CHth. Similarly, 8CHD / A unit (digital /
With a special function unit that has eight analog conversion functions,
Z_ANALOG_1 outputs an analog value on 1CH, Z_ANALOG_2 outputs an analog value on 2CH ... Z_ANALOG_8 is 8C
It is assumed that the H-th order is defined as a command for outputting an analog value, and in the display unit, LOCATE is defined as a command for designating a display position, and PRINT is defined as a display command.

At this time, for example, a 2CHD / A unit (a special function unit having two digital / analog conversion functions) is mounted at the position of input / output NO50, and an analog value corresponding to the contents of the device D0 is output on the 1st CH. Think about the program if you want to. In this case, the program is the program step 7A shown in FIG. When the CPU unit 1 executes the program step 7A in the program memory, it checks that the first two characters of the instruction name of the instruction are Z_ and determines that it is a special function unit corresponding instruction.

Next, the CPU unit 1 is mounted on the position of the input / output NO50 designated by the command, and 2CHD /
The number 430 of special function unit corresponding instructions stored in the 2-port memory 41 in the A unit is read. Assuming that four special function unit corresponding instructions are defined in this unit, the character codes of the four instructions are sequentially examined.
In the case of individual pieces, since the memory information corresponding to the 1st CH is the first, the processing is performed based on this first memory information, that is, the information of the special function unit corresponding instruction.

First, it can be seen that there is one device memory designation in this instruction, and the device type indicated by the code F5H has been designated. Therefore, this is compared with the instruction DC in the program memory 11 and it is correct. I understand. Next, based on the read / write classification, the buffer memory start address, the read / write number, and the handshake signal (0 = none), it is determined that the instruction is to write the DC content of the device memory 12 to the address 2 of the buffer memory. The execution is enabled / disabled by the enable / disable flag (= 0), and the special function unit outputs an analog value corresponding to the DC content of the device memory 12 stored in the 2-port memory 42 to 1CH.

Next, for example, at the position of input / output NO50, 8
CHD / A unit (8 digital / analog conversion functions
Consider a program in the case where a special function unit (having two functions) is mounted and an analog value corresponding to the contents of the device DC is to be output to 1CH. In this case as well, the program is the program step 7A in FIG. 1, and the operation of executing the instruction is exactly the same.

As described above, the special function unit corresponding command having the same function has the same command name as Z_ANALOG_1, and it is easily understood that the command name is output and the analog value is output to the first channel.

Example 3. An embodiment of the sixth invention will be described below with reference to FIG. In FIG. 8, 1 is a CPU unit for controlling the entire programmable controller, 11
Is a program memory in which the sequence program is stored, 12 is a device memory used in the sequence program, or data of operation results is stored, 2
Is a program device for creating a sequence program to be stored in the program memory 11, 3 is a communication cable connecting the CPU unit 1 and the program device 2, 4 is an input / output unit, 4B is a special function unit, and 42 is accessible from the CPU unit 1. , A 2-port memory storing special instruction information, and 45 a buffer memory.

An example of the structure (contents of special command information) of the memory 42 accessible from the CPU unit is almost the same as the example of the structure of the second embodiment shown in FIG. That is, instead of the 2-port memory 41 in FIG. 5, a 2-port memory 42 as a special instruction information memory and a buffer memory 45 are provided in FIG. 8, and the 2-port memory 42 is used exclusively for storing special instruction information. Has been.

FIG. 3 shows the format of the special instruction 10, Z_
It is shown that an arbitrary instruction name can be described after the.
In the figure, 101 is an input / output NO corresponding to the mounting position of the special function unit, and 102 is a part for describing the device as required.

The format of the special instruction is the same as the example shown in FIG. An operation flow chart showing the processing of the CPU unit 1 when executing the special instruction is almost the same as the operation flow chart of the second embodiment shown in FIG.

The operation of the third embodiment will be specifically described below. In the 2CHD / A unit (special function unit with two digital / analog conversion functions),
It is assumed that "Z_ANALOG_1" is defined as an instruction to output an analog value on 1CH and "Z_ANALOG_2" is defined as an instruction to output an analog value on 2CH.

Similarly, 8CHD / A unit (special function unit having eight digital / analog conversion functions)
, "Z_ANALOG_1" is an instruction to output an analog value on CH1 and "Z_ANALOG_2" is 2
Command to output analog value to CH, ... "Z_ANA
It is assumed that LOG_8 "is defined as an instruction to output an analog value on the 8th CH. Further, in the display unit," Z_LOCATE "is defined as an instruction to specify a display position and" Z_PRINT "is defined as an instruction to be displayed. I shall.

At this time, for example, a 2CHD / A unit (a special function unit having two digital / analog conversion functions) is attached to the position of input / output NO50, and an analog value corresponding to the contents of the device D0 is output on the 1st CH. Think about the program if you want to. In this case, the program is instruction 7A in FIG. The user is the programming device 2
To create a program called instruction 7A in FIG.
The program 7A is written in the program memory 11 of the PU unit 1 via the communication cable 3.

Next, when the CPU unit 1 actually executes the program 7A written in the program memory 11, it checks that the first two characters of the instruction name of the instruction are Z_, and determines that it is a special instruction. Determine. Next, the CPU unit 1 shows the special instruction stored in the memory 42 accessible from the CPU unit in the 2CH D / A unit mounted at the position of the input / output NO50 designated by the instruction in FIG. 5b. The number of special instructions 4130 is read. Since it is known that four special instructions are defined in this unit, the character codes of the four instructions are sequentially examined. In this case, since the instruction names match at the first position, processing is performed based on the information of this first special instruction.

First, since it is understood that this instruction has only one designation of the debates memory and the type indicated by the code F5H can be designated, this is checked as D0 of the instruction of the program memory 11 and it is understood that it is correct. Next, read / write classification, buffer memory start address,
Judged as the command to write the read / write number, the D0 content of the device memory 12 from the handshake signal (0 = none) to the address 2 of the buffer memory 45,
This is executed by the execution possible / impossible flag (0 = possible), and the content of D0 of the device memory 12 is written to the address 2 of the buffer memory 45. The special function unit outputs an analog value corresponding to the contents of the address 2 of the buffer memory 45 to 1CH as in the conventional case. That is, D0 of the device memory 12
The analog value will be output to 1CH.

Next, for example, at the position of input / output NO50, 8
Consider a program in which a CH D / A unit (special function unit having eight digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output on the 1st CH. In this case as well,
The program is the instruction 7A in FIG. 2, and the instruction execution operation is also the same.

Further, let us consider a program for mounting a display unit at the position of input / output NO50 and displaying a character corresponding to the contents of the debates D0 at the 1st row and the 3rd column. In this case as well, the program becomes the instruction 7B of FIG. 2 as in the above case, and the operation of executing the instruction becomes exactly the same.

As described above, the special instruction having the same function has the same instruction name "Z_ANALOG_1", and it can be easily understood that the instruction name is used to output the analog value to the first channel. In addition, even in the case of the special instruction of the same internal processing, "Z_A
In the NALOG_1 display unit, "Z_LOCA
It is also easy to see that the functions are different from those of TE "and" Z_PRINT ".

Example 4. Next, an embodiment of the fifth invention will be described below with reference to the drawings. In FIG. 9, 13 is a memory for storing special command information of each special function unit.

FIG. 10 shows an example of the structure of the memory 13 for storing the special command information of each special function unit. In the figure, 131 stores the contents of the special command information memory 41 of the special function unit attached to the input / output NO0. In 132, the contents of the special command information memory 41 of the special function unit attached to the input / output NO10 are stored. The same applies hereinafter.

In FIG. 11, before executing the sequence program, the contents of the special instruction information memory previously stored in the memory in the special function unit are transferred to the memory 13 in the CPU unit for storing the information. C when doing
It is an operation | movement flowchart which shows the process of a PU unit.

Next, the operation will be described. When programming with the programming device 2, at the beginning of the input of the command name, Z_
After that, input of an arbitrary command name can be accepted. In this way, the program device 2 creates a program of the format shown in FIG. 1, and writes the program in the program memory 11 of the CPU unit 1 via the communication cable 3.

Next, before the CPU unit 1 executes the sequence program, the special instruction information stored in the special instruction information memory 42 in the special function unit in advance is stored in the information in the CPU unit. To the memory 13 for storing. That is, from the first unit to the last unit (step 301) to the last unit (step 305).
The following processing is performed. It is checked whether the corresponding unit is a special function unit (step 302). If it is a special function unit, it is checked whether a special instruction is defined (step 303). If defined, the special instruction information stored in the memory 42 in the corresponding special function unit is used as the CP.
Transfer to the memory 13 in the U unit (step 3)
04). If it is not the final unit in step 305, the process proceeds to the next unit (step 306).

Next, the CPU unit 1 actually executes the sequence program written in the program memory 11. The processing at this time is as described in the first aspect of the invention (as shown in the operation flow chart of FIG. 6). However, in the first invention, the processing is performed based on the special command information stored in the memory 42 in the special function unit,
The seventh invention is different in that the processing is performed based on the information for the special command in the memory 13 in the CPU unit in which the information is stored in advance. That is, in general, the access speed of the memory 13 in the CPU unit is several steps higher than that of the memory 42 of the special function unit.
In the invention, the execution speed of the special instruction is high.

In the above description, all the special instruction information in the memories 42 of all special function units having special instructions are transferred to the memory 13 of the CPU function unit in advance. In addition, a method of searching for a special instruction actually programmed in the sequence program and transferring only the corresponding special instruction information in the memory 42 of the corresponding special function unit corresponding thereto to the memory 13 of the CPU unit may be used. .

Example 5. Next, an embodiment of the eighth invention will be described below with reference to the drawings. In FIG. 12, 43 is C
It is a memory that can be accessed from the PU unit and that stores a sequence program for special instructions.

FIG. 13 shows an example of the configuration of the memory 42 accessible by the CPU unit (contents of the special instruction sequence memory). In the figure, (a) is a general example of the memory 43 of the special function unit. The memory 43 of the special function unit is configured in this way.
43a is a portion for storing the total number of special instructions defined in this unit. After that, there is a portion where the instruction name of each special instruction and the sequence program are stored. This information 1
The second instruction will be described as an example. Reference numeral 431a is a portion in which the instruction name of the special instruction defined first is stored in a character code, and 431b is a portion in which the sequence program corresponding to this instruction is stored. The information of one instruction is thus configured as a set of 431a and 431b (abbreviated as 431), and is stored below 432 ... 43n and the total number of special instructions stored at address 0.
(B) of 2CHD / A unit, (c) of 8CHD / A unit
In the unit A, (d) is a configuration example of each memory of the display unit.

FIG. 14 shows an example of the sequence program corresponding to the special instruction stored in the memory 43. In the figure, 81 is a sequence command corresponding to the special instruction "Z_ANALOG_1" of the 2CH D / A unit and the special instruction "Z_PRIN of the display unit".
This is an example of a sequence program corresponding to T ″.
Is a special command "Z_ANALO" of 8CH D / A unit.
It is an example of a sequence program corresponding to G_1 ".
83 is a special command "Z_ANA" of 8CH D / A unit.
It is an example of a sequence program corresponding to LOG ".

FIG. 15 shows a CP when executing a special instruction.
It is an operation | movement flowchart which shows the process of U unit. Next, the operation will be described. When programming is performed by the programming device 2, if Z_ is input at the beginning of the input of a command name, the input of any command name can be accepted thereafter.
In this way, the program device 2 creates a program of the format shown in FIG. 1, and writes the program in the program memory 11 of the CPU unit 1 via the communication cable 3.

Next, the CPU unit 1 actually executes the sequence program written in the program memory 11. The processing at this time is shown in the operation flow chart of FIG. First, if the first two characters of the instruction name of the instruction are Z_, it is determined to be a special instruction (step 501). If it is a character other than Z_, a normal instruction is processed (step 50).
8). Next, in the CPU unit 1, the command determined to be the special command is stored in the memory 43 accessible from the CPU unit in the special function unit 4 mounted at the input / output NO position designated by the command. The number of instructions defined in this unit is read from the number of special instructions 43a (step 502), and the instructions with the same character code are searched from the number of special instructions, and this instruction is defined in this special function unit. Check if there is any (step 50)
3).

If a matching instruction is not found, it is regarded as an error because this instruction name is not defined on the special function unit side (step 506), and if found, it is regarded as being defined and the CPU unit 1 Move on to processing. First, the contents of the device designated by the command are set in the dedicated device A (A0, A1, A2 ...) (step 504). Next, the special instruction sequence program corresponding to the instruction is executed (step 50).
5). If this process ends normally, or if an error occurs on the way, error processing such as error display is performed (step 506), the process of this command ends, and the process moves to the execution of the next command.

A detailed description will be given below. 2CH D /
In the A unit (special function unit having two digital / analog conversion functions), Z_ANALOG_1 is 1
Z_NALOG_ command to output analog value to CH
It is assumed that 2 is defined as an instruction to output an analog value on the 2nd CH. Similarly, in the 8CH D / A unit (special function unit having eight digital / analog conversion functions), Z_ANALOG_1 outputs an analog value to the 1st CH, and Z_ANALOG_2 outputs 2C.
A command to output an analog value to the Hth ... Z_ANAL
OG_8 command to output analog value on CH8, Z_
It is assumed that ANALOG is defined as an instruction to output an analog value to the designated CH. Further, in the display unit, Z_LOCATE is an instruction to specify the display position, Z_LOCATE.
It is assumed that it is defined as an instruction displayed by PRINT.

At this time, for example, a 2CH D / A unit (a special function unit having two digital / analog conversion functions) is attached to the position of input / output NO50, and an analog value corresponding to the contents of the device D0 is set on the 1st CH. Consider a program that you want to output. In this case, the program is instruction 11 in FIG. The user is the programming device 2
To create a program called instruction 7A in FIG.
The program 7A is written in the program memory 11 of the PU unit 1 via the communication cable 3.

Next, when the CPU unit 1 actually executes the program 7A written in the program memory 11, it checks that the first two characters of the instruction name of the instruction are Z_, and determines that it is a special instruction. Determine. Next, the CPU unit 1 reads out the number 43b of special instructions stored in the memory 43 which can be accessed from the CPU unit in the 2CHD / A unit mounted at the position of the input / output NO50 designated by the instruction. Since it is known that four special instructions are defined in this unit, the character codes of the four instructions are sequentially examined. In this case, the instruction names match at the first position.
Next, set the input / output NO50 specified by this command to A0,
The contents of D0 of the device memory 12 are stored in A1. After that, the sequence program 81 corresponding to this instruction is executed. Since this command stores the contents of 50 in A0 and the contents of D0 in A1, that is, the device memory 1
An analog value corresponding to the content of D0 of 2 will be output to 1CH of the 2CH D / A unit mounted at the position of the input / output NO50.

Next, for example, at the position of input / output NO50, 8
Consider a program in which a CH D / A unit (special function unit having eight digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output on the 1st CH. In this case as well,
The program becomes the instruction 71 in FIG. 2, and the operation of executing the instruction becomes exactly the same. That is, the sequence program 82 corresponding to this instruction is executed.

Further, let us consider a program in which a display unit is mounted at the position of input / output NO50 and a character corresponding to the contents of the device D0 is displayed at the first row and third column. In this case as well, the program becomes the instruction 7B of FIG. 2 as in the above case, and the operation of executing the instruction becomes exactly the same.

As described above, the special instruction having the same function has the same instruction name "Z_ANALOG_1", and it can be easily understood that it is an instruction to output the analog value on the 1st CH by looking at the instruction name. In addition, even if a special instruction for the same internal processing is used, "Z_AN" is used in the 2CH D / A unit.
ALOG_1 ", in the display unit," Z_LOCAT
It is also easy to see that the functions are different from E "and" Z_PRINT ".

Further, for example, 8 at the position of input / output NO50.
Consider a program in which a CH D / A unit (special function unit having eight digital / analog conversion functions) is mounted and an analog value corresponding to the contents of the device D0 is output on the 1st CH. In this case, the program is instruction 7C in FIG. The user uses the programming device 2 to create a program called command 7C in FIG.
Communication cable 3 in the program memory 11 of U unit 1
The program 7C is written via.

Next, when the CPU unit 1 actually executes the program 7C written in the program memory 11, it checks that the first two characters of the instruction name of the instruction are Z_, and determines that it is a special instruction. Determine. Next, the CPU unit 1 reads out the number 43d of special instructions stored in the memory 43 which can be accessed from the CPU unit in the 2CH D / A unit mounted at the position of the input / output NO50 designated by the instruction. Since it is known that four special instructions are defined in this unit, the character codes of the four instructions are sequentially examined. In this case, the command name matches at the 9th position.

Next, the input / output NO5 designated by this command
0 to A0, CH number 3 to A1, device memory 12
Store the contents of D0 in A2. After that, the sequence program 16 corresponding to this instruction is executed. In this instruction, 50 is stored in A0, 3 is stored in A1, and the content of D0 is stored in A2. Therefore, “= A1 3” is satisfied, and “
TOA010A21 ”is executed and the buffer memory 44
The contents of A2 are written in the address 10 of. That is, the analog value corresponding to the content of D0 of the device memory 12 is output to the 3CH of the 2CH D / A unit mounted at the position of the input / output NO50.

As described above, since the operation of the special instruction is freely described in the seamless program, the complicated function is not required.
It can be realized by one special instruction "Z_ANALOG". Also, it is easy to understand that the instruction name "Z_ANALOG" outputs an analog value to the designated CH.

Example 6. Next, an embodiment of the ninth invention will be described below with reference to the drawings. In FIG. 16, 14 is a memory for storing the special instruction sequence program of each special function unit.

FIG. 17 is a structural example of the memory 14 for storing the special instruction sequence program of each special function unit. In the figure, 141 is an input / output N
The contents of the special command sequence memory 43 of the special function unit attached to O0 are stored. The content of the special command sequence memory 43 of the special function unit attached to the input / output NO10 is stored in 142. The same applies hereinafter.

In FIG. 18, before executing the sequence program, the contents of the special instruction sequence memory 43 stored in the memory of the special function unit in advance are stored in the memory 14 for storing the contents in the CPU unit. It is an operation | movement flowchart which shows the process of a CPU unit at the time of transfer.

Next, the operation will be described. When programming with the programming device 2, at the beginning of the input of the command name, Z_
After that, input of an arbitrary command name can be accepted. In this way, the program device 2 creates a program of the format shown in FIG. 1, and writes the program in the program memory 11 of the CPU unit 1 via the communication cable 3.

Next, before the CPU unit 1 executes the sequence program, the special instruction sequence program or the like previously stored in the special instruction sequence memory 42 in the special function unit is loaded into the contents in the CPU unit. Transfer to memory 14 for storage. That is, the following processes are performed in order from the first unit (step 601) to the last unit (step 605). It is checked whether the corresponding unit is a special function unit (step 602). If it is a special function unit, it is checked whether a special instruction is defined (step 603). If it is defined, the special instruction sequence program or the like stored in the memory 42 in the corresponding special function unit is transferred to the memory 14 in the CPU unit (step 604).
If it is not the final unit in step 605, the process proceeds to the next unit (step 606).

Next, the CPU unit 1 actually executes the sequence program written in the program memory 11. The processing at this time is as described in the eighth aspect of the invention (as shown in the operation flow chart of FIG. 15). However, the 8th
In the invention, the processing is performed based on the special instruction sequence program stored in the memory 43 in the corresponding special function unit. However, in the ninth invention, the processing is performed in the CPU unit in which the information is stored in advance. The difference is that processing is performed based on the sequence program for the corresponding special instruction in the memory 14 of FIG. That is, in general, the memory 14 in the CPU unit has an access speed several steps faster than the memory 43 in the special function unit. Therefore, in the ninth aspect of the invention, the execution speed of the special instruction is high.

In the above description, all the special instruction sequence programs in the memories 42 of all special function units having special instructions are transferred to the memory 14 of the CPU function unit in advance. For high speed, the special instruction actually programmed in the sequence program is searched, and only the corresponding special instruction sequence program in the memory 43 of the corresponding special function unit corresponding thereto is transferred to the memory 14 of the CPU unit. You can use this method.

Example 7. Next, an embodiment of the tenth invention will be described below with reference to the drawings. In FIG. 19, reference numeral 44 denotes a memory which can be accessed from the CPU unit and which stores a special instruction microcomputer program.

That is, the special instruction sequence program in the fifth embodiment of the eighth invention is replaced with a special instruction microcomputer program. Usually, the CPU unit is equipped with a microprocessor for controlling, and a program constituted by the machine language of the microprocessor is called a microcomputer program. The operation is also to execute the special instruction microcomputer program in place of the special instruction sequence program in the third invention. The operation is almost the same as in the fifth embodiment of the eighth invention.

Example 8. Next, an embodiment of the eleventh invention will be described below with reference to the drawings. In FIG. 20, reference numeral 15 is a memory for storing a special instruction microcomputer program for each special function unit.

That is, the special instruction sequence program in the sixth embodiment of the ninth invention is replaced with a special instruction microcomputer program. Usually, the CPU unit is equipped with a microprocessor for controlling, and a program constituted by the machine language of the microprocessor is called a microcomputer program. As for the operation, instead of the special instruction sequence program in the ninth aspect of the invention, the special instruction microcomputer program is transferred in advance and then executed. The operation is almost the same as that of the sixth embodiment of the ninth invention.

As described above, in each of the embodiments using the methods of the first to eleventh inventions, it is possible to program without paying attention to the address of the special function unit 2-port memory, and to instruct the special function unit. By looking at it, it is possible to immediately understand how the instruction operates, so that the readability of the program is improved, the design efficiency / maintenance efficiency can be improved, and even if the number of special function units increases, C
It is possible to have an appropriate special function unit compatible instruction without affecting the PU unit side.

Although the programming device 2 and the CPU unit 1 are connected by the communication cable 3 in the first to eighth embodiments, they may be directly connected without the communication cable. Further, the program device 2 may be connected to the communication special function unit via the communication cable 3. Also, one of the special function units is the programming device 2.
May be

Further, although the special instruction information held by the special function unit is defined as shown in FIG. 5, the memory structure may be a word unit or another unit, or may be different for each information. The information of each command may be limited from these, or other necessary information may be added. Further, it may differ depending on the unit, or information for notifying the difference may be added. Further, although one instruction is stored collectively, it may be stored for each information.

In each of the above embodiments, the instruction whose first symbol in the instruction symbol starts with Z_ is the instruction corresponding to the special function unit, but the instruction is not limited to Z_, and the instruction starting with X_, Y_ is special. It is easier to read the program if it is used as a function unit corresponding instruction, X_ is an analog special function unit corresponding instruction, Y_ is a link special function unit corresponding instruction, and Z_ is another special function unit corresponding instruction. become.

Although the instruction name starting with Z_ is the special function unit corresponding instruction, the instruction name other than the standard (equipped) instruction of the CPU unit may be the special function unit corresponding instruction. That is, the second symbol indicating the special function type also serves as the first symbol indicating that it is the special function unit corresponding instruction. Further, although Z_ is the criterion for the special function unit corresponding instruction, the instruction name and the like are converted into the intermediate code and stored in the program memory, and the intermediate code determines whether the instruction is the special function unit corresponding instruction. May be.

Further, the execution request to the special function unit was made by interrupting the special function unit from the CPU unit. The CPU unit 1 sets up a flip-flop (not shown) in the special function unit, and The unit may poll it to determine whether there is an execution request, or the CPU unit 1 writes an execution request code in the 2-port memory in the special function unit, and the special function unit 4 polls it for execution. You may decide whether there was a request.

In the above embodiment, the two-port memory is exemplified as the two-way access memory, but the present invention is not limited to the two-port memory and a normal memory is used and a hardware changeover switch is used for the CPU unit 1. Alternatively, a method of switching the data and address buses belonging to the special function unit 4 may be used.

Further, although the programmable controller has been described as an example of the control device in the above embodiments, the method of the present invention can be applied to other than the programmable controller, for example, a numerical control device.

[0119]

As described above, according to the first to fourth aspects of the invention, by executing the program having the instruction step of the instruction format using the instruction corresponding to the special function and the instruction symbol indicating the type, the special function is executed. It is possible to create a program without being aware of the address of the multi-directional access memory in the function part, and by looking at the above instruction format, the control target controlled by the special function part specified by the instruction can be understood, and the readability of the program is high, There is an effect that it is possible to obtain a control method of a control device with good program design and maintenance efficiency.

Further, according to the sixth aspect of the invention, since the instruction information for accessing the special function section is stored in the special function section and the instruction information memory accessible from the CPU section is provided, The CPU for the purpose of storing information
In addition to the effects of the first to fifth inventions, a memory that is accessible from both the control unit and the special function unit is unnecessary.
There is an effect that an inexpensive one can be obtained.

According to the seventh invention, the special function unit is provided with a first instruction information memory accessible from the CPU unit, and the CPU unit is provided with a second instruction information memory, and the first instruction information memory is provided. The command information stored in the command information memory is transferred to the second command information memory, and the command decoded based on the command information stored in the second command information memory is executed. As a result, there is an effect that a program can be controlled at high speed and that the cost is low.

Further, according to the eighth aspect of the invention, since the sequence program is stored in the special function section and the sequence program storage memory accessible from the CPU section is provided, the complicated function which is originally a plurality of instructions is provided. It is possible to program with one special function compatible instruction, and by looking at the instruction to the special function unit, you can immediately see how that instruction works, improve program readability and improve design efficiency / maintenance efficiency There is an effect that what can be obtained.

According to the ninth invention, the special function section is provided with a first sequence program storage memory accessible from the CPU section, and the CPU section is provided with a second sequence program storage memory. The sequence program stored in the sequence program storage memory is transferred to the second sequence program storage memory, and the sequence program corresponding to the decoded instruction to access the special function unit is transferred from the second sequence program storage memory. Since the program is read and executed, in addition to the effect of the eighth aspect of the invention, there is an effect that a program control can be performed at high speed and the cost is low.

Further, according to the tenth aspect of the invention, since the microcomputer program is stored in the special function section and accessible from the CPU section, the processing which cannot be originally programmed by the sequence program is performed. Can be programmed with one special function corresponding instruction, and in addition to the effect according to the eighth aspect of the invention, an effect that can be applied to program control for a wide range of applications can be obtained.

According to the eleventh invention, the special function unit is provided with a first microcomputer program storage memory accessible from the CPU unit, and the CPU unit is provided with a second microcomputer program storage memory. From the second microcomputer program storage memory, the microcomputer program stored in the microcomputer program storage memory is transferred to the second microcomputer program storage memory, and the microcomputer program corresponding to the decoded instruction to access the special function unit is transferred from the second microcomputer program storage memory. Since it was read and executed,
In addition to the effect of the invention described above, there is an effect that a program controllable at high speed can be obtained.

[Brief description of drawings]

FIG. 1 is a diagram showing a format of a special instruction according to an embodiment of the first to eleventh inventions.

FIG. 2 is a diagram showing an example of a special instruction according to an embodiment of the first to eleventh inventions.

FIG. 3 is an example of a configuration (contents of special command information) of a memory 41 accessible from a CPU unit according to an embodiment of the first and second inventions.

FIG. 4 is an operational flow chart showing the processing of the CPU unit when executing a special instruction according to an embodiment of the first and second inventions.

FIG. 5 is a structural example of a special command information storage memory 41 of each special function unit according to one embodiment of the third to fifth inventions.

FIG. 6 is an operational flowchart showing the processing of the CPU unit when executing a special instruction according to an embodiment of the third to fifth inventions.

FIG. 7 is a system configuration diagram of a programmable controller common to the first to fifth inventions and the related art.

FIG. 8 is a configuration diagram of a programmable controller according to an embodiment of the sixth invention.

FIG. 9 is a configuration diagram of a programmable controller according to an embodiment of the seventh invention.

FIG. 10 is a CPU for storing special command information of each special function unit according to an embodiment of the seventh invention.
It is an example of composition of memory 13 in a unit.

FIG. 11 is a special command information memory 42 stored in a memory in a special function unit according to an embodiment of the seventh invention.
FIG. 9 is an operational flowchart showing the processing of the CPU unit when the contents of the above are transferred to the memory 13 for storing the information in the CPU unit.

FIG. 12 is a configuration diagram of a programmable controller according to an embodiment of the eighth invention.

FIG. 13 is a CPU according to an embodiment of the eighth and ninth inventions.
It is an example of the configuration of the memory 43 that can be accessed from the unit (contents of the special instruction sequence memory).

FIG. 14 is an example of a sequence program corresponding to a special instruction stored in the memory 43 according to an embodiment of the eighth and ninth inventions.

FIG. 15 is an operational flowchart showing the processing of the CPU unit when executing a special instruction according to an embodiment of the ninth invention.

FIG. 16 is a configuration diagram of a programmable controller according to an embodiment of the ninth invention.

FIG. 17 is a structural example of a memory for storing a special instruction sequence program for each special function unit according to an embodiment of the ninth invention.

FIG. 18 is a diagram showing a case where the contents of the special instruction sequence memory 43 stored in the memory in the special function unit are transferred to the memory 14 for storing the contents in the CPU unit according to the embodiment of the ninth invention. 3 is an operation flow chart showing the processing of the CPU unit of FIG.

FIG. 19 is a configuration diagram of a programmable controller according to an embodiment of the tenth invention.

FIG. 20 is a configuration diagram of a programmable controller according to an embodiment of the eleventh invention.

FIG. 21 is an example of a configuration (contents) of a buffer memory.

FIG. 22 is a format of a conventional special instruction.

FIG. 23 is an example of an instruction for writing data with a conventional special function unit.

[Explanation of symbols]

1, 1A, 1B, 1C CPU unit 11 Program memory 12 device memory 13 Information memory for special instructions 14 Sequence memory for special instructions 15 Microcomputer memory for special instructions 2 programming equipment 3 communication cable 4 I / O unit 4A, 4B, 4C, 4D Special function unit 41 2-port memory 42 Information memory for special instructions 43 Sequence memory for special instructions 44 Microcomputer memory for special instructions 45 buffer memory

Claims (11)

[Claims] 1. A control comprising a CPU section for performing program control, a multi-directional access memory accessible from the CPU section, and a plurality of special function sections for performing special control according to commands from the CPU section. In the apparatus, a step of creating a program having an instruction step using an instruction symbol representing a special function unit corresponding instruction and its type, and executing the program in the CPU unit and executing the instruction It is determined that the step is an instruction corresponding to the special function section by the instruction symbol, the contents of the instruction step are stored in the multidirectional access memory of the corresponding special function section, and the execution of the special function section is requested. And the contents of the instruction step stored in the multi-directional access memory in the special function unit without depending on the memory address. And a step of accessing and executing the symbol based on the above symbol. 2. The control device according to claim 1, wherein the instruction symbol of the instruction step represents a special function unit corresponding instruction.
And a second symbol representing the special function type,
It is determined by the first symbol that the command step being executed is a command corresponding to the special function unit, and the contents of the command step stored in the multi-directional access memory by the special function unit are read from the memory address. A control method of a control device, characterized in that the program is accessed and executed based on the second symbol without being executed. 3. The control device according to claim 1, wherein the instruction information corresponding to each of the plurality of special function units is stored in a multi-directional access memory each of which has a special function unit corresponding instruction and its type. A step of preparing a program having an instruction step using an instruction symbol indicating that the instruction step being executed by executing the program in the CPU section corresponds to the special function section instruction. When the instruction information stored in the multi-directional access memory of the corresponding special function unit is accessed by the symbol and the instruction information and the content of the instruction step match, the instruction information is sent to the special function unit. According to the step of requesting the execution of the instruction information and the execution part of the instruction information stored in the multi-directional access memory in the special function section A method of controlling a control device, comprising the steps of accessing based on a symbol and executing an instruction. 4. The control method according to claim 3, wherein the instruction symbol of the instruction step comprises a first symbol indicating a special function unit corresponding instruction and a second symbol indicating a special function type, which is being executed. It is determined by the first symbol that the instruction step is an instruction corresponding to the special function unit, and the execution portion of the instruction information stored in the multi-directional access memory by the special function unit is the second symbol. A method of controlling a control device, characterized in that the control device accesses the device based on the instruction and executes an instruction. 5. A CPU section for performing program control and a special function section for performing special control in response to a command from the CPU section, wherein the special function section stores information for instructions for accessing the special function section, The memory includes a memory accessible from both the CPU unit and the special function unit, and an information storage unit that stores the command information in the memory.
The PU unit decodes the instruction determining means for determining that the instruction in the program input with an arbitrary instruction name is the instruction for accessing the special function unit, and the instruction for accessing the special function unit, and stores it in the memory. And a command executing means for executing the decoded command based on the command information thus obtained. 6. A CPU section for performing program control, and a special function section for performing special control in response to a command from the CPU section, wherein the special function section stores information for instructions to access the special function section, An instruction discriminating means which has an instruction information memory accessible from the CPU unit, and the CPU unit discriminates that an instruction in a program inputted with an arbitrary instruction name is an instruction to access the special function unit; And a command executing means for decoding an instruction for accessing the special function unit and executing the decoded instruction based on the instruction information stored in the instruction information memory. 7. A CPU section for performing program control, and a special function section for performing special control in response to a command from the CPU section, wherein the special function section stores instruction information for accessing the special function section, It has a first instruction information memory accessible from the CPU section, and the CPU section is stored in a second instruction information memory capable of storing the instruction information and in the first instruction information memory. And a data transfer means for transferring and storing the command information in the second command information memory, and that the command in the program input with an arbitrary command name is a command for accessing the special function unit. Command determining means for determining, and command execution for decoding the command for accessing the special function unit and executing the decoded command based on the command information stored in the second command information memory And a control device. 8. The control device according to claim 6, wherein the special function section stores a sequence program instead of the instruction information memory, and has a sequence program storage memory accessible from the CPU section, and the CPU section decodes the sequence program. A control device, wherein the sequence program corresponding to an instruction for accessing the special function unit is read from the sequence program storage memory and executed. 9. The control device according to claim 7, wherein the special function unit stores a sequence program instead of the first instruction information memory, and is accessible from the CPU unit.
CPU having a sequence program storage memory of
The section has a second sequence program storage memory for transferring and storing the sequence program stored in the first sequence program storage memory instead of the second instruction information memory, and the decoded special function A control device for reading the sequence program corresponding to an instruction for accessing a unit from the second sequence program storage memory and executing the sequence program. 10. The control device according to claim 6, wherein the special function section stores a microcomputer program instead of the instruction information memory, and has a microcomputer program storage memory accessible from the CPU section, and the CPU section decodes the program. A control device, wherein the microcomputer program corresponding to an instruction to access the special function unit is read from the microcomputer program storage memory and executed. 11. The control device according to claim 7, wherein the special function section stores a microcomputer program instead of the first instruction information memory and is accessible from the CPU section.
A second microcomputer program for transferring and storing the microcomputer program stored in the first microcomputer program storage memory instead of the second instruction information memory. A control device having a storage memory, wherein the microcomputer program corresponding to a decoded instruction to access the special function unit is read from the second microcomputer program storage memory and executed.