JPH055698Y2 - - Google Patents

Description

[Detailed Description of the Invention] Technical Field The present invention relates to a power FET circuit that turns on and off a power supply circuit of a load.

Prior art In general, this type of power FET circuit is
For example, as shown in Fig. 3, the power MOS/FET is turned on and off in accordance with the on and off control signals output from the control transistor Q1 in response to the external command CS, and thereby the DC power source E for the load LD. It is configured so that it can be turned on and off.

For such a power FET circuit,
In order to set the reference level for on/off operation during FET switching, the substrate and source side of the MOS/FET are short-circuited, and a parasitic device connected in the opposite direction between the substrate and drain to stabilize the operation. A diode D1 is provided.

However, in such a circuit configuration, if the DC power supply E is accidentally connected in reverse, the diode D1 will be forward biased and the source of the FET will be biased.
A problem arises in that the drains are short-circuited, and a current in the opposite direction is supplied to the load LD.

Therefore, in the past, a protection diode D2 was installed in the load LD circuit to block the reverse current, but since a large current normally flows in the load LD circuit, a large protection diode D2 for high power was used as the protection diode D2. This requires a large amount of equipment, which is disadvantageous in terms of space and cost. Further, during normal operation, the voltage drop across the protection diode D2 becomes a problem, resulting in a drawback that the load current is suppressed.

Purpose This invention was made taking the above points into consideration.
In a circuit configuration in which the substrate and source side of the power FET that turns on and off the power supply circuit of the load are shorted, and a diode for operation stability is connected in the opposite direction between the substrate and the drain, DC If the power supply is accidentally connected in reverse, the diode will be forward biased and the source and drain of the FET will be short-circuited, without having to provide a protection diode D for high power in the load circuit as in the past. The present invention provides a power FET circuit that can optimally prevent current from being supplied to a load in the opposite direction.

Configuration In order to achieve this objective, the present invention shorts the substrate and source side of a power FET that turns on and off the power supply circuit of the load according to the on and off control signals from the first control switch element. At the same time, a diode connected in a reverse direction for stabilizing operation is provided between the substrate and the drain, and a second control switch element is provided in the short circuit between the substrate and the source, and the first control switch element is provided in the short circuit between the substrate and the source. The second control switch element is turned on and off according to the on and off control signals output from the control switch element, or the second control switch element is turned on and off when the DC power supply in the power supply circuit is reversely connected. An embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

Regarding the power FET circuit according to the present invention,
As shown in Figure 1, the first
The power MOS/FET is turned on and off in accordance with the on/off control signal output from the control transistor Q1, thereby turning on and removing the DC power supply E to the load LD, and In particular, in the FET in which the substrate and source sides are short-circuited and a parasitic diode D1 connected in the opposite direction for stabilizing operation is provided between the substrate and the drain, A second control transistor Q2 capable of opening and closing the short circuit is provided in the short circuit, and the base of the second transistor Q2 and the first transistor Q
A resistor R1 is connected between the collector of the first control transistor Q1 and the second control transistor Q2 can be turned on and off according to the on and off control signals output from the first control transistor Q1. It is composed of

In addition, in the case of transistor Q2, it is
It is possible to integrate MOS/FET into a single chip IC.

However, with this configuration, when the external command CS goes low and an on command is given, the transistor Q1 turns on.
An on control signal is given to the FET, which causes the FET to
is turned on and DC power supply E is applied to load LD.

Furthermore, when the external command CS becomes high level and an off command is given, the transistor Q1 turns off and an off control signal is sent to the FET, which turns off the FET and draws the DC power supply E from the load LD. removed.

At this time, when the transistor Q1 turns on, the base current is supplied to the transistor Q2 through the resistor R1, turning the transistor Q2 on, thereby shorting the substrate and source of the FET, and the FET is connected to the parasitic diode D1. The switching operation from OFF to ON is performed stably based on a constant level set as a reference.

At this time, the base current supplied to the transistor Q2 is very small, so that the voltage of the DC power supply E does not drop and the power supply to the load LD is not disturbed.

Note that when transistor Q1 turns off,
Transistor Q2 is turned off and the connection between the substrate and source of the FET is opened.

In such a device, if the power supply E is accidentally connected in reverse, when the external command CS becomes a low-level ON command and transistor Q1 is on, the emitter and base of transistor Q2 will be reverse biased. When the external command CS becomes a high-level off command and the transistor Q1 is turned off, the base potential of the transistor Q2 becomes zero, so that the transistor Q2 does not turn on in any case. Therefore, it is possible to reliably prevent current from flowing in the reverse direction to the load LD through the parasitic diode D1.

Figure 2 shows another embodiment of the present invention, in which the base side of the transistor Q2 is directly connected to the positive side of the power supply E, so that the power supply E is normally connected in the forward direction. In some cases, the transistor Q2 is always on, and when the power source E is accidentally connected in the opposite direction, the transistor Q2 is turned off.

Effects As described above, in the power FET circuit according to the present invention, the substrate and source side of the power FET that turns on and off the load power supply circuit are short-circuited, and the operating circuit is connected between the substrate and the drain. In devices equipped with reverse-connected diodes for stabilization, a control switch element is provided in the short circuit between the substrate and the source, so that when the DC power supply in the power supply circuit is accidentally reverse-connected, The control switch element is turned off to prevent current from flowing in the reverse direction to the load through the diode, and a large protective diode for high power is used to prevent reverse current in the load circuit as in the past. An excellent advantage is that it is possible to optimally protect the load when the DC power supply is reversely connected by simply adding a simple circuit that can be integrated into an IC and consumes very little power, without requiring any additional circuitry. have.

[Brief explanation of the drawing]

Figure 1 shows a power supply according to an embodiment of the present invention.
FIG. 2 is a circuit diagram showing a power FET circuit according to another embodiment of the present invention, and FIG. 3 is a circuit diagram showing a conventional power FET circuit. Q1...Transistor (first control switch element), Q2...Transistor (second control switch element), LD...Load, E...DC power supply.

Claims (1)

[Claims for Utility Model Registration] 1. Short-circuiting the substrate and source side of a power FET that turns on and off the power supply circuit of the load according to the on and off control signals from the first control switch element; , in which a diode connected in a reverse direction for stabilizing operation is provided between the substrate and the drain, a second control switch element is provided in the short circuit between the substrate and the source, and the first control switch element is provided in the short circuit between the substrate and the source. For power use, the second control switch element is turned on and off in accordance with the on and off control signals output from the control switch element.
FET circuit. 2 Short-circuit the substrate and source side of the power FET that turns on and off the power supply circuit of the load according to the on-off control signal from the first control switch element, and short-circuit between the substrate and the drain. is provided with a reversely connected diode for operation stabilization, and a second control switch element is provided in the short circuit between the substrate and the source, and when the DC power source in the power supply circuit is reversely connected. 1. A power FET circuit characterized in that a second control switch element is turned off.