JPH0555752A - Manufacture of multilayer printed wiring board - Google Patents

Manufacture of multilayer printed wiring board

Info

Publication number
JPH0555752A
JPH0555752A JP21202391A JP21202391A JPH0555752A JP H0555752 A JPH0555752 A JP H0555752A JP 21202391 A JP21202391 A JP 21202391A JP 21202391 A JP21202391 A JP 21202391A JP H0555752 A JPH0555752 A JP H0555752A
Authority
JP
Japan
Prior art keywords
conductor pattern
inner layer
printed wiring
wiring board
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21202391A
Other languages
Japanese (ja)
Inventor
Masa Tachibana
雅 立花
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21202391A priority Critical patent/JPH0555752A/en
Publication of JPH0555752A publication Critical patent/JPH0555752A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To provide a method of preventing the generation of lamination voids, enhancing the accuracy of the thickness of an insulation layer and preventing copper transfer. CONSTITUTION:An insulation board 13b having a conductor pattern 13a made of a copper foil is heated and pressed so that the conductor pattern 13a is buried in the insulation board 13b. Then, after the surface of the conductor pattern 13a and the surface of the insulation board 13b are placed flash, glass cloth is impregnated with liquid resin and a prepreg 12 dry-to-the touch and a copper film 11 are overlapped, heated, pressed and laminated, which makes it possible to prevent the resin contained in the prepreg 11 from being supplied between the inner layer conductor patterns 13a and form an insulation layer portion between an outer conductor pattern of a multilayer printed wiring board and the inner layer conductor pattern 13b in a further equalized and smooth fashion.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、産業用および民生用な
どの各種電子機器に広く用いられている多層プリント配
線板の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board which is widely used in various electronic devices for industrial use and consumer use.

【0002】[0002]

【従来の技術】近年、パーソナルコンピュータ、ワード
プロセッサー、ビデオ一体型カメラや携帯電話器などの
普及に伴い、多層プリント配線板の需要はますます増加
する傾向にある。主としてそれらは電子機器の小型・軽
量・多機能化や使用する周波数域の高周波化に対するノ
イズ対策などの理由からであり、多層プリント配線板に
は、配線板厚の薄化、電気的特性を安定させるための層
間隔、すなわち絶縁層厚み精度の向上による誘電率の安
定化や配線密度を増大させるための高密度導体パターン
間の絶縁特性の向上が要求され、多層プリント配線板の
製造上においては、それらの要求を実現する複数枚の内
層材を加熱・加圧する積層工程は非常に重要な工程とな
っている。
2. Description of the Related Art In recent years, with the spread of personal computers, word processors, video-integrated cameras, mobile phones, etc., the demand for multilayer printed wiring boards has been increasing more and more. Mainly because of reasons such as noise reduction for electronic devices becoming smaller, lighter and more multifunctional, and for increasing the frequency range used. For multilayer printed wiring boards, the wiring board thickness is reduced and the electrical characteristics are stable. In order to improve the insulating property between the high-density conductor patterns for stabilizing the dielectric constant and increasing the wiring density by improving the layer spacing for improving the insulating layer thickness accuracy, in manufacturing a multilayer printed wiring board, The lamination process of heating and pressurizing a plurality of inner layer materials that fulfills those requirements is a very important process.

【0003】以下に従来の多層プリント配線板における
内層材、プリプレグと銅はくを用いた積層方法について
説明する。
A stacking method using an inner layer material, prepreg and copper foil in a conventional multilayer printed wiring board will be described below.

【0004】図2は従来の多層プリント配線板の製造方
法を示すものである。図2において、1は銅はく、2は
プリプレグ、3は内層材、3aは内層用の導体パター
ン、3bは内層用の絶縁基板、4は空洞(以下、積層ボ
イドと称す)、5は内部に導体パターンを有する多層銅
張積層板である。
FIG. 2 shows a conventional method for manufacturing a multilayer printed wiring board. In FIG. 2, 1 is a copper foil, 2 is a prepreg, 3 is an inner layer material, 3a is a conductor pattern for an inner layer, 3b is an insulating substrate for an inner layer, 4 is a cavity (hereinafter, referred to as a laminated void), and 5 is an inside. It is a multi-layer copper clad laminate having a conductor pattern on.

【0005】以上のように構成された多層プリント配線
板の積層方法について、以下説明する。
A method of laminating the multilayer printed wiring board having the above structure will be described below.

【0006】まず、図2(a)に示すように、ガラス布
基材エポキシ樹脂積層板などを絶縁基板とし、その両側
に銅はくをラミネートした銅張積層板の銅はく表面にス
クリーン印刷法や写真法などの手段を用いてエッチング
レジストを形成し、塩化第2銅や塩化第2鉄の溶液によ
りエッチングを施した後、エッチングレジストを剥離す
ることにより内層用の導体パターン3aを形成し、多層
プリント配線板用の内層材3を得る。
First, as shown in FIG. 2A, a glass cloth-based epoxy resin laminated plate or the like is used as an insulating substrate, and copper foil is laminated on both sides of the insulating substrate. Forming an etching resist by using a method such as a photo method or a photographic method, etching with a solution of cupric chloride or ferric chloride, and then peeling the etching resist to form the conductor pattern 3a for the inner layer. The inner layer material 3 for a multilayer printed wiring board is obtained.

【0007】次に、図2(b)に示すように、内層材3
の絶縁基板3b上に形成された内層用の導体パターン3
aの表面を酸化処理した内層材3と、ガラス布にエポキ
シ樹脂などを含浸させ、樹脂を半硬化状態にしたプリプ
レグ2と、最外層の導体パターンを形成するための銅は
く1を重ね合わせ、熱プレス機にステンレス板などで挟
んでセットし、加熱・加圧して、内層材3とプリプレグ
2と銅はく1を溶融、冷却、固化させ、図2(c)に示
すような内部に導体パターン3aを有する多層銅張積層
板5を得ている。
Next, as shown in FIG. 2B, the inner layer material 3
Inner layer conductor pattern 3 formed on the insulating substrate 3b of
An inner layer material 3 whose surface is a is oxidized, a prepreg 2 in which a glass cloth is impregnated with an epoxy resin to semi-harden the resin, and a copper foil 1 for forming a conductor pattern of the outermost layer are superposed. Then, it is set by sandwiching it in a heat press machine such as a stainless steel plate, heated and pressed to melt, cool and solidify the inner layer material 3, the prepreg 2 and the copper foil 1, and then to the inside as shown in FIG. 2 (c). A multilayer copper clad laminate 5 having a conductor pattern 3a is obtained.

【0008】[0008]

【発明が解決しようとする課題】しかしながら上記の従
来の方法では、加熱・加圧時にプリプレグ2から軟化・
溶融した樹脂が、内層材3の導体パターン3a間に十分
に流動せず、冷却、固化後の多層銅張積層板5内部の内
層用の導体パターン3aの間に積層ボイド4が生じる危
険性を有している。この多層銅張積層板5内部の積層ボ
イド4は、多層プリント配線板の各層間の誘電率などの
電気的性能に著しく影響を及ぼす。
However, in the above-mentioned conventional method, the prepreg 2 is softened / heated during heating / pressurization.
There is a risk that the molten resin does not flow sufficiently between the conductor patterns 3a of the inner layer material 3 and the laminated voids 4 are formed between the inner layer conductor patterns 3a inside the multilayer copper clad laminate 5 after cooling and solidification. Have The laminated voids 4 inside the multilayer copper clad laminate 5 significantly affect the electrical performance such as the dielectric constant between the layers of the multilayer printed wiring board.

【0009】さらに、プリプレグ2内の樹脂が、内層材
3の導体パターン3a間に充填されるにしたがって、内
層材3の導体パターン3aの疎密などによって、導体パ
ターン3aと銅はく1間の絶縁層の厚さが、多層銅張積
層板5内で不均一になるという問題点を有している。こ
れは内層用の導体パターンが比較的疎な場合には、プリ
プレグを構成する樹脂の大部分が内層用の導体パターン
と絶縁基板の間の充填に当てられることになるため、樹
脂の絶対量が不足し、プリプレグを構成するガラス布が
内層用の導体パターンと樹脂を介することなく接触する
ことになり、プリプレグと内層材の導体パターンとの間
の接着力の低下を招き、多層プリント配線板の積層後、
工程での加熱や電子機器製造工程における電子部品の実
装はんだ付け時の急激な加熱などにより絶縁層の層間は
く離を発生させるだけでなく、電子機器動作時の電圧や
使用環境によっては、内層用の導体パターンを構成する
銅はくの銅がイオン化し、ガラス布を構成するガラス繊
維と樹脂の界面を銅イオンが移動し、内層用の導体パタ
ーン間の絶縁劣下を誘発し、ついには導体パターン間を
ショートに至しめる銅移行(マイグレーション)を助長
する要因ともなる。
Further, as the resin in the prepreg 2 is filled between the conductor patterns 3a of the inner layer material 3, the conductor pattern 3a of the inner layer material 3 is sparsely and densely isolated, so that insulation between the conductor pattern 3a and the copper foil 1 is achieved. There is a problem that the layer thickness becomes non-uniform in the multilayer copper clad laminate 5. This means that when the conductor pattern for the inner layer is relatively sparse, most of the resin that constitutes the prepreg is applied to the space between the conductor pattern for the inner layer and the insulating substrate, so the absolute amount of resin is Insufficient, the glass cloth constituting the prepreg will come into contact with the conductor pattern for the inner layer without interposing the resin, leading to a decrease in the adhesive force between the prepreg and the conductor pattern of the inner layer material, After stacking
In addition to causing interlayer delamination of the insulating layer due to heating in the process or rapid heating during mounting and soldering of electronic components in the electronic device manufacturing process, depending on the voltage and operating environment during operation of the electronic device, The copper of the copper foil that constitutes the conductor pattern is ionized, and copper ions move at the interface between the glass fiber and the resin that constitutes the glass cloth, inducing insulation deterioration between the conductor patterns for the inner layer, and finally the conductor pattern. It is also a factor that promotes copper migration, which leads to short circuits.

【0010】これらの防止のため、内層材の導体パター
ンの疎密にあわせて、樹脂含有量の異なるプリプレグを
使い分けたり、部分的に樹脂含有量の異なるプリプレグ
を用いたりする必要があるが、多層プリント配線板の製
造において、実施上非常に困難で、生産性を著しく低下
させたり、プリプレグの保管・管理を煩雑なものとして
いる。
In order to prevent these, it is necessary to properly use prepregs having different resin contents or to partially use prepregs having different resin contents in accordance with the density of the conductor pattern of the inner layer material. In the manufacture of wiring boards, it is extremely difficult to implement, which significantly reduces productivity and makes prepreg storage and management complicated.

【0011】本発明は、上記従来の問題点を解決するも
ので、積層ボイドの発生の防止、絶縁層厚さ精度の向上
および銅移行の防止を実現する多層プリント配線板の製
造方法を提供することを目的とする。
The present invention solves the above-mentioned conventional problems, and provides a method for manufacturing a multilayer printed wiring board that prevents the occurrence of laminated voids, improves the accuracy of insulating layer thickness, and prevents copper migration. The purpose is to

【0012】[0012]

【課題を解決するための手段】この目的を達成するため
に本発明の多層プリント配線板の製造方法は、導体パタ
ーンを有する絶縁基板を加熱・加圧して、導体パターン
を絶縁基板中に埋設させ、導体パターン表面と絶縁基板
表面を平準化させた後、その絶縁基板に、ガラス布に液
状樹脂を含浸し指触乾燥したプリプレグと銅はくとを重
ね合わせて加熱・加圧することにより積層する構成を有
している。
In order to achieve this object, a method of manufacturing a multilayer printed wiring board according to the present invention comprises heating and pressurizing an insulating substrate having a conductor pattern to embed the conductor pattern in the insulating substrate. After leveling the surface of the conductor pattern and the surface of the insulating substrate, the insulating substrate is laminated by heating and pressing the prepreg and the copper foil which are impregnated with the liquid resin in the glass cloth and dried by touching. Have a configuration.

【0013】[0013]

【作用】この構成によって、プリプレグ中に含有される
樹脂は、内層用の導体パターン間に供給されることな
く、多層プリント配線板の外層導体パターンと内層用の
導体パターン間の絶縁層部分をより均一、かつ平坦に形
成することができる。
With this structure, the resin contained in the prepreg is not supplied between the conductor patterns for the inner layer, and the insulating layer portion between the conductor pattern for the outer layer and the conductor pattern for the inner layer of the multilayer printed wiring board is more effectively removed. It can be formed uniformly and flatly.

【0014】[0014]

【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。図1は本発明の一実施例における多
層プリント配線板の積層過程を示すものである。図1に
おいて、11は銅はく、12はプリプレグ、13は内層
材、13aは内層用の導体パターン、13bは内層用の
絶縁基板、15は積層後の多層銅張積層板である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a stacking process of a multilayer printed wiring board according to an embodiment of the present invention. In FIG. 1, 11 is a copper foil, 12 is a prepreg, 13 is an inner layer material, 13a is a conductor pattern for the inner layer, 13b is an insulating substrate for the inner layer, and 15 is a multilayer copper clad laminate after lamination.

【0015】以上のように構成された多層プリント配線
板の製造方法について、図1を用いて説明する。
A method of manufacturing the multilayer printed wiring board having the above structure will be described with reference to FIG.

【0016】まず、ガラス布基材エポキシ樹脂積層板を
絶縁基板とする銅張積層板の銅はく表面にスクリーン印
刷法や写真法などの従来の方法を用いてエッチングレジ
ストを形成し、塩化第2銅や塩化第2鉄の溶液によりエ
ッチングを施した後、エッチングレジストを剥離し、内
層用の絶縁基板13b上に内層用の導体パターン13a
を形成し、内層用の導体パターン13aを上下面に有す
る多層プリント配線板用の内層材13を得る。
First, an etching resist is formed on a copper foil surface of a copper clad laminate using a glass cloth base epoxy resin laminate as an insulating substrate by a conventional method such as a screen printing method or a photographic method. 2 After etching with a solution of copper or ferric chloride, the etching resist is peeled off, and the inner layer conductor pattern 13a is formed on the inner layer insulating substrate 13b.
Is formed to obtain an inner layer material 13 for a multilayer printed wiring board having conductor patterns 13a for the inner layer on the upper and lower surfaces.

【0017】次に、図1(a)に示すように、内層用の
導体パターン13aを上下面に有する内層材13を熱プ
レス機にステンレス板などで挟んでセットし、温度12
0〜150℃で加熱し、内層材13の絶縁基板3b中の
樹脂を軟化させると同時に圧力を加えることにより、導
体パターン13aを絶縁基板13bの樹脂中に埋設させ
た後、冷却・固化させ、熱プレス機より取り出し、導体
パターン13aが埋設した内層材13を得る。
Next, as shown in FIG. 1A, the inner layer material 13 having the conductor patterns 13a for the inner layer on the upper and lower surfaces thereof is set in a hot press machine by sandwiching it with a stainless plate or the like, and the temperature 12
By heating at 0 to 150 ° C. to soften the resin in the insulating substrate 3b of the inner layer material 13 and applying pressure at the same time, the conductor pattern 13a is embedded in the resin of the insulating substrate 13b, and then cooled and solidified. It is taken out from the hot press machine to obtain the inner layer material 13 in which the conductor pattern 13a is embedded.

【0018】その後、図1(b)に示すように、導体パ
ターン13aが埋設した内層材13と、ガラス布にエポ
キシ樹脂を含浸させ、樹脂部分を半硬化状態にしたプリ
プレグ12と、外層の導体パターンを形成するための銅
はく11を重ね合わせ、熱プレス機にステンレス板など
で挟んでセットし、加熱・加圧して導体パターン13a
が埋設した内層材13とプリプレグ12と銅はく11を
溶融・冷却・固化して、図1(c)に示すような内部に
導体パターン13aを有する多層銅張積層板16を得
る。
After that, as shown in FIG. 1B, the inner layer material 13 in which the conductor pattern 13a is embedded, the prepreg 12 in which the resin portion is semi-cured by impregnating glass cloth with epoxy resin, and the conductor of the outer layer. Copper foils 11 for forming a pattern are superposed, set on a heat press machine by sandwiching them with a stainless steel plate, etc., and heated and pressed to form a conductor pattern 13a.
The inner layer material 13, the prepreg 12 and the copper foil 11 embedded in are melted, cooled and solidified to obtain a multilayer copper clad laminate 16 having a conductor pattern 13a inside as shown in FIG. 1 (c).

【0019】本実施例による多層プリント配線板、すな
わち多層銅張積層板と従来の多層銅張積層板の特性を比
較すると、従来方法ではプリント配線板面積(100×
100cm)当りの積層ボイドの発生個数は数個であった
が、本実施例では積層ボイドの発生は認められなかっ
た。
Comparing the characteristics of the multilayer printed wiring board according to this embodiment, that is, the multilayer copper-clad laminate and the conventional multilayer copper-clad laminate, the area of the printed wiring board (100 ×
Although the number of laminated voids per 100 cm) was several, no laminated void was observed in this example.

【0020】また、銅移行の点においても10〜50D
C電圧負荷状態での耐湿試験(温度85℃、相対湿度8
5%、2000時間以上)で銅移行は全く発生しないと
いう優れた効果が得られた。
Also, in terms of copper migration, it is 10 to 50D.
Humidity test under C voltage load condition (Temperature 85 ℃, Relative humidity 8
5%, 2000 hours or more), an excellent effect that no copper migration occurred was obtained.

【0021】以上のように本実施例によれば、導体パタ
ーンを内層材の絶縁層中に埋設させた内層材を多層プリ
ント配線板用の内層材として用いることにより、積層ボ
イドの発生や銅移行の危険性をほぼ完全に抑制すること
ができる。
As described above, according to this embodiment, by using the inner layer material in which the conductor pattern is embedded in the insulating layer of the inner layer material as the inner layer material for the multilayer printed wiring board, the occurrence of laminated voids and copper migration The risk of can be suppressed almost completely.

【0022】なお、実施例において内層用の絶縁基板1
3bはガラス布基材エポキシ樹脂積層板としたが絶縁基
板13bは内層用の絶縁基板13bはガラス不織布基材
エポキシ樹脂積層板や紙基材エポキシ樹脂積層板として
もよいことは言うまでもない。
In the embodiment, the insulating substrate 1 for the inner layer is used.
Although 3b is a glass cloth base epoxy resin laminated plate, it goes without saying that the insulating substrate 13b may be a glass nonwoven fabric base epoxy resin laminated plate or a paper base epoxy resin laminated plate for the inner layer insulating substrate 13b.

【0023】[0023]

【発明の効果】以上のように本発明は、内層材の導体パ
ターンを内層材の絶縁層中に埋設させた後、その内層材
とプリプレグと銅はくとを重ね合わせ、加熱・加圧、積
層することにより、積層ボイドの発生を容易に防止で
き、同時に絶縁層厚さの精度の向上およびプリプレグを
構成するガラス繊維と内層用の導体パターンとの絶縁距
離を保ち、銅移行や絶縁層間の接着力の低下の防止する
ことができる優れた多層プリント配線板を実現できるも
のである。
As described above, according to the present invention, after the conductor pattern of the inner layer material is embedded in the insulating layer of the inner layer material, the inner layer material, the prepreg, and the copper foil are superposed, and the heating / pressing, By stacking, it is possible to easily prevent the occurrence of stacking voids, and at the same time improve the accuracy of the insulating layer thickness and maintain the insulating distance between the glass fiber that constitutes the prepreg and the conductor pattern for the inner layer, and to prevent copper migration or between insulating layers. It is possible to realize an excellent multilayer printed wiring board capable of preventing a decrease in adhesive strength.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(c)は本発明の一実施例における多
層プリント配線板の積層過程の断面図
1A to 1C are cross-sectional views of a stacking process of a multilayer printed wiring board according to an embodiment of the present invention.

【図2】(a)〜(c)は従来の多層プリント配線板の
積層過程の断面図
2A to 2C are cross-sectional views of a stacking process of a conventional multilayer printed wiring board.

【符号の説明】[Explanation of symbols]

11 銅はく 12 プリプレグ 13 内層材 13a 内層用の導体パターン 13b 内層用の絶縁基板 15 多層銅張積層板 11 Copper foil 12 Prepreg 13 Inner layer material 13a Inner layer conductor pattern 13b Inner layer insulating substrate 15 Multilayer copper clad laminate

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】導体パターンを有する絶縁基板を加熱・加
圧して、導体パターンを絶縁基板の絶縁層中に埋設さ
せ、導体パターン表面と絶縁基板表面を平準化させた
後、前記絶縁基板に、ガラス布に液状樹脂を含浸し指触
乾燥したプリプレグと銅はくとを重ね合わせて加熱・加
圧することにより積層することを特徴とする多層プリン
ト配線板の製造方法。
1. An insulating substrate having a conductor pattern is heated and pressed so that the conductor pattern is embedded in an insulating layer of the insulating substrate, and the surface of the conductor pattern and the surface of the insulating substrate are leveled. A method for producing a multilayer printed wiring board, characterized in that glass cloth is impregnated with a liquid resin and dried by touch, and prepreg and copper foil are superposed and laminated by heating and pressing.
JP21202391A 1991-08-23 1991-08-23 Manufacture of multilayer printed wiring board Pending JPH0555752A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21202391A JPH0555752A (en) 1991-08-23 1991-08-23 Manufacture of multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21202391A JPH0555752A (en) 1991-08-23 1991-08-23 Manufacture of multilayer printed wiring board

Publications (1)

Publication Number Publication Date
JPH0555752A true JPH0555752A (en) 1993-03-05

Family

ID=16615594

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21202391A Pending JPH0555752A (en) 1991-08-23 1991-08-23 Manufacture of multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPH0555752A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100907325B1 (en) * 2005-09-19 2009-07-13 인더스트리얼 테크놀로지 리서치 인스티튜트 Embedded capacitor core having a multiple-layer structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100907325B1 (en) * 2005-09-19 2009-07-13 인더스트리얼 테크놀로지 리서치 인스티튜트 Embedded capacitor core having a multiple-layer structure
US7893359B2 (en) 2005-09-19 2011-02-22 Industrial Technology Research Institute Embedded capacitor core having a multiple-layer structure

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