JPH0555141A - Creation of semiconductor quantum microline - Google Patents

Abstract

PURPOSE:To produce a semiconductor quantum microline surrounded by a flat side wall with the improved crystallinity and geometrical reproducibility of the quantum microline and without process damages by forming a quantum microline by employing a crystal orientation anisotropic etching process twice. CONSTITUTION:A mask material layer 4 is deposited on a crystal silicon layer 3, and a strip-shaped window is created in the region where a quantum microline is to be produced according to conventional techniques. The crystal silicon 3 defined in the window is removed by etching. In this etching process, the silicon is etched while its crystal orientation different from that of the top surface thereof is exposed. The mask material layer 4 is then removed. The structure is subjected to crystal orientation anisotropic etching again, so that another (111) is created in such a shape as to meet with the previously produced (111), whereby there is obtained a triangle pole, two surfaces of which are made up of the (111) surfaces. Accordingly there is created a quantum microline having a narrow when the thickness of the crystalline silicon layer 3 is significantly reduced. Also, a quantum microline surrounded by the flat side wall is obtained with the improved reproduciblility and without damaging the processed surfaces of the microline.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a semiconductor quantum wire used in a high-speed one-dimensional conduction transistor or a nonlinear element having high conversion efficiency utilizing quantum interference.

[0002]

2. Description of the Related Art When electrons are confined in a one-dimensional semiconductor quantum wire, electron scattering can be suppressed and a high electron mobility can be obtained. Therefore, an attempt has been made to obtain a high transconductance by introducing a quantum wire into a conventional field effect transistor. FIG. 9 shows the configuration of an example of a quantum wire reported so far.
That is, in the conventional manufacturing method, first, the oxide film 32 is formed on the p-type substrate 30, the gate electrode material 33 is deposited, and then the n-type inversion is performed by using the electron beam exposure technique and the etching technique using plasma. A quantum wire using the layer 31 was formed.

[0003]

However, the conventional method for forming a quantum wire has the following drawbacks and has a problem that the characteristics of a device using the quantum wire are deteriorated. That is, (1) since electron beam exposure is used, fluctuations during exposure affect the shape of the thin line, and the reproducibility of thin line formation is poor. (2) Etching using plasma during thin line formation Since it is used, the processed surface is easily damaged, and (3) the processed surface by etching using plasma has poor flatness, which causes carrier scattering.

The object of the present invention is to solve the problems of the prior art described above, to enhance the reproducibility of the crystallinity and shape of the quantum wire, and to surround it with a flat side wall that does not cause processing damage. Another object of the present invention is to provide a method for forming a semiconductor quantum wire.

[0005]

The above object can be achieved by the following quantum wire forming method. That is, the first method is a step of forming a crystal semiconductor layer having a first crystal orientation plane as an upper surface on an insulating layer, and a mask material layer having a stripe-shaped first window on the crystal semiconductor layer. An inverted trapezoid in which the insulating layer is exposed upward by forming and removing the crystalline semiconductor layer in the first window, and a part of the side surface is formed by the second crystal orientation plane. Forming a second window having the shape of
The method includes the step of removing the mask material layer and the step of removing the crystalline semiconductor layer in the region where the mask material layer is removed in a shape in which the second crystal orientation plane is exposed, and the side surface has the second crystal orientation plane. A second method is a method of forming a semiconductor quantum wire surrounded by, and a second method is a step of forming a crystal semiconductor layer having a first crystal orientation plane as an upper surface on an insulating layer, and a second step on the crystal semiconductor layer. A step of forming a mask material layer having a first window, and removing the crystalline semiconductor layer in the first window to expose the insulating layer upward and a part of a side surface of the second crystal. A step of forming a second window having an inverted trapezoidal shape composed of azimuth planes, a step of forming a side wall protective layer on at least a side wall of the second window, and a step of removing the mask material layer The crystalline semiconductor layer has a shape in which the second crystal orientation plane is exposed. A third step of forming a semiconductor quantum wire whose side surface is surrounded by a second crystal orientation plane, and a third method is a crystal having the first crystal orientation plane as an upper surface on an insulating layer. A step of forming a semiconductor layer, a step of forming a mask material layer having a first window on the crystalline semiconductor layer, and a step of removing the crystalline semiconductor layer in the first window to remove the insulating layer. Forming a second window exposed upward and having an inverted trapezoidal shape in which a part of the side surface is formed of the second crystal orientation plane; and
The step of forming a side wall protective film on the side wall of the second window, the step of removing the mask material layer, and the crystal semiconductor layer in the region where the mask material layer is removed expose the second crystal orientation plane. A step of removing the semiconductor crystal in the form of a semiconductor quantum wire whose side surface is surrounded by the second crystal orientation plane, and the fourth method is to form the first crystal orientation plane on the insulating layer as the top surface. Forming a crystalline semiconductor layer, forming a first mask material layer on the crystalline semiconductor layer, and forming a second mask material layer having a first window on the mask material layer. And a step of forming a second sidewall smaller than the first window by forming a first sidewall film on the sidewall of the first window, and a second sidewall on the sidewall of the second window. Forming a side wall film to form a third window smaller than the second window; Even if the first side wall film is removed, the second side wall film is isolated to expose a part of the first mask material layer on the upper surface, and the first side film exposed on the upper surface is removed. Removing the mask material layer to form a fourth window exposing a part of the crystalline semiconductor layer,
By removing the crystalline semiconductor layer exposed on the upper surface in the fourth window, the insulating layer is exposed upward and a part of the side surface is formed into an inverted trapezoidal shape. Forming a fifth window, the step of removing the first mask material layer, and the removal of the crystalline semiconductor layer in the region where the mask material layer is removed in a shape in which the second crystal orientation plane is exposed. And a step of forming a semiconductor quantum wire whose side surface is surrounded by a second crystal orientation plane. A fifth method is a crystal semiconductor having a first crystal orientation plane as an upper surface on an insulating layer. Forming a layer, and forming a first layer on the crystalline semiconductor layer.
A step of forming a mask material layer having a pattern of, and removing the crystalline semiconductor layer in a region not covered by the first mask material layer, thereby exposing the insulating layer upward,
In addition, a step of forming a crystalline semiconductor layer having a second crystal orientation plane partially formed on the side surface and having substantially the same shape as the first pattern, and a mask material layer having the second pattern are formed. And a step of removing the crystalline semiconductor layer in a region not covered with the mask material having the second pattern in a shape in which the second crystal orientation plane is exposed,
This is a method of forming a semiconductor quantum wire whose side surface is surrounded by a second crystal orientation plane, and a crystal semiconductor layer which is connected to the semiconductor quantum wire and has a shape substantially the same as that of the second pattern.

[0006]

The method of forming a semiconductor quantum wire according to the present invention has two steps.
Since it is a method of forming quantum wires using anisotropic crystal plane etching, the processed surface is not damaged,
A quantum wire can be formed with good reproducibility and surrounded by flat sidewalls.

[0007]

EXAMPLES The method of forming a semiconductor quantum wire of the present invention will be specifically described below with reference to examples. In this embodiment, the case where silicon is used as the material will be described, but the same effect can be obtained when other materials such as gallium arsenide are used.

[0008]

[Embodiment 1] An embodiment of a method for forming a semiconductor quantum wire of the present invention will be described with reference to FIG.

First, as shown in FIG. 1A, a silicon substrate 1 having a crystalline silicon layer 3 whose upper surface is a (100) surface on an insulating film 2 is prepared. This is a so-called SOI substrate (Silico
However, even if the silicon substrate 1 is not provided, the effect of the present invention is not affected at all.

Next, the mask material layer 4 is formed on the crystalline silicon layer 3.
Is deposited, and a stripe-shaped window is formed in a region where a quantum wire will be formed in the future to obtain a sample having a cross-sectional structure of FIG. 1 (b). Although a silicon nitride film was used as the mask material in the present embodiment, other materials such as a silicon oxide film and high-concentration boron-added silicon can be used to prevent etching of the crystalline silicon layer other than the window region in the next etching step. Anything is fine.

Next, the crystalline silicon layer 3 in the window is removed by etching. In this etching step, so-called crystal plane anisotropic etching is used in which crystalline silicon is etched while exposing a crystal plane orientation different from the top surface. In the case of the present embodiment, an aqueous solution of potassium hydroxide was used as the etching solution. In this case, the etching rate of the (111) plane is much slower than the etching rate of the (100) plane. As shown in, the etching proceeds in a shape in which the (111) plane is exposed. In addition, as the etching solution, in addition to the above potassium hydroxide solution, sodium hydroxide solution, hydrazine solution, a mixed solution of ethylenediamine and pyrocatechol, and anisotropic etching with a crystal plane such as ammonium fluoride to which copper nitrate is added. If it is possible, the effects of the present invention can be fully exhibited. When gallium arsenide is used as the semiconductor, bromine-
It is advisable to use a methanol solution. When such an etchant is used, the etching rate of the silicon oxide film is slow, so the etching stops when the insulating layer 2 is reached,
It has the shape shown in FIG.

Next, the mask material layer 4 is removed, and the mask material layer 4 shown in FIG.
The shape shown in is obtained.

Next, the crystal plane anisotropic etching is performed again. In this case, another (111) is formed in a shape opposite to the previously formed (111), and it is possible to obtain the shape of FIG. 1 (e), that is, a triangular prism whose two faces are composed of (111) faces. it can.

Here, when the thickness of the crystalline silicon layer 3 is set to dnm, the width of the bottom surface of the triangular prism is approximately 2d · tan (35.3
°) nm. Therefore, when the thickness of the crystalline silicon layer 3 is made extremely thin, a narrow quantum wire can be formed.

In the forming process of the present invention, since the fine line is processed by solution etching, there is no damage as in the case of plasma processing. Furthermore, the machined surface is determined in a self-aligned manner and has excellent flatness and reproducibility.

Since the length of the triangular prism is determined by the length of the window shown in FIG. 1 (b), it can be freely determined by changing the length of the window.

In the method of this embodiment, rectangular thin lines are formed along the "sides" of the striped window shown in FIG. 1 (b), but unnecessary thin lines are formed by the conventional lithography technique and etching technique. Just remove it.

[0018]

[Embodiment 2] Another embodiment of the method for forming quantum wires of the present invention will be described with reference to FIG. Here, only the cross-sectional view will be described.

Although Example 1 is an example in which a rectangular thin line is formed along the “side” of the striped window of FIG. 1 (b), this Example is a case where one quantum thin line is formed. Is an example of.

First, a substrate 1 having a crystalline silicon layer 3 whose upper surface is a (100) plane on an insulating film 2 is prepared, and the crystalline silicon layer is processed into an island shape as shown in FIG. 2 (a). Next, the mask material layer 4 is formed in the shape shown in FIG. In this example, a silicon nitride film was used as the mask material.
Finally, through the steps similar to those in FIGS. 1C to 1E, the quantum wire having the shape shown in FIG. 2C could be obtained.

[0021]

[Embodiment 3] Still another embodiment of the method for forming quantum wires of the present invention will be described with reference to FIG.

First, as in the case of the first embodiment, FIG.
Then, the side wall protective film 13 is formed only on the side wall of the window to obtain the shape shown in FIG. Although the silicon oxide film is used as the sidewall protection film in this embodiment, a silicon nitride film may be used. This shape is obtained by depositing a silicon oxide film on the entire surface of the substrate and performing known directional etching. This shape can also be obtained by, after obtaining the shape of FIG. 1D, oxidizing the crystalline silicon layer and performing directional etching. Further, after obtaining the shape shown in FIG. 1D, the crystalline silicon layer may be oxidized to obtain a substantially similar shape. In this case, it is the side wall surface (111)
Since the crystal plane has a higher oxidation rate than the upper surface (100) plane,
An oxide film thicker than the upper surface is formed on the side wall surface. For example, when oxidation is performed in an oxygen atmosphere at 900 ° C. for 300 minutes, an oxide film of about 70 nm is formed on the (111) plane, while the thickness of the oxide film on the (100) plane is It is about 45 nm. Therefore, even when the isotropic etching is performed, it is possible to expose the upper crystal face with a shape in which the oxide film on the side wall surface is left.

Next, the second anisotropic crystal etching is performed to obtain the shape shown in FIG. 3 (b). Further, by removing the side wall protective film 13, a quantum wire having substantially the same shape as that of FIG. 1 (e) can be obtained.

In the method of this embodiment, by introducing the side wall protective film 13, it is possible to reduce the loss of the (111) plane which was exposed first due to the second crystal anisotropic etching.

The method of this embodiment is an example applied to the first embodiment, but can be applied to the second embodiment.

[0026]

[Embodiment 4] Still another embodiment of the method for forming quantum wires of the present invention will be described with reference to FIG.

First, as in the case of the first embodiment, FIG.
After obtaining the shape of (c), the side wall protective film 13 is formed only on the side wall of the window, and the mask material layer 4 is removed to obtain the shape of FIG. Although the silicon oxide film is used as the sidewall protection film 13 in this embodiment, a silicon nitride film may be used. This shape can be obtained by depositing a silicon oxide film on the entire surface of the substrate and performing known directional etching.

Next, a second crystal plane anisotropic etching is performed to obtain the shape shown in FIG. 4 (b). Further, by removing the side wall protective film 13, a quantum wire having substantially the same shape as that of FIG. 1 (e) can be obtained.

By introducing the sidewall protective film by using the method of this embodiment, it is possible to reduce the loss of the first exposed (111) plane due to the second crystal plane anisotropic etching.

Although the forming method of this embodiment is an application example of the first embodiment, it can also be applied to the second embodiment.

[0031]

[Embodiment 5] Still another embodiment of the method for forming quantum wires of the present invention will be described with reference to FIG. This embodiment is an example in which a silicon nitride film which is an oxidation resistant material is used as the mask material layer 4.

First, after obtaining the shape shown in FIG. 1C, the crystalline silicon layer is oxidized. In this case, since the upper surface of the semiconductor 3 is covered with the oxidation resistant material, it is not oxidized and only the side surface is oxidized, so that the side wall protective film 13 formed of a silicon oxide film is obtained as in the shape of FIG. ..

Next, a mask material layer removing step, a second crystal plane anisotropic etching step, and a sidewall protecting film 13 removing step are performed to obtain quantum wires having substantially the same shape as in FIG. 1 (e). be able to.

In the process of this embodiment, the introduction of the side wall protective film 13 can reduce the loss of the first exposed (111) surface due to the second anisotropic crystal plane etching, as in the third embodiment. it can.

[0035]

[Embodiment 6] Still another embodiment of the method for forming quantum wires of the present invention will be described with reference to FIG. 1 in Example 1
Although the case where two thin wires are formed for each stripe-shaped window has been described, this embodiment describes the case where a large number of quantum wires are formed.

First, a substrate 1 having a crystalline silicon layer 3 whose upper surface is a (100) surface on an insulating film 2 is prepared, and after forming a first mask material layer 4, a window shown in FIG. The second mask material layer 10 having is formed. In this example, a silicon nitride film was used as the first mask material and polycrystalline silicon was used as the second mask material.

Next, as shown in FIG. 6B, a silicon oxide film 11 (first side wall film) is formed only on the side wall inside the window. This shape can be obtained by first uniformly depositing a silicon oxide film and then performing known directional etching.

Next, as shown in FIG. 6C, a polycrystalline silicon film 12 (second side wall film) is formed only on the side wall in the window.
This shape is obtained by first uniformly depositing a polycrystalline silicon film and then performing known directional etching.

Next, the silicon oxide film 11 and the first mask material layer thereunder are removed to obtain a shape as shown in FIG. 6 (d).

Next, by going through the process of FIG. 1 (c),
The shape shown in FIG. 6E can be obtained. In the present embodiment, the polycrystalline silicon films 10 and 12 are also etched, but even if a material that is not etched is used, the effect of the present invention is not affected at all.

Next, as in the case of Examples 3 to 5, the sidewall protective film is formed, the silicon nitride film is removed, the crystal plane anisotropic etching is performed, and the sidewall protective film is removed.
A quantum wire as shown in can be obtained.

In this embodiment, an example in which six thin lines are formed is shown, but the formation of the silicon oxide film (first side wall film) and the polycrystalline silicon film (second side wall film) on the side wall is repeated. By this, more thin lines can be formed.

Further, the interval between the thin lines is determined by the thickness of the silicon oxide film and the polycrystalline silicon film formed on the side wall, and the interval can be made extremely thin by reducing the thickness of both. Is.

[0044]

Seventh Embodiment An example in which one semiconductor quantum wire is formed by applying the quantum wire forming method of the present invention and applied to a field effect transistor will be described with reference to FIG.

First, after forming the quantum wires 3 by the forming process of Example 2, the surface of the crystalline silicon forming the quantum wires is oxidized, and then the oxide film in the regions for forming the source and drain electrodes is removed. The field effect transistor shown in FIG. 7 can be obtained by forming the source electrode 20, the drain electrode 21, and the gate electrode 22.

According to the forming method of the present invention, since a semiconductor quantum wire having no damage and good crystallinity can be used in the channel region, a field effect transistor having high transconductance can be obtained.

[0047]

[Embodiment 8] Still another embodiment of the method for forming quantum wires of the present invention will be described with reference to FIG. In addition, in FIG.
In each of (a) to (f), the upper diagram is a diagram of the predetermined region seen from the upper surface, and the lower diagram is a diagram showing a cross section taken along one-dot chain line of the upper diagram.

First, the substrate 1 having the crystalline silicon layer 3 whose upper surface is the (100) plane on the insulating film 2 is prepared, and the crystalline silicon layer is processed into an island shape as shown in FIG. 8A.

Next, the mask material layer 4 is formed in the shape shown in FIG. In this example, a silicon nitride film was used as the mask material.

Next, the first crystal plane anisotropic etching is performed to obtain the shape shown in FIG. 8 (c).

Next, as in the case of Examples 3 to 5, after forming the side wall protective film 13, a mask material layer 4'having the shape shown in FIG. 8D is formed. In this embodiment, a silicon oxide film is used as the sidewall protection film 13 and a silicon nitride film is used as the mask material. Further, in the present embodiment, the mask material layer 4 is removed and then a new mask material layer 4 ′ is formed, but the target shape can be obtained by removing a part of the mask material layer 4.

Next, a second crystal plane anisotropic etching is performed to obtain the shape shown in FIG. 8 (e).

Finally, by removing the sidewall protection film 13 and the mask material layer 4 ', as shown in FIG. 8 (f), the quantum wire made of a crystalline semiconductor and the pad portion connected to the quantum wire are formed.
You can get 35 and.

The shape of this embodiment is, for example, as shown in FIG.
It is very effective when applied to a field effect transistor using a semiconductor quantum wire. That is, as in the case of Example 5, after oxidizing the crystalline silicon surface, a gate electrode is formed in the quantum wire portion, and the oxide film of the pad portion in the region where the source and drain are formed is removed to remove the source region and the drain. A one-dimensional conduction transistor is obtained by forming the region. In this case, unlike the case of the fifth embodiment, since the source region and the drain region can be formed in the large pad portion, the contact resistance can be reduced. Therefore, a field effect transistor with higher performance can be formed.

In the case of this embodiment, an example in which two pad portions are formed is shown, but the number and shape of pads can be freely changed by changing the shape of the mask material layer 4 '. Is.

[0056]

As described above, by using the method of forming a semiconductor quantum wire as the method of the present invention, the problems of the prior art can be solved, and the crystallinity and shape of the quantum wire can be improved. It improves reproducibility and does not cause processing damage.
A method of forming a quantum wire surrounded by flat sidewalls could be provided. Further, by using the forming method of the present invention, a one-dimensional conduction field effect transistor having high transconductance can be obtained as compared with the conventional planar type field effect transistor.

[Brief description of drawings]

FIG. 1 is a cross-sectional configuration diagram of essential parts showing the procedure of an embodiment of a method for forming a semiconductor quantum wire of the present invention.

FIG. 2 is a cross-sectional configuration diagram of main parts showing the procedure of another embodiment of the method for forming a semiconductor quantum wire of the present invention.

FIG. 3 is a cross-sectional configuration diagram of essential parts showing the procedure of still another embodiment of the method for forming a semiconductor quantum wire of the present invention.

FIG. 4 is a cross-sectional configuration diagram of a main part showing the procedure of still another embodiment of the method for forming a semiconductor quantum wire of the present invention.

FIG. 5 is a cross-sectional view of the essential part showing the procedure of still another embodiment of the method for forming a semiconductor quantum wire of the present invention.

FIG. 6 is a cross-sectional configuration diagram of a main part showing the procedure of still another embodiment of the method for forming a semiconductor quantum wire according to the present invention.

FIG. 7 is a cross-sectional configuration diagram showing an example in which one semiconductor quantum wire is formed by applying the quantum wire forming method of the present invention and applied to a field effect transistor.

FIG. 8 is a cross-sectional configuration diagram of a main part showing the procedure of still another embodiment of the method for forming a semiconductor quantum wire of the present invention.

FIG. 9 is a cross-sectional configuration diagram showing an example of a quantum wire formed by a conventional forming method.

[Explanation of symbols]

1 ... Substrate, 2 ... Insulating layer, 3 ... Crystalline semiconductor layer, 4,
4 ', 10 ... Mask material layer, 11, 12 ... Side wall film, 13 ... Side wall protective film, 20 ... Source electrode, 21 ... Drain electrode, 22 ... Gate electrode, 30 ... P-type substrate, 31 ... N-type inversion layer, 32 ... oxide film, 33 ...
Gate electrode, 34 ... Quantum wire, 35 ... Pad section.

Claims (5)

[Claims] 1. A step of forming a crystal semiconductor layer having a first crystal orientation plane as an upper surface on an insulating layer, a step of forming a mask material layer having a first window on the crystal semiconductor layer, By removing the crystalline semiconductor layer in the first window,
The insulating layer is exposed upward, and a part of the side surface is the second side.
Forming a second window having an inverted trapezoidal shape composed of the crystal orientation planes, removing the mask material layer, and removing the mask material layer from the crystalline semiconductor layer in the region. Two
The method of forming a semiconductor quantum thin wire, comprising: removing the crystal orientation plane so that the crystal orientation plane is exposed, the side surface being surrounded by the second crystal orientation plane. 2. A step of forming a crystal semiconductor layer having a first crystal orientation plane as an upper surface on an insulating layer, a step of forming a mask material layer having a first window on the crystal semiconductor layer, By removing the crystalline semiconductor layer in the first window, the insulating layer is exposed upward, and a second side having an inverted trapezoidal shape in which a part of the side surface is formed by the second crystal orientation plane. The step of forming the window, the step of removing the mask material layer, the step of forming a sidewall protection film on at least the sidewall of the second window, and the step of removing the crystalline semiconductor layer in the region where the mask material layer is removed. ,
A method of forming a semiconductor quantum wire, comprising the step of removing the second crystal orientation surface in an exposed shape, the side surface being surrounded by the second crystal orientation surface. 3. A step of forming a crystal semiconductor layer having a first crystal orientation plane as an upper surface on the insulating layer, and a step of forming a mask material layer having a first window on the crystal semiconductor layer, By removing the crystalline semiconductor layer in the first window,
The insulating layer is exposed upward, and a part of the side surface is the second side.
Forming a second window having an inverted trapezoidal shape composed of the crystal orientation planes, forming a side wall protective film on at least the side wall of the second window, and removing the mask material layer. A step of forming the crystalline semiconductor layer in the region where the mask material layer is removed,
The method of forming a semiconductor quantum thin wire, comprising: removing the crystal orientation plane so that the crystal orientation plane is exposed, the side surface being surrounded by the second crystal orientation plane. 4. A step of forming a crystal semiconductor layer having a first crystal orientation plane as an upper surface on an insulating layer, a step of forming a first mask material layer on the crystal semiconductor layer, and the mask material layer. Forming a second mask material layer having a first window thereon, and forming a first side wall film on the side wall of the first window to form a second mask layer smaller than the first window. Forming a window, forming a second sidewall film on a sidewall of the second window to form a third window smaller than the second window, and at least the first sidewall. Removing the film to isolate the second sidewall film and expose a part of the first mask material layer on the upper surface; and removing the first mask material layer exposed on the upper surface, Forming a fourth window exposing a part of the crystalline semiconductor layer, and an upper surface in the fourth window And removing the crystalline semiconductor layer exposed at the upper part to expose the insulating layer upward and form a fifth window having an inverted trapezoidal shape in which a part of the side surface is formed by the second crystal orientation plane. And a step of removing the first mask material layer, and a step of removing the crystalline semiconductor layer in the region where the mask material layer is removed in a shape in which the second crystal orientation plane is exposed,
A method of forming a semiconductor quantum wire, the side surface of which is surrounded by a second crystal orientation plane. 5. A step of forming a crystal semiconductor layer having a first crystal orientation plane as an upper surface on the insulating layer, a step of forming a mask material layer having a first pattern on the crystal semiconductor layer, By removing the crystalline semiconductor layer in the region not covered by the first mask material layer, the insulating layer is exposed upward and a part of the side surface is formed by the second crystal orientation plane.
Forming a crystalline semiconductor layer having substantially the same shape as the first pattern, forming a mask material layer having the second pattern, and covering with a mask material having the second pattern A step of removing the crystalline semiconductor layer in the region in a shape in which a second crystal orientation plane is exposed, and a semiconductor quantum wire whose side surface is surrounded by the second crystal orientation plane, and a semiconductor quantum wire connected to the semiconductor quantum wire, A method of forming a crystalline semiconductor layer, which comprises forming a crystalline semiconductor layer having a shape substantially the same as that of the second pattern.