JPH0553268U - Multilayer printed circuit board unit - Google Patents

Multilayer printed circuit board unit

Info

Publication number
JPH0553268U
JPH0553268U JP10402191U JP10402191U JPH0553268U JP H0553268 U JPH0553268 U JP H0553268U JP 10402191 U JP10402191 U JP 10402191U JP 10402191 U JP10402191 U JP 10402191U JP H0553268 U JPH0553268 U JP H0553268U
Authority
JP
Japan
Prior art keywords
printed circuit
circuit board
pad
board
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10402191U
Other languages
Japanese (ja)
Inventor
明彦 八甫谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP10402191U priority Critical patent/JPH0553268U/en
Publication of JPH0553268U publication Critical patent/JPH0553268U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】 【構成】多層印刷基板の板端に基板表面から1層目を除
く導電層のうち1層の一部が露出するように段差が設
け、その1段面と2段面とにまたがって実装部品を実装
する。 【効果】 印刷基板の板端における部品実装において、
導電層を2層にまたがり実装できるため、板端側のパッ
ドからの配線を前記パッドに隣接する基板中心側のパッ
ド等を避けて通す必要がなくなるため、狭ピッチの実装
が可能になる。
(57) [Summary] [Structure] A step is provided on the board edge of the multilayer printed board so that part of one of the conductive layers except the first layer is exposed from the board surface. Mount the mounting components across. [Effect] When mounting components on the board edge of the printed circuit board,
Since the conductive layer can be mounted over two layers, it is not necessary to pass the wiring from the pad on the board end side away from the pad on the center side of the substrate adjacent to the pad, so that the mounting with a narrow pitch becomes possible.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial application]

この考案は、実装部品が実装された多層印刷基板ユニットに関する。 The present invention relates to a multilayer printed circuit board unit on which mounting components are mounted.

【0002】[0002]

【従来の技術】[Prior Art]

従来の印刷基板の板端部分に多ピンの表面実装部品(例えば、メモリカードの コネクタ)を実装する場合の印刷基板の斜視図を図5、その配線パターンを図6 に、従来の印刷基板に実装部品を接続した図6のA−A´断面図を図7、8に示 す。 Fig. 5 is a perspective view of a printed circuit board in the case where a multi-pin surface mount component (for example, a connector of a memory card) is mounted on the board end portion of the conventional printed circuit board, and its wiring pattern is shown in Fig. 6 7 and 8 are cross-sectional views taken along the line AA ′ of FIG. 6 in which the mounted components are connected.

【0003】 多層印刷基板は、例えば4層の導電層13と各導電層間を絶縁する硬化性の絶 縁層12とソルダリスト11からなる。各導電層13には、銅による配線が施さ れている。印刷基板表面から1層目の導電層13にはパッド同志を接続する配線 3aが形成されている。ソルダリスト11は、印刷基板1の表面に絶縁膜を形成 するものである。ソルダリストを塗布するとき、配線3の決められた一部を塗り 残し、実装部品のリードと接続されるエリアとなるパッド2a、2bを形成する 。パッド2aは多層印刷基板の板端側、パッド2bは、パッド2aの内側に配設 されている。12は、硬化性の絶縁層であり、ガラスエポキシ等からなる。実装 部品4aは表面実装用の部品、実装部品4bは、基板を挟み込むようにした4列 のリードからなる部品である。実装部品4a、4bはリードにより、パッド2a 、2bと半田接続される。The multilayer printed circuit board is composed of, for example, four conductive layers 13, a curable insulating layer 12 that insulates each conductive layer, and a solder list 11. The conductive layer 13 is provided with wiring made of copper. Wirings 3a for connecting the pads to each other are formed on the first conductive layer 13 from the surface of the printed board. The solder list 11 forms an insulating film on the surface of the printed board 1. When the solder list is applied, a predetermined part of the wiring 3 is left unpainted to form pads 2a and 2b which are areas to be connected to the leads of the mounted components. The pad 2a is arranged on the board end side of the multilayer printed board, and the pad 2b is arranged inside the pad 2a. Reference numeral 12 is a curable insulating layer made of glass epoxy or the like. The mounting component 4a is a component for surface mounting, and the mounting component 4b is a component composed of four rows of leads sandwiching the board. The mounted components 4a and 4b are soldered to the pads 2a and 2b by leads.

【0004】 ここで、多ピンの実装部品が印刷基板の板端以外で実装される場合は、図9に 示すように配線3をパッド2間に通す必要はないが、印刷基板の板端で実装され る場合は、図5に示すように配線3をパッド2aを隣接するパッド2bの間に通 さなければならない。そのため、ピッチ幅Cを狭くするにも限界があった。 また、スルーホールによって接続を行なう実装部品を用いようとしても、印刷 基板の板端にはスルーホールランドのランド部が形成できなかった。Here, when the multi-pin mounting component is mounted at a position other than the plate edge of the printed board, it is not necessary to pass the wiring 3 between the pads 2 as shown in FIG. In the case of mounting, the wiring 3 has to pass through the pad 2a between the adjacent pads 2b as shown in FIG. Therefore, there is a limit in narrowing the pitch width C. Moreover, even if a mounted component that is connected by a through hole is used, the land portion of the through hole land cannot be formed at the plate edge of the printed board.

【0005】[0005]

【考案が解決しようとする課題】[Problems to be solved by the device]

印刷基板の板端に実装部品を実装する場合、配線パターンを通すため、隣接す るパッドとの間隔を十分取らなければならず、狭ピッチ実装できなかった。また 、リードのピッチ幅が広い板端専用の実装部品は、特別仕様により製造しなけれ ばならず、製造コストが上がる。そのため、通常ピッチ幅(狭ピッチ)の実装部 品のままで、基板を狭ピッチ実装できるようにすることが望まれていた。 そこで、本願考案は以上の点に鑑み、実装基板の板端に実装部品を狭ピッチ実 装した多層印刷基板ユニットを提供することを目的とする。 When mounting components on the board edge of the printed circuit board, the wiring pattern is passed through, so there must be a sufficient space between adjacent pads, and narrow pitch mounting was not possible. In addition, the mounting components with a wide lead pitch for exclusive use on the plate edge must be manufactured according to special specifications, which increases the manufacturing cost. Therefore, it has been desired that the board can be mounted at a narrow pitch with the mounting component having a normal pitch width (narrow pitch) as it is. In view of the above points, an object of the present invention is to provide a multilayer printed circuit board unit in which mounting components are mounted on a plate edge of the mounting substrate with a narrow pitch.

【0006】[0006]

【課題を解決するための手段】[Means for Solving the Problems]

上記目的を達成するために本願考案の多層印刷基板ユニットは、配線が施され た第1の導電層と第2の導電層とを具備する多層印刷基板と、前記多層印刷基板 の前記第1の導電層と前記第2の導電層にまたがって表面実装される実装部品と を具備する。 In order to achieve the above object, a multi-layer printed circuit board unit of the present invention comprises a multi-layer printed circuit board having a first conductive layer and a second conductive layer on which wiring is provided, and the first multi-layer printed circuit board of the multi-layer printed circuit board. And a mounting component that is surface-mounted across the second conductive layer.

【0007】 更に、上記多層印刷基板ユニットにおいて、第1の導電層と前記実装部品の複 数のリードの一部とを接続するための第1のパッドが設けられた第1段面と、印 刷基板に段差を設け、前記第1段面と異なる第2の導電層と前記実装部品の複数 のリードの残りの一部または全部とを接続するための第2のパッドが設けられた 第2段面とを備えた印刷基板と、前記リードにより前記第1段面と前記第2段面 とにわたり表面実装される実装部品とを具備する。Further, in the above-mentioned multilayer printed circuit board unit, a first step surface provided with a first pad for connecting the first conductive layer and a part of a plurality of leads of the mounting component, A second pad provided with a step on the printed circuit board, and a second pad for connecting the second conductive layer different from the first step surface and the remaining part or all of the plurality of leads of the mounting component. A printed board having a step surface, and a mounting component surface-mounted on the first step surface and the second step surface by the lead are provided.

【0008】[0008]

【作用】[Action]

印刷基板は、2以上の導電層からなり、隣接する導電層の間には絶縁膜が形成 されている。各導電層には配線が施されている。2以上の導電層は一部印刷基板 表面に露出している。実装部品は複数のリードを備え、第1の導電層の露出部と 第2の導電層の露出部とにまたがって表面実装されている。 The printed board is composed of two or more conductive layers, and an insulating film is formed between adjacent conductive layers. Wiring is applied to each conductive layer. Two or more conductive layers are partially exposed on the surface of the printed board. The mounted component includes a plurality of leads and is surface-mounted across the exposed portion of the first conductive layer and the exposed portion of the second conductive layer.

【0009】 これにより、印刷基板の板端における部品実装においても、導電層を2層使用 することができるため、板端のパッドからの配線を、前記パッドに隣接する基板 中心側のパッド等を避けて通す必要がなくなるため、狭ピッチの実装が可能にな る。Thus, even when mounting components on the board edge of the printed board, two layers of conductive layers can be used, so that wiring from the pad at the board edge can be performed by connecting the pad on the board center side adjacent to the pad. Since it is not necessary to avoid it, narrow pitch mounting is possible.

【0010】 また、印刷基板の板端には、基板板表面から1層目を除く導電層のうち1層の 一部が露出するように段差が設けられている。基板表面を1段面、1段面とほぼ 平行に設けられた面を2段面とすると、複数のリードを持つ実装部品は、1段面 と2段面に渡り実装することができる。 このように印刷基板の板端に段差を設けることは容易であり、よって簡単に狭 ピッチの実装が実現できる。Further, a step is provided on the plate edge of the printed board so that a part of one layer of the conductive layer except the first layer is exposed from the surface of the board. If the surface of the substrate is a one-step surface, and the surface provided substantially parallel to the one-step surface is a two-step surface, then a mounting component having a plurality of leads can be mounted over the one-step surface and the two-step surface. In this way, it is easy to provide a step at the plate edge of the printed board, and therefore, narrow pitch mounting can be easily realized.

【0011】[0011]

【実施例】【Example】

以下に本願考案の実施例を示す。図1は印刷基板の板端部分に多ピンの表面実 装部品を実装する場合の印刷基板の斜視図、図2はその配線パターン図、図3、 図4は印刷基板に実装部品を接続した図2のA−A´断面図である。従来の技術 で説明したものと同一構成のものは省略する。 印刷基板の板端には図に示すように段差が設けられている。この段差の上段を 基板表面5b、下段を内層表面5aとする。 基板表面5bにはパッド2bが設けられており、パッド2bは基板表面5bか ら1層目の導電層に設けられる配線3aと一体形成されている。 内層表面5aにはパッド2aが設けられており、パッド2aは基板表面5aか ら2層目の導電層に設けられる配線3bと一体形成されている。 Examples of the present invention will be shown below. Fig. 1 is a perspective view of a printed circuit board in the case of mounting multi-pin surface mounting parts on the board edge part of the printed circuit board, Fig. 2 is its wiring pattern diagram, and Figs. 3 and 4 are the mounting parts connected to the printed circuit board. FIG. 3 is a sectional view taken along the line AA ′ of FIG. 2. The same configurations as those described in the related art will be omitted. A step is provided at the plate edge of the printed board as shown in the figure. The upper step of this step is the substrate surface 5b, and the lower step is the inner layer surface 5a. A pad 2b is provided on the substrate surface 5b, and the pad 2b is integrally formed with the wiring 3a provided on the first conductive layer from the substrate surface 5b. A pad 2a is provided on the inner layer surface 5a, and the pad 2a is integrally formed with a wiring 3b provided on the second conductive layer from the substrate surface 5a.

【0012】 なお、このように段差を設けた印刷基板を作成する方法としては、外層からの 切削方法や多層板積層時に内層表面5aとなる部分に予め、テーピングを施し完 了時に剥がす等が考えられるが、特に作成方法の指定はない。As a method of producing a printed board having such a step, it is conceivable to use a method of cutting from the outer layer or a step of taping the portion to be the inner layer surface 5a when laminating the multilayer boards in advance and peeling off when completed. However, the creation method is not specified.

【0013】 印刷基板の端部に段差を設けることにより、配線3bは、配線3aのある導電 層の下層を通るため従来例のように内側のパッド2b間に配線3bを通す必要が なくなり、ピッチ幅Cを狭ピッチにすることができる。By providing a step at the end of the printed board, the wiring 3b passes through the lower layer of the conductive layer having the wiring 3a, so that it is not necessary to pass the wiring 3b between the inner pads 2b as in the conventional example. The width C can be a narrow pitch.

【0014】 また、図面では分かり易くするようにかなり段差を付けているが、実際は約0 .1ミリから0.3ミリ程度しか差がないため、リードの長さを変える事なく、 標準部品が使用できる。In addition, in order to make it easy to understand in the drawing, there are considerable steps, but in reality, it is about 0. Since there is a difference of only 1 mm to 0.3 mm, standard parts can be used without changing the lead length.

【0015】[0015]

【考案の効果】[Effect of the device]

以上説明したように、本願考案によれば、印刷基板の板端の部品実装において 、導電層を2層使用することができるため、板端のパッドからの配線を、前記パ ッドに隣接する基板中心側のパッド等を避けて通す必要がなくなるため、狭ピッ チの実装が可能になる。 As described above, according to the present invention, since two conductive layers can be used for mounting components on the board edge of the printed board, the wiring from the pad on the board edge is adjacent to the pad. Since it is not necessary to avoid passing through the pads on the center side of the board, narrow pitch mounting is possible.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本願考案の多層印刷基板ユニットの多層印刷
基板の板端付近の斜視図である。
FIG. 1 is a perspective view of the multi-layer printed circuit board unit of the present invention in the vicinity of a plate end of the multi-layer printed circuit board.

【図2】 本願考案の多層印刷基板ユニットの多層印刷
基板の板端付近を上から見た図である。
FIG. 2 is a view of the vicinity of a plate edge of the multilayer printed board of the multilayer printed board unit according to the present invention as viewed from above.

【図3】 本願考案の多層印刷基板ユニットの断面図で
ある。
FIG. 3 is a cross-sectional view of a multilayer printed circuit board unit according to the present invention.

【図4】 本願考案の多層印刷基板ユニットの断面図で
ある。
FIG. 4 is a cross-sectional view of a multilayer printed circuit board unit according to the present invention.

【図5】 従来例の多層印刷基板ユニットの多層印刷基
板の板端付近の斜視図である。
FIG. 5 is a perspective view of the vicinity of a plate end of a multilayer printed board of a conventional multilayer printed board unit.

【図6】 従来例の多層印刷基板ユニットの多層印刷基
板の板端付近を上から見た図である。
FIG. 6 is a view of the vicinity of the plate edge of the multilayer printed board of the conventional multilayer printed board unit as viewed from above.

【図7】 従来例の多層印刷基板ユニットの断面図であ
る。
FIG. 7 is a cross-sectional view of a conventional multilayer printed circuit board unit.

【図8】 従来例の多層印刷基板ユニットの断面図であ
る。
FIG. 8 is a sectional view of a conventional multilayer printed circuit board unit.

【図9】 板端以外で実装される多層印刷基板ユニット
の多層印刷基板の斜視図である。
FIG. 9 is a perspective view of a multilayer printed circuit board of a multilayer printed circuit board unit mounted at a position other than the plate edge.

【符号の説明】[Explanation of symbols]

13 導電層 12 絶縁層 11 ソルダリスト 3、3a、3b 配線 2a、2b パッド 4a、4b 実装部品 5b 基板表面 5a 内層表面 13 conductive layer 12 insulating layer 11 solder list 3, 3a, 3b wiring 2a, 2b pad 4a, 4b mounting component 5b substrate surface 5a inner layer surface

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 配線が施された第1の導電層に接続され
る第1のパッドと、配線が施された第2の導電層に接続
される第2のパッドとを具備する多層印刷基板と、 複数のリードを備え、前記多層印刷基板の前記第1のパ
ッドに少なくとも1つのリードが積載実装され、かつ前
記第2のパッドに他の少なくとも1つのリードが積載実
装される実装部品とを具備したことを特徴とする多層印
刷基板ユニット。
1. A multilayer printed circuit board comprising: a first pad connected to a first conductive layer provided with wiring; and a second pad connected to a second conductive layer provided with wiring. And a mounting component including a plurality of leads, wherein at least one lead is stacked and mounted on the first pad of the multilayer printed board, and at least one other lead is stacked and mounted on the second pad. A multi-layer printed circuit board unit characterized by comprising.
【請求項2】 請求項1の多層印刷基板ユニットにおい
て、第1の導電層と前記実装部品の複数のリードの一部
とを接続するための第1のパッドが設けられた第1段面
と、 段差によって前記第1段面と異なって、第2の導電層と
前記実装部品の複数のリードの残りの一部または全部と
を接続するための第2のパッドが設けられた第2段面と
を備えた印刷基板と、 前記リードにより前記第1段面と前記第2段面とにわた
り表面実装される実装部品とを具備したことを特徴とす
る多層印刷基板ユニット。
2. The multilayer printed circuit board unit according to claim 1, further comprising a first step surface provided with a first pad for connecting the first conductive layer and a part of a plurality of leads of the mounting component. A second step surface provided with a second pad for connecting the second conductive layer and some or all of the rest of the plurality of leads of the mounting component, different from the first step surface due to a step A multilayer printed circuit board unit, comprising: a printed circuit board including: and a mounting component that is surface-mounted by the lead over the first step surface and the second step surface.
JP10402191U 1991-12-18 1991-12-18 Multilayer printed circuit board unit Pending JPH0553268U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10402191U JPH0553268U (en) 1991-12-18 1991-12-18 Multilayer printed circuit board unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10402191U JPH0553268U (en) 1991-12-18 1991-12-18 Multilayer printed circuit board unit

Publications (1)

Publication Number Publication Date
JPH0553268U true JPH0553268U (en) 1993-07-13

Family

ID=14369610

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10402191U Pending JPH0553268U (en) 1991-12-18 1991-12-18 Multilayer printed circuit board unit

Country Status (1)

Country Link
JP (1) JPH0553268U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59163891A (en) * 1983-03-08 1984-09-14 富士通株式会社 Ceramic circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59163891A (en) * 1983-03-08 1984-09-14 富士通株式会社 Ceramic circuit board

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