JPH0552908A - Circuit for correcting output voltage of ic tester driver - Google Patents
Circuit for correcting output voltage of ic tester driverInfo
- Publication number
- JPH0552908A JPH0552908A JP3235768A JP23576891A JPH0552908A JP H0552908 A JPH0552908 A JP H0552908A JP 3235768 A JP3235768 A JP 3235768A JP 23576891 A JP23576891 A JP 23576891A JP H0552908 A JPH0552908 A JP H0552908A
- Authority
- JP
- Japan
- Prior art keywords
- output
- input terminal
- voltage
- amplifier
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、ＩＣテスタ用ドライ
バの出力電圧を設定電圧と等しくするための出力電圧補
正回路についてのものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an output voltage correction circuit for making an output voltage of an IC tester driver equal to a set voltage.
【０００２】[0002]
【従来の技術】次に、従来技術によるドライバの出力電
圧補正回路の構成を図２により説明する。図２の１と２
は増幅器、３はドライバ、３１と３２はドライバ３の出
力レベル補正用の可変抵抗器、４はスイッチ、５は電圧
測定器である。2. Description of the Related Art Next, a configuration of a conventional output voltage correction circuit for a driver will be described with reference to FIG. 1 and 2 in FIG.
Is an amplifier, 3 is a driver, 31 and 32 are variable resistors for correcting the output level of the driver 3, 4 is a switch, and 5 is a voltage measuring device.
【０００３】図２の１Ａは増幅器１の入力端子、２Ａは
増幅器２の入力端子、３Ａはドライバ３の入力端子、３
Ｂはドライバ３の出力端子、３Ｃと３Ｄはドライバの入
力端子である。入力端子３Ａが正論理のとき、ドライバ
３の出力端子３Ｂには入力端子３Ｃの電圧が出力され、
入力端子３Ａが負論理のとき、ドライバ３の出力端子３
Ｂには入力端子３Ｄの電圧が出力される。In FIG. 2, 1A is an input terminal of the amplifier 1, 2A is an input terminal of the amplifier 2, 3A is an input terminal of the driver 3, 3
B is the output terminal of the driver 3, and 3C and 3D are the input terminals of the driver. When the input terminal 3A is positive logic, the voltage of the input terminal 3C is output to the output terminal 3B of the driver 3,
When the input terminal 3A has a negative logic, the output terminal 3 of the driver 3
The voltage of the input terminal 3D is output to B.
【０００４】入力端子３Ａが正論理のときのドライバ３
の出力端子３Ｂと、入力端子３Ａが負論理のときのドラ
イバ３の出力端子３Ｂには、それぞれオフセット誤差と
ゲイン誤差が含まれる。そこで、入力端子３Ａが正論理
のときのドライバ３の出力端子３Ｂのオフセット誤差を
可変抵抗器３１で補正し、入力端子３Ａが負論理のとき
のドライバ３の出力端子３Ｂのオフセット誤差を可変抵
抗器３２で補正する。スイッチ４をオンにすると、出力
端子３Ｂの電圧が電圧測定器５で測定される。ＩＣテス
タでは、入力端子１Ａと入力端子２Ａの電圧はプログラ
マブルであり、数百ｍｓの間にいろいろな電圧が設定さ
れるので、ゲイン誤差については補正されていない。Driver 3 when input terminal 3A is positive logic
The output terminal 3B of the driver and the output terminal 3B of the driver 3 when the input terminal 3A has a negative logic include an offset error and a gain error, respectively. Therefore, the offset error of the output terminal 3B of the driver 3 when the input terminal 3A is positive logic is corrected by the variable resistor 31, and the offset error of the output terminal 3B of the driver 3 when the input terminal 3A is negative logic is changed by the variable resistor. Correct with the instrument 32. When the switch 4 is turned on, the voltage at the output terminal 3B is measured by the voltage measuring device 5. In the IC tester, the voltages at the input terminal 1A and the input terminal 2A are programmable, and various voltages are set within several hundred ms, so the gain error is not corrected.
【０００５】例えば、入力端子３Ａが正論理のとき入力
端子１Ａに５Ｖを加えると、出力端子３Ｂの電圧は５Ｖ
になるはずであるが、実際にはオフセット誤差とゲイン
誤差により出力端子３Ｂの電圧は４．９８Ｖなどにな
り、入力端子３Ａが負論理のとき入力端子２Ａに−５Ｖ
を加えると、出力端子３Ｂの電圧は−５Ｖになるはずで
あるが、実際にはオフセット誤差とゲイン誤差により出
力端子３Ｂの電圧は−４．９８Ｖなどになる。同様に、
入力端子３Ａが正論理のとき入力端子１Ａに０Ｖを加え
ると、出力端子３Ｂの電圧は０Ｖになるはずであるが、
実際には−０．０２Ｖなどになり、入力端子３Ａが負論
理のとき入力端子２Ａに０Ｖを加えると、出力端子３Ｂ
の電圧は０Ｖになるはずであるが、実際には＋０．０２
Ｖなどになる。For example, if 5V is applied to the input terminal 1A when the input terminal 3A is positive logic, the voltage at the output terminal 3B is 5V.
However, the voltage of the output terminal 3B actually becomes 4.98V due to the offset error and the gain error, and when the input terminal 3A has a negative logic, the input terminal 2A has a voltage of -5V.
Should be added, the voltage of the output terminal 3B should be -5V, but actually the voltage of the output terminal 3B becomes -4.98V due to the offset error and the gain error. Similarly,
If 0V is applied to the input terminal 1A when the input terminal 3A is positive logic, the voltage at the output terminal 3B should be 0V.
Actually, it becomes −0.02V, etc., and if 0V is applied to the input terminal 2A when the input terminal 3A has a negative logic, the output terminal 3B
Voltage should be 0V, but actually +0.02
V, etc.
【０００６】[0006]
【発明が解決しようとする課題】図２では、ドライバ３
の出力レベルを可変抵抗器３１または可変抵抗器３２で
補正するので、短時間では補正することができず、ゲイ
ン誤差は補正されていない。この発明は増幅器１と増幅
器２にそれぞれ帰還抵抗を接続し、帰還抵抗に補正電流
を流して増幅器１と増幅器２の出力電圧を補正すること
によりドライバ３の出力電圧を補正し、端子３Ｂの電圧
が入力端子１Ａの電圧又は入力端子２Ａの電圧になるよ
うにすることを目的とする。In FIG. 2, the driver 3 is used.
Since the output level of is corrected by the variable resistor 31 or the variable resistor 32, it cannot be corrected in a short time, and the gain error is not corrected. According to the present invention, a feedback resistor is connected to each of the amplifier 1 and the amplifier 2, and a correction current is passed through the feedback resistor to correct the output voltage of the amplifier 1 and the amplifier 2, thereby correcting the output voltage of the driver 3 and the voltage of the terminal 3B. Is to be the voltage of the input terminal 1A or the voltage of the input terminal 2A.
【０００７】[0007]
【課題を解決するための手段】この目的を達成するため
に、この発明では、入力端子１Ａに加えられた電圧を増
幅し、入力端子１Ｂと出力間に帰還抵抗１１が接続され
る増幅器１と、入力端子２Ａに加えられた電圧を増幅
し、入力端子２Ｂと出力間に帰還抵抗１２が接続される
増幅器２と、増幅器１の出力が入力端子３Ｃに加えら
れ、増幅器２の出力が入力端子３Ｄに加えられ、入力端
子３Ａに正論理が加えられたとき、入力端子３Ｃの電圧
が出力端子３Ｂに出力され、入力端子３Ａに負論理が加
えられたとき、入力端子３Ｄの電圧が出力端子３Ｂに出
力されるドライバ３と、増幅器１の帰還抵抗１１に流す
電流を制御し、増幅器１の出力電圧を制御する電流出力
型のＤ／Ａ変換器６と、増幅器２の帰還抵抗１２に流す
電流を制御し、増幅器２の出力電圧を制御する電流出力
型のＤ／Ａ変換器７と、Ｄ／Ａ変換器６の入力６Ａ又は
Ｄ／Ａ変換器７の入力７Ａの設定を制御し、ドライバ３
の出力端子３Ｂの電圧を入力端子１Ａの電圧又は入力端
子２Ａの電圧と等しくする制御手段８と、オフセット誤
差補正時のＤ／Ａ変換器６の入力６ＡとＤ／Ａ変換器７
の入力７Ａの最終設定値２１と、ゲイン誤差補正時のの
Ｄ／Ａ変換器６の入力６ＡとＤ／Ａ変換器７の入力７Ａ
の最終設定値２２とを記憶する記憶装置９とを備える。In order to achieve this object, according to the present invention, an amplifier 1 in which a voltage applied to an input terminal 1A is amplified and a feedback resistor 11 is connected between an input terminal 1B and an output is provided. , The amplifier 2 that amplifies the voltage applied to the input terminal 2A, and the feedback resistor 12 is connected between the input terminal 2B and the output, and the output of the amplifier 1 is applied to the input terminal 3C, and the output of the amplifier 2 is the input terminal. 3D and when positive logic is applied to the input terminal 3A, the voltage of the input terminal 3C is output to the output terminal 3B, and when negative logic is applied to the input terminal 3A, the voltage of the input terminal 3D is output terminal. A current output type D / A converter 6 that controls the current flowing through the driver 3 output to 3B and the feedback resistor 11 of the amplifier 1 and controls the output voltage of the amplifier 1 and the feedback resistor 12 of the amplifier 2. Current control and amplifier A D / A converter 7 of the current output type for controlling the output voltage of, controls the configuration of the input 7A of the input 6A or D / A converter 7 of the D / A converter 6, the driver 3
Control means 8 for equalizing the voltage of the output terminal 3B of the same with the voltage of the input terminal 1A or the voltage of the input terminal 2A, and the input 6A and the D / A converter 7 of the D / A converter 6 at the time of offset error correction.
Setting value 21 of the input 7A of the input, the input 6A of the D / A converter 6 and the input 7A of the D / A converter 7 at the time of gain error correction
And a storage device 9 for storing the final set value 22 of
【０００８】[0008]
【作用】次に、この発明によるＩＣテスタ用ドライバの
出力電圧補正回路の構成を図１により説明する。図１の
６と７は電流出力型のＤ／Ａ変換器、８は制御手段、９
は記憶装置、１１は増幅器１の出力と入力端子１Ｂ間に
接続される帰還抵抗、１２は増幅器２の出力と入力端子
２Ｂ間に接続される帰還抵抗であり、その他は図２と同
じものである。Next, the structure of the output voltage correction circuit of the IC tester driver according to the present invention will be described with reference to FIG. In FIG. 1, 6 and 7 are current output type D / A converters, 8 is control means, and 9
Is a storage device, 11 is a feedback resistor connected between the output of the amplifier 1 and the input terminal 1B, 12 is a feedback resistor connected between the output of the amplifier 2 and the input terminal 2B, and others are the same as those in FIG. is there.
【０００９】増幅器１の入力端子１Ａに加えられた電圧
は、Ｄ／Ａ変換器６の出力電流と帰還抵抗１１の積の電
圧が加算されて、ドライバ３の入力端子３Ｃに加えら
れ、ドライバ３の入力３Ａが正論理のとき出力端子３Ｂ
に出力される。制御手段８は、ドライバ３の出力端子３
Ｂをスイッチ４を通して電圧測定器５が測定した結果と
入力端子１Ａに加えられた電圧とが等しくなるようにＤ
／Ａ変換器６の入力６Ａを変えながらＤ／Ａ変換器６の
入力６Ａの設定値を決め、補正をする。The voltage applied to the input terminal 1A of the amplifier 1 is added to the output current of the D / A converter 6 and the voltage of the feedback resistor 11 and applied to the input terminal 3C of the driver 3 to drive the driver 3 Output terminal 3B when the input 3A is positive logic
Is output to. The control means 8 controls the output terminal 3 of the driver 3.
The voltage measured by the voltage measuring device 5 through the switch 4 and the voltage applied to the input terminal 1A become equal to each other.
While changing the input 6A of the / A converter 6, the set value of the input 6A of the D / A converter 6 is determined and corrected.
【００１０】次に、具体的な補正手順を説明する。第１
段階では、入力端子１Ａに電圧を加え、入力６Ａに初期
値を設定する。第２段階では、ドライバ出力端子３Ｂの
電圧を測定する。第３段階では、入力端子１Ａと出力端
子３Ｂの電圧を比較し、等しくない場合には第４段階へ
と進み、入力端子１Ａと出力端子３Ｂの電圧が等しくな
ったとき、補正が完了となる。第４段階では、入力６Ａ
の現在の設定を増減し、入力６Ａを再設定し、第３段階
へ戻す。Next, a specific correction procedure will be described. First
At the stage, a voltage is applied to the input terminal 1A and an initial value is set to the input 6A. In the second stage, the voltage of the driver output terminal 3B is measured. In the third stage, the voltages of the input terminal 1A and the output terminal 3B are compared, and if they are not equal, the process proceeds to the fourth stage, and when the voltages of the input terminal 1A and the output terminal 3B are equalized, the correction is completed. .. In the 4th stage, input 6A
Increases or decreases the current setting of, resets the input 6A, and returns to the third stage.
【００１１】入力端子１Ａの電圧が０Ｖのときに最終的
に決められたＤ／Ａ変換器６の入力６Ａの設定値２１
は、オフセット誤差補正時の設定値として記憶装置９に
記憶され、入力端子１Ａの電圧が例えば５Ｖのときに最
終的決められたＤ／Ａ変換器６の入力６Ａの設定値２２
はゲイン誤差補正時の設定値として記憶装置９に記憶さ
れる。The set value 21 of the input 6A of the D / A converter 6 finally determined when the voltage of the input terminal 1A is 0V.
Is stored in the storage device 9 as a set value at the time of offset error correction, and the set value 22 of the input 6A of the D / A converter 6 finally determined when the voltage of the input terminal 1A is, for example, 5V.
Is stored in the storage device 9 as a set value for gain error correction.
【００１２】次に、入力端子１Ａに０〜５Ｖの範囲の電
圧が加えられたときの入力６Ａの設定値２３は、記憶装
置９のオフセット誤差補正時の設定値２１とゲイン誤差
補正時の設定値２２の２点の間を直線近似とみなして制
御手段８が演算することにより出力端子３Ｂの電圧を入
力端子１Ａの電圧と同じにすることができる。入力端子
２Ａ側も同様にして、ドライバ３の電圧を補正する。Next, the set value 23 of the input 6A when a voltage in the range of 0 to 5V is applied to the input terminal 1A, the set value 21 when the offset error of the storage device 9 is corrected and the set value 23 when the gain error is corrected are set. The voltage at the output terminal 3B can be made the same as the voltage at the input terminal 1A by the control means 8 performing the calculation by regarding between the two points of the value 22 as linear approximation. Similarly, the voltage of the driver 3 is corrected on the input terminal 2A side.
【００１３】[0013]
【発明の効果】この発明によれば、２個の増幅器にそれ
ぞれ帰還抵抗を接続し、帰還抵抗に補正電流を流して２
個の増幅器の出力電圧を補正することによりドライバの
出力電圧を補正しているので、出力端子の電圧を入力端
子１Ａの電圧又は入力端子２Ａの電圧と同じににするこ
とができる。また、制御手段と記憶装置を使用している
ので、プログラマブルな出力電圧の設定のすべてについ
て補正をすることができる。According to the present invention, a feedback resistor is connected to each of the two amplifiers, and a correction current is passed through the feedback resistor to make it
Since the output voltage of the driver is corrected by correcting the output voltage of each amplifier, the voltage of the output terminal can be made the same as the voltage of the input terminal 1A or the voltage of the input terminal 2A. Further, since the control means and the storage device are used, it is possible to correct all programmable output voltage settings.
【図１】この発明によるＩＣテスタ用ドライバの出力電
圧補正回路である。FIG. 1 is an output voltage correction circuit of an IC tester driver according to the present invention.
【図２】従来技術によるＩＣテスタ用ドライバの出力電
圧補正回路である。FIG. 2 is an output voltage correction circuit of a driver for an IC tester according to a conventional technique.
１ 増幅器 ２ 増幅器 ３ ドライバ ４ スイッチ ５ 電圧測定器 ６ Ｄ／Ａ変換器 ７ Ｄ／Ａ変換器 ８ 制御手段 ９ 記憶装置 1 Amplifier 2 Amplifier 3 Driver 4 Switch 5 Voltage Measuring Device 6 D / A Converter 7 D / A Converter 8 Control Means 9 Storage Device
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 27/04 Ｔ 8427−4Ｍ ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI technical display location H01L 27/04 T 8427-4M
Claims (2)
増幅し、第２の入力端子(1B)と出力間に帰還抵抗(11)が
接続される第１の増幅器(1) と、 第３の入力端子(2A)に加えられた電圧を増幅し、第４の
入力端子(2B)と出力間に帰還抵抗(12)が接続される第２
の増幅器(2) と、 第１の増幅器(1) の出力が第５の入力端子(3C)に加えら
れ、第２の増幅器(2)の出力が第６の入力端子(3D)に加
えられ、第７の入力端子(3A)に正論理が加えられたと
き、第５の入力端子(3C)の電圧が出力端子(3B)に出力さ
れ、第７の入力端子(3A)に負論理が加えられたとき、第
６の入力端子(3D)の電圧が出力端子(3B)に出力されるド
ライバ(3) と、 第１の増幅器(1) の帰還抵抗(11)に流す電流を制御し、
第１の増幅器(1) の出力電圧を制御する電流出力型の第
１のＤ／Ａ変換器(6) と、 第２の増幅器(2) の帰還抵抗(12)に流す電流を制御し、
第２の増幅器(2) の出力電圧を制御する電流出力型の第
２のＤ／Ａ変換器(7) と、 第１のＤ／Ａ変換器(6) の入力(6A)又は第２のＤ／Ａ変
換器(7) の入力(7A)の設定を制御し、ドライバ(3) の出
力端子(3B)の電圧を第１の入力端子(1A)の電圧又は第３
の入力端子(2A)の電圧と等しくする制御手段(8) とを備
えることを特徴とするＩＣテスタ用ドライバの出力電圧
補正回路。1. A first amplifier (1) for amplifying a voltage applied to a first input terminal (1A) and connecting a feedback resistor (11) between the second input terminal (1B) and an output. And a voltage applied to the third input terminal (2A) is amplified, and a feedback resistor (12) is connected between the fourth input terminal (2B) and the output.
And the output of the first amplifier (1) is applied to the fifth input terminal (3C) and the output of the second amplifier (2) is applied to the sixth input terminal (3D). , When positive logic is applied to the seventh input terminal (3A), the voltage of the fifth input terminal (3C) is output to the output terminal (3B) and negative logic is applied to the seventh input terminal (3A). When applied, it controls the current flowing through the driver (3) that outputs the voltage of the sixth input terminal (3D) to the output terminal (3B) and the feedback resistor (11) of the first amplifier (1). ,
The current output type first D / A converter (6) for controlling the output voltage of the first amplifier (1) and the current flowing through the feedback resistor (12) of the second amplifier (2) are controlled,
A current output type second D / A converter (7) for controlling the output voltage of the second amplifier (2) and an input (6A) or a second D / A converter (6) of the first D / A converter (6). The input (7A) setting of the D / A converter (7) is controlled, and the voltage of the output terminal (3B) of the driver (3) is set to the voltage of the first input terminal (1A) or the third.
And a control means (8) for making the voltage of the input terminal (2A) of the IC tester equal.
増幅し、第２の入力端子(1B)と出力間に帰還抵抗(11)が
接続される第１の増幅器(1) と、 第３の入力端子(2A)に加えられた電圧を増幅し、第４の
入力端子(2B)と出力間に帰還抵抗(12)が接続される第２
の増幅器(2) と、 第１の増幅器(1) の出力が第５の入力端子(3C)に加えら
れ、第２の増幅器(2)の出力が第６の入力端子(3D)に加
えられ、第７の入力端子(3A)に正論理が加えられたと
き、第５の入力端子(3C)の電圧が出力端子(3B)に出力さ
れ、第７の入力端子(3A)に負論理が加えられたとき、第
６の入力端子(3D)の電圧が出力端子(3B)に出力されるド
ライバ(3) と、 第１の増幅器(1) の帰還抵抗(11)に流す電流を制御し、
第１の増幅器(1) の出力電圧を制御する電流出力型の第
１のＤ／Ａ変換器(6) と、 第２の増幅器(2) の帰還抵抗(12)に流す電流を制御し、
第２の増幅器(2) の出力電圧を制御する電流出力型の第
２のＤ／Ａ変換器(7) と、 第１のＤ／Ａ変換器(6) の入力(6A)又は第２のＤ／Ａ変
換器(7) の入力(7A)の設定を制御し、ドライバ(3) の出
力端子(3B)の電圧を第１の入力端子(1A)の電圧又は第３
の入力端子(2A)の電圧と等しくする制御手段(8) と、 オフセット誤差補正時の第１のＤ／Ａ変換器(6) の入力
(6A)と第２のＤ／Ａ変換器(7) の入力(7A)の最終設定値
(21)と、ゲイン誤差補正時の第１のＤ／Ａ変換器(6) の
入力(6A)と第２のＤ／Ａ変換器(7) の入力(7A)の最終設
定値(22)とを記憶する記憶装置(9) とを備えることを特
徴とするＩＣテスタ用ドライバの出力電圧補正回路。2. A first amplifier (1) for amplifying the voltage applied to the first input terminal (1A), and connecting a feedback resistor (11) between the second input terminal (1B) and the output. And a voltage applied to the third input terminal (2A) is amplified, and a feedback resistor (12) is connected between the fourth input terminal (2B) and the output.
And the output of the first amplifier (1) is applied to the fifth input terminal (3C) and the output of the second amplifier (2) is applied to the sixth input terminal (3D). , When positive logic is applied to the seventh input terminal (3A), the voltage of the fifth input terminal (3C) is output to the output terminal (3B) and negative logic is applied to the seventh input terminal (3A). When applied, it controls the current flowing through the driver (3) that outputs the voltage of the sixth input terminal (3D) to the output terminal (3B) and the feedback resistor (11) of the first amplifier (1). ,
The current output type first D / A converter (6) for controlling the output voltage of the first amplifier (1) and the current flowing through the feedback resistor (12) of the second amplifier (2) are controlled,
A current output type second D / A converter (7) for controlling the output voltage of the second amplifier (2) and an input (6A) or a second D / A converter (6) of the first D / A converter (6). The input (7A) setting of the D / A converter (7) is controlled, and the voltage of the output terminal (3B) of the driver (3) is set to the voltage of the first input terminal (1A) or the third.
Control means (8) for making the voltage of the input terminal (2A) of the first D / A converter (6) at the time of offset error correction
(6A) and the final set value of the input (7A) of the second D / A converter (7)
(21) and the final setting value (22) of the input (6A) of the first D / A converter (6) and the input (7A) of the second D / A converter (7) at the time of gain error correction An output voltage correction circuit for an IC tester driver, comprising: a storage device (9) for storing and.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3235768A JP2876844B2 (en) | 1991-08-23 | 1991-08-23 | Output voltage correction circuit for IC tester driver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3235768A JP2876844B2 (en) | 1991-08-23 | 1991-08-23 | Output voltage correction circuit for IC tester driver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0552908A true JPH0552908A (en) | 1993-03-02 |
| JP2876844B2 JP2876844B2 (en) | 1999-03-31 |
Family
ID=16990954
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3235768A Expired - Fee Related JP2876844B2 (en) | 1991-08-23 | 1991-08-23 | Output voltage correction circuit for IC tester driver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2876844B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000015990A1 (en) | 1998-09-16 | 2000-03-23 | Kabushiki Kaisha Saginomiya Seisakusho | Bellows type pressure responding valve |
-
1991
- 1991-08-23 JP JP3235768A patent/JP2876844B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000015990A1 (en) | 1998-09-16 | 2000-03-23 | Kabushiki Kaisha Saginomiya Seisakusho | Bellows type pressure responding valve |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2876844B2 (en) | 1999-03-31 |
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