SU1374257A1 - Device for modelling quasinegative resistance - Google Patents

Abstract

The invention relates to the element base of analog computing technology and is intended to simulate a quasi-negative resistance. The purpose of the invention is to expand the functionality of the device by providing the same input and output characteristics of each of its inputs. The goal is achieved by introducing into the devices a scaling resistor and an error amplifier. The circuit design of the device allowed us to provide the same input and output characteristics relative to its conclusions. Indeed, if the values of the first and second scaling resistors are equal, the input resistance across each of the two-pole terminals with respect to the external circuit is the same and is equal to Z. Moreover, both the first and second differential amplifiers are not overloaded regardless of the external circuit parameters, since the load is determined by the magnitude of the first and second scaling resistors. Both mismatch amplifiers are simultaneously from: scatter the input signals both on the first and on the second output of the proposed device, and the differential amplifiers have the same in: absolute value output voltages. 1 il. (L

Description

ate

113

The invention relates to the element base of analog computing technology and is intended to simulate a quasi-negative resistance, i.e. realizes a two-pole circuit having a given negative impedance with respect to the external circuit.

The purpose of the invention is to expand the functionality of the device by providing the same input and output characteristics of each of its inputs.

The drawing shows a diagram of a device for simulating a quasi-negative-tel resistance.

The device contains the first and second amplifiers 1 and 2 mismatches, the first and second real-time amplifiers 3 and 4, a resistor voltage divider made of series-connected resistors 5, 6 and 7, the first and second scaling, and resistors 8 and 9.

The device works as follows.

When connected to its first and second terminals of the external circuit from to

By tapping U and U, respectively (the input voltage Ug), the first 30 and second amplifiers 1 and 2 of the error matched their input voltages, respectively. By virtue of the properties of the opera, you have “.

to

where and

Used them

- output voltage of the amplifier;

K is its gain without feedback (-10 for serial amplifiers).

Thus, on the intermediate outputs of the divider are set on. Investigator — chains of justice and, and,

but for electric

and

LIVES following ratios:

E, -i, and, -i, Ei-U, U, -U2. f .. ------- Ш1И - ij (1)

(2)

Y2-E, g y; -i2 g R

or

.

 - R -.

where g is the resistance of resistors 5 and; R is the resistance of the resistor 6.

From relations (1) and (2), the difference in stresses, applied to the divisor is easily calculated.

E, -E, .r (), (3)

if, then

E, (and, s). (4)

If the voltage E, -E of the internal power source of such a two-port network is twice the value of the input voltage. and in phase with it, then this is equivalent to getting

amplifiers, in which there is a 35 negative resistance at the terminals of the device with respect to the external circuit.

The active elements of the device are invoked, and the total negative feedback is tuned in such a way that the difference in voltages and and, and decreases. Indeed, the output voltages of the error amplifiers 1 and 2 are summed and amplified by differential amplifiers 3 and 4. The output voltages E and E, j of the differential amplifiers are applied to the voltage divider, therefore, the voltages U and U, vary. on the intermediate findings of the divider. The change of this voltage is made by the active elements of the device until the voltage difference between the inverting and non-inverting inputs of each of the amplifiers 1 and 2 of the error is less than the voltage of the voltage, i.e. will actually be zero. Indeed, the voltage value of the voltage is determined by the following relationship:

5 negative resistance at pin

-ex

Where

,

Чх5

0

five

dah device relative to the external circuit.

Indeed, from Ohm’s law follows:

X y.-Ui- (),.

  z,

input circuit current; the impedances of the scaling resistors 8 and 9, and for the symmetry of the input and output characteristics relative to the outputs of the two-terminal network, usually Z Z.

Claims (1)

Invention Formula A device for simulating a quasi-negative impedance, comprising a first error amplifier, a first and second differential amplifiers, a resistor voltage divider, a scaling resistor, the output of the first differential amplifier connected to the first extreme to the output of the resistor voltage divider and through the first scaling resistor to the first information input of the device, which is different from the fact that, in order to expand the functionality of the device by providing simulation of the same input and output characteristics of each of its inputs scaling resistor, the second error amplifier, the output of which is connected to the inverting input of the first differential amplifier and to the non-inverting input of the second differential entsialnogo amplifier whose output is via a second scaling resistor connected to the second data input device and neinverti- The second terminal of the resistor voltage divider is connected to the output of the second differential amplifier; the second intermediate terminal of the resistor voltage divider is connected to the inverting voltage of the second error amplifier, the inverting input of which is connected to the first interconnect of the resistor voltage divider. the input of the first error amplifier, the output of which is connected to the non-inverting input of the first differential amplifier and to the inverting input of the second differential A non-inverted amplifier, the input of the first error amplifier is connected to the first information input of the device. S