JPH05509441A - マイクロチップの処理 - Google Patents
マイクロチップの処理Info
- Publication number
- JPH05509441A JPH05509441A JP3512357A JP51235791A JPH05509441A JP H05509441 A JPH05509441 A JP H05509441A JP 3512357 A JP3512357 A JP 3512357A JP 51235791 A JP51235791 A JP 51235791A JP H05509441 A JPH05509441 A JP H05509441A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- insulating layer
- hole
- drilling
- conductive material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01032—Germanium [Ge]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01044—Ruthenium [Ru]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01049—Indium [In]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01077—Iridium [Ir]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12033—Gunn diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/94—Laser ablative material removal
Abstract
Description
Claims (23)
- (1)面から面への使用となるデバイスの電気的コタンクトの適合するアレイに 対して、デバイスの導電結合側か電気的導電材料が形成される集積半導体チップ を提供する方法であって、(a)デバイスの表面に少なくとも5マイクロメータ 厚さで固着する電気的絶縁層を形成するが、結合側と導通させるために、その絶 縁層には一つまたはより多くの穴を持たせ、(b)結合側と電気的導通を確立す るために穴内に電気的導電材料を配し、そして(c)導電材料が実質的に上記穴 内のみに位置するよう、堆積された導電材料を絶縁層のメイン表面から排除また はもし必要ならば取り除く方法。
- (2)穴内に配された導電材料を少なくとも部分的に露呈するたわに、絶縁層の 一部またはすべてを除去するステップを含む請求の範囲第1項記載の方法。
- (3)上記穴を作るために絶縁層に穴をあけるステップを含み、前記穴あけは、 好ましくは励起レーザであるUV切除により、好ましくは少なくとも部分的に行 われる請求の範囲第1項または第2項記載の方法。
- (4)指示層が上記絶縁層およびデバイスの表面に備えられ、該指示層は、第1 の穴あけ動作により直接に作用した時、この第1の穴あけが加減されるか、もし くはより緩やかな第2の穴あけ動作に移行できる、検知可能な指示を呈する請求 の範囲第3項記載の方法。
- (5)第1の穴あけ動作は、UVレーザ切除であり、その切除は上記指示の検出 により終了する請求の範囲第4項記載の方法。
- (6)第2の穴あけ動作は、化学エッチングであり、指示層を通して下層の結合 側への穴あけが行われる請求の範囲第4項または第5項に記載の方法。
- (7)好ましくは引き延ばしまたはスプーコーテイン穴より指示層を形成するス テップを含む請求の範囲第4項ないし第6項のいずれかに記載の方法。
- (8)指示層がフッ素ポリマーを含む請求の範囲第4項ないし第7項のいずれか に記載の方法。
- (9)好ましくは引き延ばしまたはスプレーコーティングにより絶縁層を形成す るステップを含む請求の範囲第1項ないし第8項のいずれかに記載の方法。
- (10)絶縁層が有機重合材料好ましくはポリイミドを含む請求の範囲第1項な いし第9項のいずれかに記載の方法。
- (11)絶縁層が有機材料好ましくは蛍光体ガラスを含む請求の範囲第1項ない し第9項のいずれかに記載の方法。
- (12)除去可能な層が絶縁層上に形成され、前記両層には貫通する穴を持って おり、そして前記除去可能な層が、穴内に配された導電材料の一端を露出するた めに除去される請求の範囲第1項ないし第11項のいずれかに記載の方法。
- (13)除去可能な層は、有機重合材料、好ましくはアモルファスポリイミドで ある請求の範囲第12項に記載の方法。
- (14)堆積動作は、穴内に電気的導電材料を円筒状に形成する請求の範囲第1 項ないし第13項のいずれかに記載の方法。
- (15)上記穴は、5ないし200マイクロメータ、好ましくは10ないし10 0マイクロメータである請求の範囲第1項ないしは第14項のいずれかに記載の 方法。
- (16)デバイスの上記表面上の層の合計厚さは、10ないし250好ましくは 20ないし100、より好ましくは25ないし50マイクロメータである請求の 範囲第1項ないし第15項のいずれかに記載の方法。
- (17)堆積動作は、金属好ましくはクロム、その後に銅による、スパツタリン グ、エバポレーシヨンまたはイオンプレーティングを含み、引き続き、金属(も しいずれか)が絶縁層または他の層のメイン表面から除去する請求の範囲第1項 ないし第16項のいずれかに記載の方法。
- (18)堆積動作は、穴内の表面への、電気を用いない金属好ましくはニッケル のプレーティングを含み、引き続き、絶縁層または他の層のメイン表面に電気を 用いずに形成された金属の除去が行われる請求の範囲第1項ないし第17項のい ずれかに記載の方法。
- (19)堆積動作の後に、半田の処理、好ましくはシャドウマスクを通したエバ ポレーションが穴内へおよび/穴内の金属上になされる請求の範囲第1項ないし 第18項のいずれかに記載の方法。
- (20)適用された半田がその後、流出される請求の範囲第19項記載の方法。
- (21)請求の範囲第1項ないし第19項のいずれかの方法により、結合側のー つまたはより多くに、電気的導電材料が形成された、集積回路半導体デバイス、 好ましくはチップ。
- (22)表面に請求の範囲第4項ないし第8項のいずれかに記載の粘着性指示層 を有する集積回路半導体デバイス、好ましくはチップ。
- (23)指示層が固着された絶縁層、好ましくは請求の範囲第10項ないし第1 3項のいずれかに記載の物は、該絶縁層を覆う別の除去可能な層を備えるか備え ない請求の範囲第22項記載のデバイス。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9015820,5 | 1990-07-18 | ||
GB909015820A GB9015820D0 (en) | 1990-07-18 | 1990-07-18 | Processing microchips |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05509441A true JPH05509441A (ja) | 1993-12-22 |
JP3091222B2 JP3091222B2 (ja) | 2000-09-25 |
Family
ID=10679291
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP03512357A Expired - Lifetime JP3091222B2 (ja) | 1990-07-18 | 1991-07-16 | マイクロチップの処理 |
Country Status (8)
Country | Link |
---|---|
US (1) | US5411918A (ja) |
EP (1) | EP0539481B1 (ja) |
JP (1) | JP3091222B2 (ja) |
AT (1) | ATE171813T1 (ja) |
CA (1) | CA2087429A1 (ja) |
DE (1) | DE69130290T2 (ja) |
GB (1) | GB9015820D0 (ja) |
WO (1) | WO1992002038A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003023025A (ja) * | 2001-07-10 | 2003-01-24 | Fujitsu Ltd | 電気的相互接続方法 |
JP2011197263A (ja) * | 2010-03-18 | 2011-10-06 | Ricoh Co Ltd | トナー担持体、現像装置及び画像形成装置 |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4228274C2 (de) * | 1992-08-26 | 1996-02-29 | Siemens Ag | Verfahren zur Kontaktierung von auf einem Träger angeordneten elektronischen oder optoelektronischen Bauelementen |
US5843363A (en) * | 1995-03-31 | 1998-12-01 | Siemens Aktiengesellschaft | Ablation patterning of multi-layered structures |
US5587342A (en) * | 1995-04-03 | 1996-12-24 | Motorola, Inc. | Method of forming an electrical interconnect |
GB2307785B (en) * | 1995-11-29 | 1998-04-29 | Simage Oy | Forming contacts on semiconductor substrates for radiation detectors and imaging devices |
US6809421B1 (en) * | 1996-12-02 | 2004-10-26 | Kabushiki Kaisha Toshiba | Multichip semiconductor device, chip therefor and method of formation thereof |
US5874369A (en) * | 1996-12-05 | 1999-02-23 | International Business Machines Corporation | Method for forming vias in a dielectric film |
US6008070A (en) | 1998-05-21 | 1999-12-28 | Micron Technology, Inc. | Wafer level fabrication and assembly of chip scale packages |
US6627998B1 (en) * | 2000-07-27 | 2003-09-30 | International Business Machines Corporation | Wafer scale thin film package |
US6521485B2 (en) * | 2001-01-17 | 2003-02-18 | Walsin Advanced Electronics Ltd | Method for manufacturing wafer level chip size package |
AU2002242927A1 (en) * | 2001-03-22 | 2002-10-08 | Xsil Technology Limited | A laser machining system and method |
TW533188B (en) | 2001-07-20 | 2003-05-21 | Getters Spa | Support for microelectronic, microoptoelectronic or micromechanical devices |
US7361171B2 (en) | 2003-05-20 | 2008-04-22 | Raydiance, Inc. | Man-portable optical ablation system |
US8173929B1 (en) | 2003-08-11 | 2012-05-08 | Raydiance, Inc. | Methods and systems for trimming circuits |
US8921733B2 (en) | 2003-08-11 | 2014-12-30 | Raydiance, Inc. | Methods and systems for trimming circuits |
US9022037B2 (en) | 2003-08-11 | 2015-05-05 | Raydiance, Inc. | Laser ablation method and apparatus having a feedback loop and control unit |
US7115514B2 (en) * | 2003-10-02 | 2006-10-03 | Raydiance, Inc. | Semiconductor manufacturing using optical ablation |
US20050167405A1 (en) * | 2003-08-11 | 2005-08-04 | Richard Stoltz | Optical ablation using material composition analysis |
US20050253245A1 (en) * | 2004-05-12 | 2005-11-17 | Mark Lynch | Package design and method for electrically connecting die to package |
US7575999B2 (en) * | 2004-09-01 | 2009-08-18 | Micron Technology, Inc. | Method for creating conductive elements for semiconductor device structures using laser ablation processes and methods of fabricating semiconductor device assemblies |
US9929080B2 (en) * | 2004-11-15 | 2018-03-27 | Intel Corporation | Forming a stress compensation layer and structures formed thereby |
US8135050B1 (en) | 2005-07-19 | 2012-03-13 | Raydiance, Inc. | Automated polarization correction |
US8232687B2 (en) | 2006-04-26 | 2012-07-31 | Raydiance, Inc. | Intelligent laser interlock system |
US8189971B1 (en) | 2006-01-23 | 2012-05-29 | Raydiance, Inc. | Dispersion compensation in a chirped pulse amplification system |
US7444049B1 (en) | 2006-01-23 | 2008-10-28 | Raydiance, Inc. | Pulse stretcher and compressor including a multi-pass Bragg grating |
TWI293499B (en) * | 2006-01-25 | 2008-02-11 | Advanced Semiconductor Eng | Three dimensional package and method of making the same |
TWI287273B (en) * | 2006-01-25 | 2007-09-21 | Advanced Semiconductor Eng | Three dimensional package and method of making the same |
US7822347B1 (en) | 2006-03-28 | 2010-10-26 | Raydiance, Inc. | Active tuning of temporal dispersion in an ultrashort pulse laser system |
US10493559B2 (en) | 2008-07-09 | 2019-12-03 | Fei Company | Method and apparatus for laser machining |
US8125704B2 (en) | 2008-08-18 | 2012-02-28 | Raydiance, Inc. | Systems and methods for controlling a pulsed laser by combining laser signals |
EP2200412A1 (en) | 2008-12-17 | 2010-06-23 | Nederlandse Organisatie voor toegepast-natuurwetenschappelijk Onderzoek TNO | Flexible electronic product and method for manufacturing the same |
KR101023296B1 (ko) * | 2009-11-09 | 2011-03-18 | 삼성전기주식회사 | 포스트 범프 형성방법 |
WO2012021748A1 (en) | 2010-08-12 | 2012-02-16 | Raydiance, Inc. | Polymer tubing laser micromachining |
KR20140018183A (ko) | 2010-09-16 | 2014-02-12 | 레이디안스, 아이엔씨. | 적층 재료의 레이저 기반 처리 |
US9070851B2 (en) | 2010-09-24 | 2015-06-30 | Seoul Semiconductor Co., Ltd. | Wafer-level light emitting diode package and method of fabricating the same |
US9245828B2 (en) | 2012-07-11 | 2016-01-26 | Mindspeed Technologies, Inc. | High speed signal conditioning package |
US9433083B2 (en) | 2014-04-04 | 2016-08-30 | Macom Technology Solutions Holdings, Inc. | Edge mount connector arrangement with improved characteristic impedance |
CN205944139U (zh) | 2016-03-30 | 2017-02-08 | 首尔伟傲世有限公司 | 紫外线发光二极管封装件以及包含此的发光二极管模块 |
CN111508926B (zh) | 2019-01-31 | 2022-08-30 | 奥特斯(中国)有限公司 | 一种部件承载件以及制造部件承载件的方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3893156A (en) * | 1973-06-29 | 1975-07-01 | Ibm | Novel beam lead integrated circuit structure and method for making the same including automatic registration of beam leads with corresponding dielectric substrate leads |
US4398993A (en) * | 1982-06-28 | 1983-08-16 | International Business Machines Corporation | Neutralizing chloride ions in via holes in multilayer printed circuit boards |
US4417948A (en) * | 1982-07-09 | 1983-11-29 | International Business Machines Corporation | Self developing, photoetching of polyesters by far UV radiation |
JPS6130059A (ja) * | 1984-07-20 | 1986-02-12 | Nec Corp | 半導体装置の製造方法 |
US4824802A (en) * | 1986-02-28 | 1989-04-25 | General Electric Company | Method of filling interlevel dielectric via or contact holes in multilevel VLSI metallization structures |
US4764484A (en) * | 1987-10-08 | 1988-08-16 | Standard Microsystems Corporation | Method for fabricating self-aligned, conformal metallization of semiconductor wafer |
JP2633586B2 (ja) * | 1987-10-21 | 1997-07-23 | 株式会社東芝 | バンプ構造を有する半導体装置 |
FR2630588A1 (fr) * | 1988-04-22 | 1989-10-27 | Philips Nv | Procede pour realiser une configuration d'interconnexion sur un dispositif semiconducteur notamment un circuit a densite d'integration elevee |
US4861425A (en) * | 1988-08-22 | 1989-08-29 | International Business Machines Corporation | Lift-off process for terminal metals |
JPH0279437A (ja) * | 1988-09-14 | 1990-03-20 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
DE68914080T2 (de) * | 1988-10-03 | 1994-10-20 | Ibm | Kontaktständerstruktur für Halbleitervorrichtungen. |
-
1990
- 1990-07-18 GB GB909015820A patent/GB9015820D0/en active Pending
-
1991
- 1991-07-16 DE DE69130290T patent/DE69130290T2/de not_active Expired - Lifetime
- 1991-07-16 US US07/966,066 patent/US5411918A/en not_active Expired - Lifetime
- 1991-07-16 AT AT91913589T patent/ATE171813T1/de not_active IP Right Cessation
- 1991-07-16 CA CA002087429A patent/CA2087429A1/en not_active Abandoned
- 1991-07-16 JP JP03512357A patent/JP3091222B2/ja not_active Expired - Lifetime
- 1991-07-16 WO PCT/GB1991/001172 patent/WO1992002038A1/en active IP Right Grant
- 1991-07-16 EP EP91913589A patent/EP0539481B1/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003023025A (ja) * | 2001-07-10 | 2003-01-24 | Fujitsu Ltd | 電気的相互接続方法 |
JP4672199B2 (ja) * | 2001-07-10 | 2011-04-20 | 富士通株式会社 | 電気的相互接続方法 |
JP2011197263A (ja) * | 2010-03-18 | 2011-10-06 | Ricoh Co Ltd | トナー担持体、現像装置及び画像形成装置 |
Also Published As
Publication number | Publication date |
---|---|
EP0539481B1 (en) | 1998-09-30 |
DE69130290D1 (de) | 1998-11-05 |
GB9015820D0 (en) | 1990-09-05 |
JP3091222B2 (ja) | 2000-09-25 |
DE69130290T2 (de) | 1999-06-02 |
EP0539481A1 (en) | 1993-05-05 |
CA2087429A1 (en) | 1992-01-19 |
WO1992002038A1 (en) | 1992-02-06 |
US5411918A (en) | 1995-05-02 |
ATE171813T1 (de) | 1998-10-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH05509441A (ja) | マイクロチップの処理 | |
US6183588B1 (en) | Process for transferring a thin-film structure to a substrate | |
US9837372B1 (en) | Wafer-level die to package and die to die interconnects suspended over integrated heat sinks | |
US5393697A (en) | Composite bump structure and methods of fabrication | |
US6426545B1 (en) | Integrated circuit structures and methods employing a low modulus high elongation photodielectric | |
Christiaens et al. | UTCP: A novel polyimide-based ultra-thin chip packaging technology | |
US6084301A (en) | Composite bump structures | |
JP3200000B2 (ja) | 導電性相互接続形成方法及びフリップチップ−基板組立体 | |
US5534466A (en) | Method of making area direct transfer multilayer thin film structure | |
JP5729932B2 (ja) | 基板貫通孔内への金属充填方法 | |
JP2003115504A (ja) | 半導体チップ表面のプラズマ・コンディショニングによる接着方法 | |
US6543674B2 (en) | Multilayer interconnection and method | |
US7340826B2 (en) | Method for producing an electronic device connected to a printed circuit board | |
TW200407061A (en) | Process for creating vias for circuit assemblies | |
TW201021102A (en) | Coreless substrate package with symmetric external dielectric layers | |
US5678287A (en) | Uses of uniaxially electrically conductive articles | |
TW201232683A (en) | Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices | |
US5637925A (en) | Uses of uniaxially electrically conductive articles | |
TW201242073A (en) | Flexible light emitting semiconductor device having thin dielectric substrate | |
Govaerts et al. | Fabrication processes for embedding thin chips in flat flexible substrates | |
Wang et al. | Laser-assisted bumping for flip chip assembly | |
CA1321659C (en) | Uses of uniaxially electrically conductive articles | |
US7174631B2 (en) | Method of fabricating electrical connection terminal of embedded chip | |
JP2005191255A (ja) | 回路基板およびその製造方法 | |
JP2002252258A (ja) | コンタクト部品及び多層配線基板の製造方法、並びにウエハ一括コンタクトボード |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080721 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090721 Year of fee payment: 9 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100721 Year of fee payment: 10 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110721 Year of fee payment: 11 |
|
EXPY | Cancellation because of completion of term |