JPH0550155B2 - - Google Patents

Info

Publication number
JPH0550155B2
JPH0550155B2 JP12819582A JP12819582A JPH0550155B2 JP H0550155 B2 JPH0550155 B2 JP H0550155B2 JP 12819582 A JP12819582 A JP 12819582A JP 12819582 A JP12819582 A JP 12819582A JP H0550155 B2 JPH0550155 B2 JP H0550155B2
Authority
JP
Japan
Prior art keywords
impurity concentration
layer
melt
type layer
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP12819582A
Other languages
Japanese (ja)
Other versions
JPS5918687A (en
Inventor
Kentaro Inoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP57128195A priority Critical patent/JPS5918687A/en
Publication of JPS5918687A publication Critical patent/JPS5918687A/en
Publication of JPH0550155B2 publication Critical patent/JPH0550155B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds

Description

【発明の詳細な説明】 本発明は結晶性を改善しかつn層の不純物濃度
を低下させる事によつて発光効率を向上させたガ
リウム燐発光ダイオードの製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a gallium phosphorous light emitting diode in which luminous efficiency is improved by improving crystallinity and lowering the impurity concentration of the n-layer.

一般にガリウム燐を用いた発光ダイオードにお
いては、結晶性の良否の判定の目安に転位密度が
用いられ、緑色発光の場合転位密度が1×105cm
-2以下であれば発光効率を良好ならしめる結晶と
いわれている。ところが上記数値は実験室レベル
での事であつて、量産用においては引上げインゴ
ツト内で場所によつて転位密度が一定でない為転
位密度による結晶性の制御が困難である。この為
従来はエピタキシヤル成長層の結晶性が良い事を
利用して引上げ後スライスして得た基板上に一定
厚み以上の同導電型のエピタキシヤル成長層を形
成し、その後Pn接合を形成していた。この方法
では確かにPn接合近傍での結晶性は改善される
が基板の影響が成長層に移るか又は基板と成長層
とで格子不整合が生じて発光効率は0.2%止まり
となつていた。
Generally, in light-emitting diodes using gallium phosphorus, dislocation density is used as a guideline for determining the quality of crystallinity, and in the case of green light emission, the dislocation density is 1
If it is less than -2 , it is said to be a crystal that provides good luminous efficiency. However, the above values are based on a laboratory level, and for mass production, it is difficult to control crystallinity by dislocation density because the dislocation density is not constant depending on the location within the pulled ingot. For this reason, conventionally, an epitaxial growth layer of the same conductivity type with a certain thickness or more is formed on a substrate obtained by pulling and slicing, taking advantage of the good crystallinity of the epitaxial growth layer, and then forming a Pn junction. was. Although this method certainly improves the crystallinity near the Pn junction, the influence of the substrate transfers to the grown layer, or lattice mismatch occurs between the substrate and the grown layer, resulting in a luminous efficiency of no more than 0.2%.

一方同様なガリウム燐の緑色発光ダイオードに
おいてシリコンを不純物として用いるとよい事が
報じられている。例えば特開昭56−85879号公報
によると第1図aのような温度工程図において、
エピタキシヤル開始直前に、予じめボートに塗布
しておいたSiCからSiを融液中に溶解させて、n
型成長をさせ、P型成長直前にアンモニアガスを
導入すると、第2図bに示すような発光ダイオー
ドにおいてPn接合26近傍のn層24はSiがド
ープされ不純物濃度が5〜10×1017cm-3、P層2
5はSiが除去されかわりにCがドープされて0.5
〜10×1016cm-3がよいとしている。この公報に発
光効率が明示してないがPn接合近傍にSiがある
と寿命が著しく減少するのみでなく発光効率自体
も低下する事が確認された。
On the other hand, it has been reported that it is advantageous to use silicon as an impurity in a similar gallium phosphide green light emitting diode. For example, according to Japanese Patent Application Laid-Open No. 56-85879, in a temperature process diagram as shown in Figure 1a,
Immediately before the start of epitaxial production, Si is dissolved in the melt from SiC that has been applied to the boat in advance, and n
When the type is grown and ammonia gas is introduced just before the P type growth, the n layer 24 near the Pn junction 26 in the light emitting diode shown in FIG . -3 , P layer 2
5 is 0.5 when Si is removed and C is doped instead.
~10×10 16 cm -3 is considered good. Although the luminous efficiency is not explicitly stated in this publication, it was confirmed that the presence of Si near the Pn junction not only significantly reduces the lifetime but also reduces the luminous efficiency itself.

本発明は上述の点を考慮してなされたもので、
ガリウム燐の基板上にSiをドープした層を成長さ
せ、続いてSiを除去した層をそれぞれ同導電型の
まま成長させる事で結晶の連続性(整合)と改善
を行ない、発光効率と寿命を著しく向上させたも
ので、以下実施例に基づいて本発明を詳細に説明
する。
The present invention has been made in consideration of the above points, and
By growing a Si-doped layer on a gallium phosphide substrate, and then growing a layer from which Si has been removed while maintaining the same conductivity type, we can improve the continuity (matching) of the crystal and improve luminous efficiency and lifetime. This invention has been significantly improved, and the present invention will be explained in detail below based on Examples.

第2図は本発明実施例のガリウム燐緑色発光ダ
イオードの液相エピタキシヤル成長の温度工程図
で、第3図はそれによつて形成された緑色発光ダ
イオードの不純物濃度分布図である。
FIG. 2 is a temperature process diagram of liquid phase epitaxial growth of a gallium phosphorous green light emitting diode according to an embodiment of the present invention, and FIG. 3 is a diagram of impurity concentration distribution of the green light emitting diode formed thereby.

まずGaのメルトにGaP多結晶、n型不純物を
混入してつくつた融液と半導体基板を分離させて
昇温する。約1030℃でしばらく保持した後、時点
Aで半導体基板上に融液を配置して基板表面をぬ
らす。その後1分あたり2乃至3.5℃で降温して
エピタキシヤル成長を行なうが、基板ボートを板
状にするなどして融液厚みを2、1乃至2.8mmと
し、しかも上方をすのこ状の蓋等にすることで融
液が雰囲気と接しているのが好ましい。尚融液厚
みが上述の如く薄いと成長厚みが薄くなる傾向が
あるが、Pn接合を基板から遠ざけると寿命が長
くなるので、メルト中に入れるGaP多結晶を4.0
重量パーセント以上と飽和状態にしておくと成長
量を短時間で増大する事ができる。
First, GaP polycrystals and n-type impurities are mixed into the Ga melt, and the semiconductor substrate is separated from the melt and heated. After being maintained at approximately 1030° C. for a while, the melt is placed on the semiconductor substrate at time A to wet the surface of the substrate. After that, epitaxial growth is performed by lowering the temperature at a rate of 2 to 3.5°C per minute. It is preferable that the melt be brought into contact with the atmosphere. Note that if the melt thickness is thin as mentioned above, the growth thickness tends to be thinner, but if the Pn junction is moved away from the substrate, the life will be longer, so the GaP polycrystalline placed in the melt should be
By keeping the weight percent or more in a saturated state, the amount of growth can be increased in a short time.

まずエピタキシヤル成長に先立ち微量のシリコ
ンをメルト中に付加すると共に降温前時点Bにお
いて硫化水素ガスを5.0c.c./minと高濃度に短時
間雰囲気中に流し、融液の不純物濃度を高める。
そして低速度で降温して基板の不純物濃度(1〜
3×1017cm-31より高い5〜8×1017cm-3の濃度
2のn層成長12を行なう。その後エピタキシヤ
ル成長の休止時間を45分乃至120分ずつもたせな
がらn層成長13を行ない最後にアンモニアガス
雰囲気の中Cでn層成長14を行なう。アンモニ
アガスは雰囲気ガスに対し体積比で0.4%程度で
よい。休止時間(即ち定温保持時間)を設ける事
で結晶内の転位密度が低くなるが同時に融液中の
不純物濃度も低下するので順次低不純物濃度のn
層が得られる。そして特に最後のn層成長14で
はアンモニアガスと融液中のSiが反応してSi3N4
等の析出を行ない、実質的に融液中のSiが1/4乃
至1/10に除去できるので、窒素は含まれるが1016
cm-3程度の極めて低不純物濃度4のn層が形成さ
れる。尚アンモニアガスの導入のかわりに0.1乃
至1.0重量%のGaNを1000℃以上の融液に落下混
入しても窒化硅素を析出させてSi濃度を低減でき
る。
First, prior to epitaxial growth, a small amount of silicon is added to the melt, and at time B before the temperature is lowered, hydrogen sulfide gas is flowed into the atmosphere at a high concentration of 5.0 cc/min for a short time to increase the impurity concentration of the melt.
Then, the temperature is lowered at a low rate to reduce the impurity concentration of the substrate (1~
An n-layer growth 12 is performed with a concentration 2 of 5 to 8× 10 17 cm −3 higher than 3×10 17 cm −3 1. Thereafter, n-layer growth 13 is performed while epitaxial growth is paused for 45 minutes to 120 minutes, and finally n-layer growth 14 is performed in carbon in an ammonia gas atmosphere. The amount of ammonia gas may be about 0.4% by volume relative to the atmospheric gas. Providing a rest time (i.e., constant temperature holding time) lowers the dislocation density in the crystal, but at the same time, the impurity concentration in the melt also decreases, so the n
You get layers. In particular, in the final n-layer growth 14, ammonia gas and Si in the melt react to form Si 3 N 4
1/4 to 1/10 of the Si in the melt can be removed, so although nitrogen is included, 10 16
An n layer with an extremely low impurity concentration of about 4 cm -3 is formed. Incidentally, instead of introducing ammonia gas, if 0.1 to 1.0% by weight of GaN is dropped and mixed into the melt at 1000°C or higher, silicon nitride can be precipitated and the Si concentration can be reduced.

その後時点Dで融液に亜鉛を導入してP成長1
5を行なう。このようなP層は0.8〜1.7×1018cm
-3の高不純物濃度5で制御できるが、あまり高濃
度にすると結晶性がくずれ、光吸収等を生じるの
で好ましくない。
After that, at time D, zinc is introduced into the melt and P grows 1.
Do step 5. Such a P layer is 0.8-1.7× 10 cm
Although it can be controlled with a high impurity concentration of -3 , 5, it is not preferable to make the concentration too high because the crystallinity deteriorates and light absorption occurs.

通常上述の如くPn接合6で1018cm-3から1016cm
-3までの濃度差があると寿命が短かかつたりスイ
ツチング動作を起こすが、上述の如く結晶性(特
に濃度差のある部分の格子整合や転位密度)を整
えながら複数のn層を形成する事と、Pn接合近
傍のSi不純物を窒化硅素の形で除去して実質的に
1016cm-3以下に低減させた事で、スイツチング動
作は生じない。また電流分布もよくなるので、従
来(0.2%)よりはるかに高い0.45%(平均)の
発光効率を得る事ができ、さらに80%輝度低下に
1500時間以上(高温大電流による過負荷試験)と
いう長寿命な素子が得られた。
Usually 10 18 cm -3 to 10 16 cm at Pn junction 6 as mentioned above
If there is a concentration difference of up to -3 , the lifetime will be short and switching operation will occur, but as mentioned above, multiple n-layers are formed while adjusting the crystallinity (especially the lattice matching and dislocation density in the area where there is a concentration difference). In addition, by removing Si impurities near the Pn junction in the form of silicon nitride,
By reducing it to 10 16 cm -3 or less, no switching action occurs. Also, because the current distribution is improved, it is possible to obtain a luminous efficiency of 0.45% (average), which is much higher than the conventional method (0.2%), and a further 80% reduction in brightness.
A device with a long life of over 1,500 hours (overload test using high temperature and large current) was obtained.

以上の如く本発明は、n型ガリウム燐基板に融
液を接触さもてn型層をエピタキシヤル成長させ
る第1の工程と、その融液と窒素化合物を接触さ
せて窒化硅素を析出させる第2の工程と、再びn
型層をエピタキシヤル成長させる第3の工程と、
P型層を形成する第4の工程とを具備しているの
で、Pn接合附近のn層濃度を充分低く出来発光
効率のよい発光ダイオードを得る事ができた。
As described above, the present invention comprises a first step of epitaxially growing an n-type layer by bringing a melt into contact with an n-type gallium phosphorous substrate, and a second step of bringing the melt into contact with a nitrogen compound to precipitate silicon nitride. process and again n
a third step of epitaxially growing a mold layer;
Since the present invention includes the fourth step of forming a P-type layer, the n-layer concentration near the Pn junction can be made sufficiently low, and a light-emitting diode with good luminous efficiency can be obtained.

上述の様に、基板より不純物濃度の高い高不純
物濃度層を含めて、階段状に3段階に順次不純物
濃度が低くなる3層からなるn型層を形成するの
で結晶性が向上する。その結果、高発光効率の長
寿命が得られる。更に本発明は固相の窒素化合物
と融液を接触させるので、GaN等の固相の窒素
化合物を用いると、取扱い易く重量制御し易い。
この様に固相の窒素化合物を融液と接触させる事
により、上述の利点を有する製造方法を実施でき
る。
As described above, the crystallinity is improved by forming an n-type layer consisting of three layers, including a high impurity concentration layer having a higher impurity concentration than the substrate, with the impurity concentration decreasing in three stepwise steps. As a result, high luminous efficiency and long life can be obtained. Furthermore, in the present invention, a solid phase nitrogen compound is brought into contact with the melt, so if a solid phase nitrogen compound such as GaN is used, it is easy to handle and control the weight.
By bringing the solid phase nitrogen compound into contact with the melt in this manner, the production method having the above-mentioned advantages can be carried out.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の発光ダイオードの温度工程図a
と素子の模式図b、第2図は本発明実施例のガリ
ウム燐緑色発光ダイオードの液相エピタキシヤル
成長の温度工程図で、第3図はそれによつて形成
された緑色発光ダイオードの不純物濃度分布図で
ある。 12,13,14……n層成長、15……P層
成長。
Figure 1 is a temperature process diagram of a conventional light emitting diode.
FIG. 2 is a temperature process diagram of liquid phase epitaxial growth of a gallium phosphorous green light emitting diode according to an example of the present invention, and FIG. 3 is a diagram showing the impurity concentration distribution of the green light emitting diode formed thereby. It is a diagram. 12, 13, 14...N layer growth, 15...P layer growth.

Claims (1)

【特許請求の範囲】[Claims] 1 n型ガリウム燐基板に融液を接触させてその
基板より不純物濃度の高いn型層とそのn型層よ
り不純物濃度の低いn型層を順次エピタキシヤル
成長させる第1の工程と、その融液と固相の窒素
化合物を接触させて窒化硅素を析出させる第2の
工程と、再び不純物濃度の最も低いn型層をエピ
タキシヤル成長させ、不純物濃度が階段状に順次
低くなる様に形成させる第3の工程と、P型層を
形成する第4の工程とを具備した事を特徴とする
ガリウム燐発光ダイオードの製造方法。
1. A first step of epitaxially growing an n-type layer with a higher impurity concentration than that substrate and an n-type layer with a lower impurity concentration than that n-type layer by contacting a melt with an n-type gallium phosphorus substrate, and The second step is to bring the liquid into contact with a solid nitrogen compound to precipitate silicon nitride, and again epitaxially grow the n-type layer with the lowest impurity concentration, forming it so that the impurity concentration decreases step by step. A method for manufacturing a gallium phosphorous light emitting diode, comprising a third step and a fourth step of forming a P-type layer.
JP57128195A 1982-07-21 1982-07-21 Manufacture of gallium phosphide light emitting diode Granted JPS5918687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57128195A JPS5918687A (en) 1982-07-21 1982-07-21 Manufacture of gallium phosphide light emitting diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57128195A JPS5918687A (en) 1982-07-21 1982-07-21 Manufacture of gallium phosphide light emitting diode

Publications (2)

Publication Number Publication Date
JPS5918687A JPS5918687A (en) 1984-01-31
JPH0550155B2 true JPH0550155B2 (en) 1993-07-28

Family

ID=14978801

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57128195A Granted JPS5918687A (en) 1982-07-21 1982-07-21 Manufacture of gallium phosphide light emitting diode

Country Status (1)

Country Link
JP (1) JPS5918687A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5453975A (en) * 1977-10-07 1979-04-27 Toshiba Corp Manufacture for gallium phosphide green light emitting element
JPS5453976A (en) * 1977-10-07 1979-04-27 Toshiba Corp Gallium phosphide green light emitting element
JPS5661182A (en) * 1979-10-24 1981-05-26 Toshiba Corp Gap green light-emitting element

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5453975A (en) * 1977-10-07 1979-04-27 Toshiba Corp Manufacture for gallium phosphide green light emitting element
JPS5453976A (en) * 1977-10-07 1979-04-27 Toshiba Corp Gallium phosphide green light emitting element
JPS5661182A (en) * 1979-10-24 1981-05-26 Toshiba Corp Gap green light-emitting element

Also Published As

Publication number Publication date
JPS5918687A (en) 1984-01-31

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