JPH054838B2 - - Google Patents
Info
- Publication number
- JPH054838B2 JPH054838B2 JP28198287A JP28198287A JPH054838B2 JP H054838 B2 JPH054838 B2 JP H054838B2 JP 28198287 A JP28198287 A JP 28198287A JP 28198287 A JP28198287 A JP 28198287A JP H054838 B2 JPH054838 B2 JP H054838B2
- Authority
- JP
- Japan
- Prior art keywords
- resist layer
- substrate material
- etching resist
- pattern
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000463 material Substances 0.000 claims description 34
- 238000000034 method Methods 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 24
- 238000005530 etching Methods 0.000 claims description 23
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 229920003002 synthetic resin Polymers 0.000 claims description 10
- 239000000057 synthetic resin Substances 0.000 claims description 10
- 239000004020 conductor Substances 0.000 claims description 9
- 238000005553 drilling Methods 0.000 claims description 8
- 238000002844 melting Methods 0.000 claims description 7
- 230000008018 melting Effects 0.000 claims description 7
- 239000010410 layer Substances 0.000 description 24
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 20
- 229910052802 copper Inorganic materials 0.000 description 17
- 239000010949 copper Substances 0.000 description 17
- 239000012943 hotmelt Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 5
- 239000011347 resin Substances 0.000 description 5
- 238000007747 plating Methods 0.000 description 4
- 238000003825 pressing Methods 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 238000004080 punching Methods 0.000 description 3
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000011247 coating layer Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007731 hot pressing Methods 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000002650 laminated plastic Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はプリント基板の製造方法に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a printed circuit board.
プリント基板のパターン形成方法としては、サ
ブトラクテイブ法やアデイテイブ法が公知であ
る。
As methods for forming patterns on printed circuit boards, subtractive methods and additive methods are known.
サブトラクテイブ法は、樹脂積層板の表面(片
面又は両面)に薄い銅箔を張付けた銅張積層板を
使用し、導体パターン部以外の不要銅箔部分を薬
品で溶解、除去して導体パターンを形成する方法
であり、スルーホールメツキ部は、無電解銅メツ
キを薄く付けた上に電気メツキを厚く付けて形成
している。 The subtractive method uses a copper-clad laminate with a thin copper foil pasted on the surface (one or both sides) of a resin laminate, and forms a conductor pattern by dissolving and removing unnecessary copper foil parts other than the conductor pattern area using chemicals. The through-hole plating part is formed by applying a thin layer of electroless copper plating and then applying a thick layer of electroplating.
一方、アデイテイブ法は、銅箔の張付けられて
いない裸の樹脂積層板に、導体パターン部だけに
無電解メツキを厚付けして形成する方法で、この
方法ではスルーホールはすべて銅スルーホールに
形成される。 On the other hand, the additive method is a method in which thick electroless plating is applied only to the conductor pattern on a bare resin laminate with no copper foil attached.In this method, all through holes are formed as copper through holes. be done.
しかし、従来のプリント基板のパターン形成法
においては、メツキ工程やエツチング工程などの
ように、複数素材を同時にバツチ処理できる工程
とスルーホール形成や印刷やプレスのガイド穴と
なる各種の穴あけ、或いは、仕上げ截断のための
打抜プレスのように素材の一枚毎にしか施工でき
ない工程とがパターン形成工程中に混在している
ため、生産効率を高め難いという問題があつた。
However, in the conventional pattern forming method for printed circuit boards, there is a process that allows batch processing of multiple materials at the same time, such as a plating process and an etching process, and a process that allows through-hole formation and various types of holes that serve as guide holes for printing and pressing. The problem is that it is difficult to increase production efficiency because the pattern forming process includes processes that can only be performed on each piece of material, such as a punching press for finishing cutting.
即ち、穴明けやプレス工程を自動化し、この工
程で少数の複数素材を同時加工できるようにして
も、メツキやエツチング工程での処理枚葉数に比
べればはるかに少数であるため、パターン形成の
各工程を同期した工程速度で進行させることはで
きないからである。尚、スルーホールのない基板
でも、印刷のためのガイド穴の穴明け加工は不可
欠である。 In other words, even if the drilling and pressing processes are automated and a small number of multiple materials can be processed simultaneously in this process, the number of sheets processed is far smaller than the number of sheets processed in the plating and etching processes, so it is difficult to form patterns. This is because each process cannot proceed at a synchronized process speed. Note that even for substrates without through holes, drilling guide holes for printing is essential.
本発明は上記のような従来のパターン形成法に
おけるガイド穴等の穴あけやプレス打抜き等の機
械加工のタイミングを変え、大幅に生産効率を高
めることのできるパターン形成法を採り入れたプ
リント基板の製造法を提案することを目的として
なされたもので、その構成は、予め所定形状に裁
断整形され且つ必要な穴明け加工が施されて表面
に導電材が張付けられた基板材における前記導電
材の表面に、溶融温度が高い合成樹脂フイルムを
上面にした該フイルムより溶融温度が低い熱溶着
性フイルムによるエツチングレヂスト層を配置す
る一方、表面に回路パターンを刻設形成した熱プ
レスのダイを、上記エツチングレヂスト層の上か
ら基板材に加圧当接させることにより、当該エツ
チングレヂスト層を上記ダイの回路パターン通り
に残し、前記レヂスト層の他の部分を除去した
後、この基板材をエツチング処理することを特徴
とするものである。
The present invention is a printed circuit board manufacturing method that adopts a pattern forming method that can significantly improve production efficiency by changing the timing of machining such as drilling guide holes and press punching in the conventional pattern forming method as described above. The structure was made with the purpose of proposing a method for applying a conductive material to the surface of a substrate material that has been cut into a predetermined shape in advance, has undergone the necessary drilling process, and has a conductive material pasted on the surface. An etching resist layer made of a heat-fusible film having a lower melting temperature than that of the synthetic resin film having a high melting temperature is placed on the upper surface, and a heat press die having a circuit pattern engraved on the surface thereof is placed. By applying pressure to the substrate material from above the etching resist layer, the etching resist layer is left in accordance with the circuit pattern of the die, and after removing other parts of the resist layer, the substrate material is It is characterized by etching.
プリント基板の製造に当り、穴明け、打抜プレ
ス等の機械加工を導体パターンの形成に先立つて
行うので、プリント基板製造工程の進行効率の向
上及び合理化が行い易い。
When manufacturing a printed circuit board, mechanical processing such as drilling holes and punching presses is performed prior to forming conductor patterns, so that it is easy to improve the efficiency and rationalize the printed circuit board manufacturing process.
次に、本発明の実施例を第1図a〜cの工程図
により説明する。
Next, an embodiment of the present invention will be described with reference to process diagrams shown in FIGS. 1a to 1c.
1はプラスチツク積層板などの不導体による基
板材で、表面(ここでは上面、上、下両面の場合
もある)に導電性材料となる銅薄板2が張付けら
れている。 Reference numeral 1 denotes a non-conducting substrate material such as a plastic laminate, and a thin copper plate 2, which is a conductive material, is pasted on the surface (in this case, the upper surface, the upper surface, and the lower surface in some cases).
ここで、上記基板材1は、形成しようとする特
定のプリント基板の所定の単位大きさに予め切断
されているものであるが、所定プリント基板が連
続した幅の長尺材を後から所定長さに切断する場
合もある。因みに、従来技術では、この基板材の
大きさは、特定のプリント基板の4枚とか6枚と
いうような複数枚分の大きさを一枚としていた
が、本発明に於ては、特定プリント基板1枚の大
きさを、基板材1枚の大きさとして予め切断する
か、或は、当該基板材を連続させた長さを有する
長尺材を基板材としている。 Here, the substrate material 1 is cut in advance into a predetermined unit size of a specific printed circuit board to be formed, and a long material with a continuous width of a predetermined printed circuit board is later cut into a predetermined length. Sometimes it is cut right away. Incidentally, in the prior art, the size of this board material was the size of multiple pieces of specific printed circuit boards, such as four or six pieces, but in the present invention, the size of this board material Either the size of one sheet is cut in advance to the size of one substrate material, or the substrate material is a long material having a continuous length.
次に、上記銅薄板2を張付けた基板材1には、
銅薄板2の上面の全域にホツトメルト系合成樹脂
によるエツチングレヂスト層3が配置される。 Next, on the substrate material 1 to which the copper thin plate 2 is pasted,
An etching resist layer 3 made of hot melt synthetic resin is disposed over the entire upper surface of the thin copper plate 2.
尚、エツチングレヂスト層としては、上記ホツ
トメルト系合成樹脂に代え熱溶着性の他の合成樹
脂フイルムによる被覆膜層でもよい。ここでは、
上面に溶融温度の高い合成樹脂フイルム3a、そ
のフイルム3aの下面に当該フイルム3aより溶
融温度の低いホツトメルト系合成樹脂フイルム3
aなどによる熱融着性フイルムを積層したものを
被覆膜層として配置している。 The etching resist layer may be a coating layer made of a heat-fusible synthetic resin film instead of the hot-melt synthetic resin described above. here,
A synthetic resin film 3a with a high melting temperature is on the upper surface, and a hot melt synthetic resin film 3 with a lower melting temperature than the film 3a is on the lower surface of the film 3a.
A laminated film of heat-fusible films such as A is arranged as a coating layer.
上記エツチングレヂスト層3は後述するホツト
プレス工程の前段で基板材1の上面に配置されれ
ば足りる。 It is sufficient that the etching resist layer 3 is disposed on the upper surface of the substrate material 1 before the hot pressing process described later.
また、この段階における基板材1には、この材
料の送りや後の機械加工等の為のガイド孔(図示
せず)が所定位置に予め設けられている。 Further, guide holes (not shown) for feeding the material and later machining are provided in advance at predetermined positions in the substrate material 1 at this stage.
而して、4は上記基板材1の上面に、エツチン
グレヂスト層3を回路パターン通りにホツトプレ
スにより形成するための金型である。 Reference numeral 4 denotes a mold for forming the etching resist layer 3 on the upper surface of the substrate material 1 according to the circuit pattern by hot pressing.
即ち、金型4は、その下面に、回路パターンや
必要な孔などを形成するためのパターン刃4aが
彫刻等により刻設されていると共に、金型内部に
上記パターン刃4aを加熱するためのヒータ(図
に表われず)が設けられている。この場合、金型
4の彫刻面や合成樹脂フイルム3a,3bの接合
面には、溶融樹脂の溶着を防ぐ離型材のコーテイ
ングを施していることが望ましい。一方、銅薄板
2の上面は面粗度を彫刻面より粗くしておく。 That is, the mold 4 has pattern blades 4a engraved on its lower surface for forming circuit patterns, necessary holes, etc., and a pattern blade 4a for heating the pattern blades 4a inside the mold. A heater (not shown) is provided. In this case, it is desirable that the engraved surface of the mold 4 and the bonding surfaces of the synthetic resin films 3a and 3b be coated with a release agent to prevent the molten resin from adhering. On the other hand, the surface roughness of the upper surface of the thin copper plate 2 is made rougher than the engraved surface.
従つて、上記金型4は銅薄板2の上面に配置さ
れたエツチングレヂスト層3の上から基板材1に
押し当てられることにより、そのパターン刃4a
の部分のみがエツチングレヂスト層3と基板材1
の銅薄板2とを加圧することとなる。 Therefore, the mold 4 is pressed against the substrate material 1 from above the etching resist layer 3 disposed on the upper surface of the thin copper plate 2, thereby forming the pattern blade 4a.
Only the part marked with etching resist layer 3 and substrate material 1
The thin copper plate 2 is pressurized.
この結果、エツチングレヂスト層3のホツトメ
ルト系合成樹脂フイルム3bは、第1図bに示す
ように回路パターン通りのパターンにおいて基板
材1の銅薄板2の上に付着させられて、パターン
エツチングレヂスト層に形成される。このプレス
工程においては、上記のパターンエツチングレヂ
スト層の形成の外に、金型4に予め設けられてい
る他の刃物により、必要な孔明け加工も同時に行
うことができる。 As a result, the hot-melt synthetic resin film 3b of the etching resist layer 3 is adhered to the thin copper plate 2 of the substrate material 1 in the same pattern as the circuit pattern, as shown in FIG. Formed in a dist layer. In this pressing step, in addition to forming the pattern etching resist layer described above, other cutting tools provided in advance in the mold 4 can also perform necessary hole drilling at the same time.
この実施例のエツチングレヂスト層の2層のフ
イルム3a,3bにおいて、フイルム3aはフイ
ルム3bより溶融温度が高いので、銅薄板2の表
面にフイルム3bが融着するとき、フイルム3a
は未溶融であるためこれが金型4のパターン刃4
aに融着することはない。 In the two layers of films 3a and 3b of the etching resist layer in this embodiment, since the film 3a has a higher melting temperature than the film 3b, when the film 3b is fused to the surface of the thin copper plate 2, the film 3a
Since this is not melted, this is the pattern blade 4 of the mold 4.
It does not fuse to a.
そして、フイルム3aと3bの間に離型材がコ
ーテイングされているときはパターン刃4aのパ
ターン通りにフイルム3bのみが、第1図bのよ
うに、銅薄板2の上に融着して残り、フイルム3
a,3bの間に離型材がコーテイングされていな
い場合には、上記レヂスト層3のフイルム3a,
3bがパターン通りに銅薄板2上に残ることとな
る。 When the release material is coated between the films 3a and 3b, only the film 3b is fused and remains on the thin copper plate 2 according to the pattern of the pattern blade 4a, as shown in FIG. 1b. film 3
When the mold release material is not coated between a and 3b, the film 3a of the resist layer 3,
3b remains on the thin copper plate 2 according to the pattern.
従つて、銅薄板2の上に前記フイルム3bのみ
が融着された場合、上記レヂスト層3の合成樹脂
フイルム3aとホツトメルト系樹脂フイルム3b
の未融着部分は、例えば、第1図aの右側に搬送
されて、基板材1の上面から除去される。 Therefore, when only the film 3b is fused onto the thin copper plate 2, the synthetic resin film 3a of the resist layer 3 and the hot melt resin film 3b are bonded together.
The unfused portion is transported, for example, to the right side in FIG. 1a, and removed from the upper surface of the substrate material 1.
つまり、第1図aのエツチングレヂスト層3を
形成するフイルム材は、基板材1の左側に位置す
るフイルムホイール(図示せず)から右側の巻取
ホイール(図示せず)に取られることにより、残
りの部分が除かれるのである。このとき、基板材
1は紙面に直角の方向において移動させる。 That is, the film material forming the etching resist layer 3 in FIG. This will remove the remaining part. At this time, the substrate material 1 is moved in a direction perpendicular to the paper surface.
第1図bに示すように、回路パターン通りにホ
ツトメルト系樹脂3bによるエツチングレヂスト
層3が銅薄板2の上面を被覆した基板材1は、常
法によりエツチング処理することによつて、上記
レヂスト層3が被覆されていない銅薄板2の部分
を除去して、第1図cに示すような回路パターン
を有する基板材1に形成される。 As shown in FIG. 1b, the substrate material 1 in which the upper surface of the thin copper plate 2 is covered with the etching resist layer 3 made of hot-melt resin 3b according to the circuit pattern is etched by a conventional method. The portions of the thin copper plate 2 which are not coated with the resist layer 3 are removed to form a substrate material 1 having a circuit pattern as shown in FIG. 1c.
ここで、回路パターンの銅薄板2の上面に残つ
ているエツチングレヂスト層3は、このあと常法
により除去されて、上記基板材1がプリント基板
に形成されるのである。 Here, the etching resist layer 3 remaining on the upper surface of the thin copper plate 2 of the circuit pattern is then removed by a conventional method, and the substrate material 1 is formed into a printed circuit board.
本発明は以上の通りであつて、従来のプリント
基板の形成に当つては、回路パターンの形成が先
行し、この後に、穴明けや切断等の機械加工を行
つていたものを、穴明け等の機械加工と回路パタ
ーンの形成を同時に行うようにしたから、プリン
ト基板の製造効率を飛躍的に向上させることがで
きる。
The present invention is as described above, and in forming a conventional printed circuit board, the circuit pattern is formed first, and then mechanical processing such as drilling and cutting is performed. Since the machining process and the formation of the circuit pattern are performed at the same time, the manufacturing efficiency of printed circuit boards can be dramatically improved.
よつて、本発明はプリント基板の製造法として
きわて有用である。 Therefore, the present invention is extremely useful as a method for manufacturing printed circuit boards.
第1図a,b,cは、本発明製造法の一例の工
程を示す断面図である。
1……基板材、2……銅薄板、3……エツチン
グレヂスト層、4……金型、4a……パターン
刃。
FIGS. 1a, b, and c are cross-sectional views showing steps in an example of the manufacturing method of the present invention. 1... Substrate material, 2... Thin copper plate, 3... Etching resist layer, 4... Mold, 4a... Pattern blade.
Claims (1)
け加工が施されて表面に導電材が張付けられた基
板材における前記導電材の表面に、溶融温度が高
い合成樹脂フイルムを上面にした該フイルムより
溶融温度が低い熱溶着性フイルムによるエツチン
グレヂスト層を配置する一方、表面に回路パター
ンを刻設形成した熱プレスのダイを、上記エツチ
ングレヂスト層の上から基板材に加圧当接させる
ことにより、当該エツチングレヂスト層を上記ダ
イの回路パターン通りに残し、前記レヂスト層の
他の部分を除去した後、この基板材をエツチング
処理することを特徴とするプリント基板の製造方
法。1. In a substrate material that has been cut into a predetermined shape in advance, has been subjected to the necessary drilling process, and has a conductive material pasted on its surface, a synthetic resin film with a high melting temperature is placed on top of the surface of the conductive material. While an etching resist layer made of a heat-fusible film with a low melting temperature is placed, a heat press die with a circuit pattern engraved on its surface is pressed against the substrate material from above the etching resist layer. A method of manufacturing a printed circuit board, characterized in that the etching resist layer is left in accordance with the circuit pattern of the die and other parts of the resist layer are removed, and then the substrate material is subjected to etching treatment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28198287A JPH01124284A (en) | 1987-11-10 | 1987-11-10 | Manufacture of printed-circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28198287A JPH01124284A (en) | 1987-11-10 | 1987-11-10 | Manufacture of printed-circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01124284A JPH01124284A (en) | 1989-05-17 |
JPH054838B2 true JPH054838B2 (en) | 1993-01-20 |
Family
ID=17646595
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28198287A Granted JPH01124284A (en) | 1987-11-10 | 1987-11-10 | Manufacture of printed-circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01124284A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4292245B2 (en) | 2001-02-05 | 2009-07-08 | 三星モバイルディスプレイ株式會社 | Luminescent body, light emitting element, and light emitting display device |
JP2003218658A (en) * | 2002-01-17 | 2003-07-31 | Nec Corp | Method for manufacturing surface acoustic wave element and semiconductor device |
-
1987
- 1987-11-10 JP JP28198287A patent/JPH01124284A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH01124284A (en) | 1989-05-17 |
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