JPH0548350A - Output buffer circuit provided with alarm function - Google Patents

Abstract

PURPOSE:To reduce power consumption by fixing an output signal at alarm setting to a low level so as to reduce a current flowing to an output stage. CONSTITUTION:A PNP transistor(TR) 10 is turned on at alarm setting, that is, application of a low level voltage to an alarm input terminal 4. Thus, a base potential of an NPN TR 15 of a differential amplifier circuit 24 is fixed to a high level potential depending on resistors 11,9. In this case, an emitter potential of an NPN TR 7 of an emitter follower 26 rises to a high level. Thus, since a base-emitter voltage of the TR 7 is not sufficiently taken, the TR 7 is cut off. As a result, an input signal from an input terminal 2 is not sent to a next stage circuit 24. Since the base potential of the TR 15 is fixed sufficiently higher than the base potential of the TR 14, the output signal of the circuit 24 is fixed to a low level. Thus, a low level is obtained at the output terminal 3 independently of the input signal and the power consumption is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an output buffer circuit with an alarm function for an anti-conductor integrated circuit.

[0002]

2. Description of the Related Art An example of a conventional output buffer circuit with an alarm function is shown in FIG. 2 and this circuit will be described.

The circuit of FIG. 2 has transistors 14, 15, 2
A differential amplifier circuit composed of 1, 22, resistors 12, 13, 20 and an alarm setting transistor 23;
It has an emitter follower circuit composed of a transistor 6 and a resistor 8, an emitter follower circuit composed of a transistor 7 and a resistor 9, and an emitter follower circuit composed of a transistor 17 and a resistor 18.

Next, the operation will be described. When the alarm is not set, a low level voltage (0.8 V or less) is applied to the alarm signal input terminal 19, and the transistor 23 is in the cut-off state. At this time, the current mirror circuit composed of the transistors 21 and 22 functions as a constant current source of the differential amplifier circuit. In this case, the input signal is applied to the differential amplifier circuit via the first stage emitter follower circuit, and the amplified signal is obtained from the output terminal 3 via the final stage emitter follower circuit.

On the other hand, when an alarm is set, a high level voltage (0.8 V or more) is applied to the alarm signal input terminal 19, the transistor 23 is turned on, and the collector current of the transistor 23 instantly increases. At this time,
Since the base potentials of the transistors 21 and 22 decrease, the transistors 21 and 22 are cut off. As a result, almost no current flows through the differential amplifier circuit, and the third amplifier
The base potential of the transistor 17 of the emitter follower becomes equal to the power supply potential. Therefore, the potential of the output terminal 3 is fixed at a high level regardless of the input signal.

[0006]

In the conventional output buffer circuit with an alarm function as shown in FIG. 2, since the output signal when the alarm is set is fixed at a high level, the collector current of the output stage emitter follower circuit increases. There was a drawback that it did. In particular, when a large output drive capability is required for the output stage, the resistance value of the resistor 18 is set small. In this case, the above-mentioned current becomes extremely large, which causes an increase in current consumption or a problem in reliability.

The present invention has been made in view of the above-mentioned conventional circumstances. Therefore, an object of the present invention is to provide a novel output buffer circuit with an alarm function, which can solve the above-mentioned problems inherent in the prior art. To provide.

[0008]

In order to achieve the above object, an output buffer circuit with an alarm function according to the present invention comprises a differential amplifier circuit composed of an NPN type transistor pair and a first NPN type transistor. A first emitter follower circuit configured, a second emitter follower circuit configured by a second NPN transistor, and a third NP
It has a third emitter follower circuit composed of N type transistors, a PNP type transistor, and a resistor, and connects the output terminal of the first emitter follower circuit and the non-inverting input terminal of the differential amplifier circuit. , The output terminal of the second emitter follower circuit and the inverting input terminal of the differential amplifier circuit are connected, the non-inverting output terminal of the differential amplifier circuit is connected to the input terminal of the third emitter follower circuit, and the PNP is connected. The emitter of the first transistor is connected to the power supply, and the resistor is connected between the collector of the PNP transistor and the output terminal of the second emitter follower circuit. The input signal is input, the inverted input signal is input from the input terminal of the second emitter follower circuit, and the alarm signal is input from the base of the PNP transistor. It is characterized by obtaining an output signal from the output terminal of the third emitter follower circuit.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the preferred embodiments with reference to the drawings.

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention.

Referring to FIG. 1, one embodiment of the present invention is
A differential amplifier circuit 24 including NPN transistors 14 and 15, resistors 12 and 13, and a current source 16, an emitter follower circuit 25 including NPN transistor 6 and resistor 8, an NPN transistor 7 and resistor 9 , An NPN type follower circuit 26, and an NPN type transistor 17 and a resistor 18.
7 and an alarm function circuit composed of a PNP transistor 10 and a resistor 11, and a differential amplifier circuit 24
Input terminal and first and second emitter follower circuits 2
Output terminals 5 and 26 are connected to each other, and a differential signal is input from input terminals 1 and 2 of these emitter follower circuits. Further, the normal output terminal of the differential amplifier circuit 24 and the input terminal of the third emitter follower circuit 27 are connected, and an output signal is obtained from the output terminal 3 of this emitter follower circuit 27. The emitter of the PNP transistor 10 of the alarm function circuit composed of the PNP transistor 10 and the resistor 11 is connected to the DC power supply 5, and a resistor is provided between the collector of the transistor 10 and the inverting input terminal of the differential amplifier circuit 24. 11 is connected in series and this PNP is used when no alarm is set.
Applying a high level voltage to the base of the transistor 10
Apply low level voltage when alarm is set.

Next, the operation of the embodiment shown in FIG. 1 will be described.

When the alarm is not set, that is, when a high level is applied to the alarm input terminal 4, the PNP transistor 10 is in a cutoff state and the output impedance of the emitter follower circuit 26 is sufficiently low. The signal is hardly affected by the PNP transistor 10 and the resistor 11.

On the other hand, when an alarm is set, that is, when a low level voltage is applied to the alarm input terminal 4, the PNP transistor 10 is turned on, so the base potential of the NPN transistor 15 of the differential amplifier circuit 24 is the resistance 11 And is fixed to the potential (high level) determined by the resistor 9. At this time, since the emitter potential of the NPN transistor 7 of the second emitter follower 26 also rises to a high level, the NPN
Since the base-emitter voltage of the N-type transistor 7 cannot be sufficiently obtained, the NPN-type transistor 7 is cut off. As a result, the input signal from the input terminal 2 is not transmitted to the differential amplifier circuit 24 in the next stage.

As described above, since the base potential of the NPN transistor 15 of the differential amplifier circuit 24 is fixed to be sufficiently higher than the base potential of the NPN transistor 14,
The output signal of the differential amplifier circuit 24 is fixed at a low level.
Therefore, a low level is obtained at the output terminal 3 regardless of the input signal. It is obvious that the current flowing through the output stage NPN transistor 17 has the minimum value in this circuit at the time of alarm.

[0016]

As described above, according to the present invention,
By fixing the output signal when the alarm is set to a low level, the collector current of the transistor in the output stage can be extremely reduced.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional example.

[Explanation of symbols]

1, 2 ... Input terminal 3 ... Output terminal 4 ... Alarm input terminal 5 ... DC voltage source 6, 7, 14, 15, 17, 21, 22, 23 ... NPN
Type transistor 8, 9, 11, 12, 13, 18, 20 ... Resistor 10 ... PNP type transistor 16 ... DC current source 19 ... Alarm input terminal 24 ... Differential amplifier circuit 25, 26, 27 ... Emitter follower circuit

Claims (1)

[Claims] 1. A differential amplifier circuit composed of an NPN transistor pair, a first emitter follower circuit composed of a first NPN transistor, and a second emitter follower circuit composed of a second NPN transistor. An emitter follower circuit,
A third emitter follower circuit including a third NPN transistor, a PNP transistor, and a resistor, and an output terminal of the first emitter follower circuit and a non-inverting input terminal of the differential amplifier circuit. The output terminal of the second emitter follower circuit and the inverting input terminal of the differential amplifier circuit are connected, and the non-inverting output terminal of the differential amplifier circuit and the input terminal of the third emitter follower circuit are connected. Connecting the emitter of the PNP transistor to a power supply, connecting the resistor between the collector of the PNP transistor and the output terminal of the second emitter follower circuit, and connecting the resistor of the first emitter follower circuit. A normal input signal is input from an input terminal, an inverted input signal is input from an input terminal of the second emitter follower circuit, and the PNP transistor Over scan type the alarm signal from the third emitter follower with alarm function output buffer circuit for the output terminal and obtaining an output signal of the circuit.