JPH0542837B2 - - Google Patents

Info

Publication number
JPH0542837B2
JPH0542837B2 JP19380183A JP19380183A JPH0542837B2 JP H0542837 B2 JPH0542837 B2 JP H0542837B2 JP 19380183 A JP19380183 A JP 19380183A JP 19380183 A JP19380183 A JP 19380183A JP H0542837 B2 JPH0542837 B2 JP H0542837B2
Authority
JP
Japan
Prior art keywords
light
receiving element
layer
emitting
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP19380183A
Other languages
Japanese (ja)
Other versions
JPS6085579A (en
Inventor
Yoshiharu Tashiro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58193801A priority Critical patent/JPS6085579A/en
Publication of JPS6085579A publication Critical patent/JPS6085579A/en
Publication of JPH0542837B2 publication Critical patent/JPH0542837B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/12Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
    • H01L31/125Composite devices with photosensitive elements and electroluminescent elements within one single body

Landscapes

  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)

Description

【発明の詳細な説明】 本発明は、1つの基板上に発光素子および受光
素子を有する半導体素子、即ち発光受光素子の製
造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device having a light-emitting element and a light-receiving element on one substrate, that is, a method for manufacturing a light-emitting and light-receiving element.

光フアイバーを用いて行なう従来の一般的な光
通信方式は、発光素子から発した光を光フアイバ
ー中を伝達させ受光素子上に集光し受光させる。
この方式において双方向通信を行なうには、発光
素子、光フイバー及び受光素子からなる系が2組
必要となるので、システムの価格が非常に高価と
なる。これを解決するためには発光及び受光の両
機能をもつ発光受光素子が必要である。
In a conventional general optical communication method using an optical fiber, light emitted from a light emitting element is transmitted through the optical fiber, and the light is collected and received on a light receiving element.
In order to carry out bidirectional communication in this method, two sets of systems each consisting of a light emitting element, an optical fiber, and a light receiving element are required, which makes the system extremely expensive. To solve this problem, a light-emitting and light-receiving element having both light-emitting and light-receiving functions is required.

従来の発光受光素子としては、一般的な発光素
子の活性層の一部を発光素子部から分離し逆バイ
アス印加して受光素子として使用したものがあ
る。第1図はこうした構造を有する発光受光素子
の模式的断面図である。(但し、本図及び以下の
各図では、基板及び成長層はハツチングが省略し
て描いてある)。図において、1はn+−InP基板、
2はn+−InP層、3はn−InGaAsP層、4はp+
InP層、5は絶縁膜、6は受光素子部のp側電
極、7は発光素子部のp側電極、8は発光素子部
からのもれ光が受光素子部に入射すことを防ぐ遮
光部、9はn側電極である。この発光受光素子で
は、発光素子部10受光素子部11ともにn−
InGaAsP層3とp+−InP層によりpn接合が構成さ
れている。尚、遮断部8を備えた発光受光素子は
すでに本願発明者によつて提案され、特許出願
(特願昭57−178828)してある。
As a conventional light-emitting light-receiving element, there is one in which a part of the active layer of a general light-emitting element is separated from the light-emitting element portion and used as a light-receiving element by applying a reverse bias. FIG. 1 is a schematic cross-sectional view of a light emitting and receiving element having such a structure. (However, in this figure and the following figures, the substrate and the growth layer are drawn without hatching). In the figure, 1 is an n + -InP substrate,
2 is n + -InP layer, 3 is n-InGaAsP layer, 4 is p + -
InP layer, 5 is an insulating film, 6 is a p-side electrode of the light-receiving element, 7 is a p-side electrode of the light-emitting element, and 8 is a light-shielding part that prevents light leaking from the light-emitting element from entering the light-receiving element. , 9 is an n-side electrode. In this light emitting light receiving element, both the light emitting element part 10 and the light receiving element part 11 are n-
A pn junction is formed by the InGaAsP layer 3 and the p + -InP layer. Incidentally, a light-emitting light-receiving element equipped with a blocking section 8 has already been proposed by the inventor of the present invention, and a patent application has been filed (Japanese Patent Application No. 178828-1982).

つぎに、第1図の発光受光素子の製造方法の一
例を説明する。第2図a〜dはこの製造方法の各
中間工程で生じる半製品の模式的断面図である。
n+−InP基板1(不純物濃度1×1018cm-3)上に
バツフアー層としてn+−InP層2(不純物濃度1
×1018cm-3)を約4μm、n−InGaAsP層3(不純
物濃度1×1017cm-3、フオトルミピーク波長1.3μ
m)を約2μm、p+−InP層4(不純物濃度1×
1018cm-3)を約2μmを成長させたウエーハを形成
し〔本図a〕、フオトレジスト処理工程等により
n+−InP層2達するまでリング状にエツチングす
る〔本図b〕、その後に絶縁膜5としてCVD−
SiO2膜を2500Å形成する〔本図c〕。かかる後に
p側電極としてAuZnのアロイ電極とそのボンデ
イング用パツドのTi/Pt/Auの多層構造によ
り、受光素子部のp側電極6、発光素子部のp側
電極7、遮光部8を同時に形成する。その後裏面
研磨により全厚60μmとしn+−InP基板側にAuGe
のアロイ電極とボンデイング用パツドのAuとか
らなるn側電極9を形成する〔本図d〕。
Next, an example of a method for manufacturing the light emitting/receiving element shown in FIG. 1 will be described. FIGS. 2a to 2d are schematic cross-sectional views of semifinished products produced in each intermediate step of this manufacturing method.
n + -InP layer 2 (impurity concentration 1) as a buffer layer on n + -InP substrate 1 (impurity concentration 1
x10 18 cm -3 ) to approximately 4 μm, n-InGaAsP layer 3 (impurity concentration 1×10 17 cm -3 , photoluminescence peak wavelength 1.3 μm)
m) is approximately 2 μm, p + -InP layer 4 (impurity concentration 1×
10 18 cm -3 ) was grown to a thickness of approximately 2 μm [Figure a], and then processed through a photoresist treatment process, etc.
Etch in a ring shape until reaching the n + -InP layer 2 [Figure b], then CVD- as the insulating film 5.
A SiO 2 film of 2500 Å is formed [Figure c]. After that, the p-side electrode 6 of the light-receiving element part, the p-side electrode 7 of the light-emitting element part, and the light shielding part 8 are simultaneously formed using an AuZn alloy electrode as a p-side electrode and a Ti/Pt/Au multilayer structure of its bonding pad. do. After that, the total thickness was made 60 μm by back polishing, and AuGe was applied to the n + −InP substrate side.
The n-side electrode 9 is formed of an alloy electrode of 1 and a bonding pad of Au [FIG. d].

かかる製造工程例により製作された発光受光素
子は、発光素子部10の活性層であるn−
InGaAsP層3と受光素子部11の光吸収層であ
るn−InGaAsP層3とに同一の成長層を使用し
ている。ところが、活性層は高速作動のために1
×1017程度以上の不純物濃度が求められ、他方の
光吸収層は1×1016程度以下の不純物濃度が望ま
しい。第2図a〜dを参照して述べた発光受光素
子の組成は、発光素子部10の特性を重視してい
るから、受光素子部11での空乏層幅は最大でも
0.4μm程度しか得ることができない。このように
空乏層幅が小さいと、受光素子部11は、作動速
度が遅く、感度が低く、電流−電圧特性において
もトンネル電流による暗電流が大きいという欠点
があつた。従つて、第1図の発光受光素子の受光
素子部11はパルス応答の周波数特性が悪かつ
た。また、発光素子部10の高速化をはかるため
には活性層の薄膜化も必要となるが、この点でも
受光素子部の高速化、高感度化とは相反するとい
う問題もあつた。このように、従来の発光受光素
子の製造方法では、発光素子部と受光素子部との
両方の特性を最適化することができなかつた。
The light-emitting light-receiving device manufactured by this manufacturing process example has n-
The same growth layer is used for the InGaAsP layer 3 and the n-InGaAsP layer 3 which is the light absorption layer of the light receiving element section 11. However, the active layer requires 1 for high-speed operation.
An impurity concentration of about ×10 17 or more is required, and the other light absorption layer preferably has an impurity concentration of about 1×10 16 or less. The composition of the light-emitting and light-receiving elements described with reference to FIGS.
Only about 0.4 μm can be obtained. When the depletion layer width is small in this way, the light receiving element section 11 has disadvantages such as slow operation speed, low sensitivity, and large dark current due to tunnel current in terms of current-voltage characteristics. Therefore, the light-receiving element section 11 of the light-emitting light-receiving element shown in FIG. 1 had poor frequency characteristics of pulse response. Further, in order to increase the speed of the light emitting element section 10, it is necessary to make the active layer thinner, but this also has the problem of being contradictory to increasing the speed and sensitivity of the light receiving element section. As described above, in the conventional method of manufacturing a light emitting and receiving element, it has not been possible to optimize the characteristics of both the light emitting element and the light receiving element.

本発明の目的は、従来のかかる欠点を除去し、
発光素子部と受光素子部との両方の最適化が可能
で、高い発光効率と高い受光感度及び速い応答速
度を同時に満足する発光受光素子の製造方法の提
供にある。
The purpose of the present invention is to eliminate such drawbacks of the prior art,
An object of the present invention is to provide a method for manufacturing a light emitting light receiving element, which allows optimization of both the light emitting element part and the light receiving element part, and satisfies high light emitting efficiency, high light receiving sensitivity, and fast response speed at the same time.

本発明の発光受光素子の製造方法は、第1の導
電型を有し禁制帯幅E1の第1の半導体層上に、
第1導電型不純物濃度N1を示し禁制帯幅E2
(E1>E2)の第2の半導体層、第1導電型で
禁制帯幅E3(E3>E2)の第3の半導体層、
第1導電型不純物濃度N2(N2>N1)を示し
禁制帯幅E4(E4≦E2の第4の半導体層を形
成する工程と、一部領域を第3の半導体層に達す
るまで除去し凹部を形成する工程と、前記凹部の
第2の半導体層に達するまで第2の導電型に変え
る工程と、前記凹部の外周部を第1の半導体層に
達するまで除去する工程と、前記凹部、及び凹部
と分離された外周とに個別に電極を形成する工程
とを有することを特徴とする。
The method for manufacturing a light emitting/receiving element of the present invention includes: forming a first semiconductor layer having a first conductivity type and having a forbidden band width E1;
Indicates the first conductivity type impurity concentration N1 and the forbidden band width E2
a second semiconductor layer of (E1>E2), a third semiconductor layer of the first conductivity type and a forbidden band width E3 (E3>E2);
A step of forming a fourth semiconductor layer having a first conductivity type impurity concentration N2 (N2>N1) and a forbidden band width E4 (E4≦E2) and a step of removing a partial region until reaching the third semiconductor layer and forming a recessed portion. a step of changing the conductivity type to a second conductivity type until the second semiconductor layer in the recess is reached; a step of removing the outer periphery of the recess until it reaches the first semiconductor layer; and the recess and the recess. and a step of individually forming electrodes on the separated outer periphery.

次に図面を参照して本発明を詳細に説明する。
第3図は本発明の一実施例により得られた発光受
光素子の模式的断面図である。図において、33
はn+−InP層、34はn-−InGaAsP層、36はp+
−InP層、37は絶縁膜、38は受光素子部のp
側電極、39は発光素子部のp側電極、40は遮
光部、41は発光素子部、42は受光素子部、4
3は受光素子部のn側電極、44は発光素子部の
n側電極をそれぞれ示す。かかる本発明を適用し
た素子においては、発光素子部41の活性層には
n−InGaAsP3を用い、受光素子部42の光吸
収層にはn-−InGaAsP34を用いることによつ
て、両者の濃度を各々の素子で最適化することが
可能となつた。
Next, the present invention will be explained in detail with reference to the drawings.
FIG. 3 is a schematic cross-sectional view of a light-emitting light-receiving device obtained according to an example of the present invention. In the figure, 33
is n + -InP layer, 34 is n - -InGaAsP layer, 36 is p +
-InP layer, 37 is an insulating film, 38 is p of the light receiving element part
side electrode, 39 is a p-side electrode of the light emitting element section, 40 is a light shielding section, 41 is a light emitting element section, 42 is a light receiving element section, 4
3 indicates an n-side electrode of the light-receiving element section, and 44 indicates an n-side electrode of the light-emitting element section. In the device to which the present invention is applied, n-InGaAsP3 is used for the active layer of the light-emitting element section 41, and n -- InGaAsP34 is used for the light absorption layer of the light-receiving element section 42, thereby reducing the concentration of both. It has become possible to optimize each element.

上記実施例の製造方法例を説明するために、こ
の実施例の製造方法で作られる半製品の模式的断
面図を第4図a〜cに示す。n+−InP基板1にバ
ツフアー層としてn+−InP層2(不純物濃度1×
1018cm-3)を約4μm、発光素子部の活性層として
のn−InGaAsP層3(不純物濃度1×1017cm-3
オトルミピーク波長1.3μm)を約2μm、n+−InP
層33(不純物濃度1×1018cm-3)を約2μm、受
光素子部の光吸収層としてのn-−InGaAsP層3
4(不純物濃度8×1015cm- 3フオトルミピーク波
長1.3μm)を約4μm、n−InP層35(不純物濃
度1×1016cm-3)を約2μmを成長させたウエーハ
を形成し〔第4図a〕、フオトレジスト処理等を
経て直径40μmの円形にn+−InP層33に達する
までエツチングにより除去し凹部を形成する〔第
4図b〕。その後Cdの熱拡散法により、本図bに
点々を入れて現す深さ約2μmの領域をp+とする。
その後、フオトレジスト処理等により、前記の円
形の凹部の中心に位置合わせをし、内径が30μm
で外形が50μmのリング状に除去し、発光素子部
41と受光素子部42とに分離する。その後、絶
縁膜37としてCVDSiO2膜を2500Å形成し、受
光素子部42のp側電極38、発光素子部41の
p側電極39、遮光部40をTi/Pt/Auの真空
蒸着法により形成し、フオトレジスト処理工程後
前記凹部を中心に位置合わせをし直径300μmの
円形以外の外周部をn+−InP層33に達するまで
除去し、AuGeの真空蒸着法により受光素子部4
2のn側電極43を形成する。その後ウエーハ厚
約60μmまでn+−InP基板1側を研磨し、AuGeの
真空蒸着法により発光素子部41のn側電極44
を形成した。以上の製造方法により製作されたこ
の実施例は、従来の発光受光素子に比べると、発
光素子部41を従来と同様にしたままで、受光素
子部42の特性を向上することができる。
In order to explain an example of the manufacturing method of the above embodiment, schematic cross-sectional views of semi-finished products manufactured by the manufacturing method of this embodiment are shown in FIGS. 4a to 4c. n + -InP layer 2 as a buffer layer on n + -InP substrate 1 (impurity concentration 1×
10 18 cm -3 ) is about 4 μm, the n-InGaAsP layer 3 (impurity concentration 1×10 17 cm -3 photoluminescence peak wavelength 1.3 μm) as the active layer of the light emitting element is about 2 μm, and n + -InP
The layer 33 (impurity concentration: 1×10 18 cm -3 ) is approximately 2 μm thick, and the n −InGaAsP layer 3 serves as a light absorption layer in the light receiving element portion.
[ _ _ _ _ After photoresist treatment, etching is performed until the n + -InP layer 33 is reached, forming a concave portion (FIG. 4b). Then, by using the Cd thermal diffusion method, a region with a depth of approximately 2 μm, which is shown by placing dots in b in this figure, is defined as p + .
Then, by photoresist treatment etc., the center of the circular recess is aligned, and the inner diameter is 30 μm.
Then, a ring shape having an outer diameter of 50 μm is removed and separated into a light emitting element section 41 and a light receiving element section 42. Thereafter, a CVDSiO 2 film with a thickness of 2500 Å is formed as the insulating film 37, and the p-side electrode 38 of the light-receiving element section 42, the p-side electrode 39 of the light-emitting element section 41, and the light shielding section 40 are formed by vacuum evaporation of Ti/Pt/Au. After the photoresist processing step, the position is aligned centering on the recessed part, and the outer peripheral part other than the circular part with a diameter of 300 μm is removed until it reaches the n + -InP layer 33, and the light receiving element part 4 is formed by vacuum evaporation of AuGe.
2 n-side electrodes 43 are formed. Thereafter, the n + -InP substrate 1 side is polished to a wafer thickness of approximately 60 μm, and the n-side electrode 44 of the light emitting element portion 41 is coated with AuGe by vacuum evaporation.
was formed. This embodiment manufactured by the above manufacturing method can improve the characteristics of the light receiving element part 42 while keeping the light emitting element part 41 the same as the conventional one, compared to the conventional light emitting light receiving element.

改善例として第5図に従来の製造方法により得
られた素子(以下、従来の素子と呼ぶ)と本実施
例により得られた素子(以下、本発明の素子と呼
ぶ)の電流−電圧特性を示す。本図で、第1図に
示した従来の発光受光素子の受光素子部11の電
流−電圧特性線を符号50で、本実施例の受光素
子部42の電流−電圧特性線を符号51でそれぞ
れ示した。これら両特性線50,51から、本発
明による発光受光素子部の暗電流が従来の素子に
比べ低減されていることがわかる。これは受光素
子部の光吸収層の不純物濃度を低減したためにト
ンネル電流の発生が抑えられたことによる。
As an example of improvement, Fig. 5 shows the current-voltage characteristics of an element obtained by the conventional manufacturing method (hereinafter referred to as the conventional element) and an element obtained by this example (hereinafter referred to as the element of the present invention). show. In this figure, the current-voltage characteristic line of the light-receiving element part 11 of the conventional light-emitting light-receiving element shown in FIG. Indicated. It can be seen from both of these characteristic lines 50 and 51 that the dark current of the light emitting/receiving element according to the present invention is reduced compared to the conventional element. This is because the generation of tunnel current is suppressed by reducing the impurity concentration of the light absorption layer in the light receiving element portion.

また第6図にはビツトレート32Mb/S、デ
ユーテイ約1/2、マーク率1/2、波長1.3μmの孤独
パルスに対するパルス応答波形を示す。従来の発
光受光素子の受光素子部11のパルス応答波形が
符号60で、実施例の受光素子部42のパルス応
答波形が符号61で示してある。これによると、
パルス応答波は、従来の素子では波形が三角形に
近く振幅も小さいのに対し、実施例では波形が光
入力(矩形波)に近づき、即ちパルス応答の周波
数特性がよく、また振幅も大きくなつてきてい
る。これは、不純物濃度を低減した効果であり、
従来の素子では空乏層幅は0.4μm程度しか拡がら
なかつたが本発明の素子では4μm程度まで拡が
ることが可能となつたから、従来の素子では空乏
層外でほとんどのキヤリアが発生していたのに対
し、本発明の素子では空乏層内で大部分のキヤリ
アが発生し遅い拡散電流成分が減少したのであ
る。また、そのことに付随し交流量子効率も改善
され、振幅が大きくなつている。
Further, FIG. 6 shows a pulse response waveform for a solitary pulse with a bit rate of 32 Mb/S, a duty of about 1/2, a mark rate of 1/2, and a wavelength of 1.3 μm. The pulse response waveform of the light receiving element section 11 of the conventional light emitting light receiving element is indicated by reference numeral 60, and the pulse response waveform of the light receiving element section 42 of the embodiment is indicated by reference numeral 61. according to this,
In the conventional element, the pulse response wave has a triangular shape and small amplitude, but in the embodiment, the waveform approaches the optical input (rectangular wave), that is, the frequency characteristics of the pulse response are good, and the amplitude is large. ing. This is the effect of reducing impurity concentration,
In the conventional device, the depletion layer width could only be expanded to about 0.4 μm, but in the device of the present invention, it can be expanded to about 4 μm. In contrast, in the device of the present invention, most of the carriers were generated within the depletion layer, and the slow diffusion current component was reduced. Additionally, the AC quantum efficiency has also been improved and the amplitude has become larger.

前述の実施例ではInP/InGaAsP系の素子につ
いて説明したが、InGaAsやAlGaAsなど他の3
元、4元の材料を用いてもよいのは明白である。
実施例では発光素子部41の活性層3と受光素子
部42の光吸収層34との導電型をn型で説明し
たが、p型でもあるいは各々異なつていても本発
明は有効であり、また両者を同一組成の
InGaAsPとしたが異なる組成、異なる材料を用
いたものでも有効である。また、実施例における
素子形状、電極形状もこれに規定されるものでは
ない。
In the above embodiments, InP/InGaAsP-based elements were explained, but other three types such as InGaAs and AlGaAs can also be used.
It is clear that primary or quaternary materials may be used.
In the embodiment, the conductivity type of the active layer 3 of the light-emitting element part 41 and the light absorption layer 34 of the light-receiving element part 42 is n-type, but the present invention is effective even if the conductivity types are p-type or different. Also, both have the same composition.
Although InGaAsP was used, it is also effective to use a different composition or material. Furthermore, the element shape and electrode shape in the examples are not limited to these.

本発明によれば、以上説明したように、発光素
子部と受光素子部との両方の特性をそれぞれ最適
化できる発光受光素子の製造方法が提供できる。
According to the present invention, as described above, it is possible to provide a method for manufacturing a light emitting and receiving element that can optimize the characteristics of both the light emitting element and the light receiving element.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の製造方法による発光受光素子の
模式的断面図、第2図a〜dはこの発光受光素子
の製造工程で生じる半製品の模式的断面図、第3
図は本発明の一実施例の模式的断面図、第4図a
〜cはこの製造方法による素子の製造工程で作ら
れる半製品の模式的断面図、第5図は第1図の従
来の発光受光素子及び第3図の実施例における受
光素子部の電流−電圧特性図、第6図は受光素子
部のパルス応答波形図である。 1……n+−InP基板、2……n+−InP層、3…
…n−InGaAsP層、4……p+−InP層、5,37
……絶縁膜、6,38……受光素子部のp側電
極、7,39……発光素子部のp側電極、8,4
0……遮光部、9……発光素子部、受光素子部兼
用のn側電極、10,41……発光素子部、1
1,42……受光素子部、33……n+−InP層、
34……n-−InGaAsP層、35……n−InP層、
36……熱拡散法により形成したがp+領域、4
3……受光素子部のn側電極、44……発光素子
部のn側電極。
FIG. 1 is a schematic cross-sectional view of a light-emitting light-receiving device produced by a conventional manufacturing method, FIGS.
The figure is a schematic sectional view of one embodiment of the present invention, FIG.
~c is a schematic cross-sectional view of a semi-finished product made in the manufacturing process of an element according to this manufacturing method, and FIG. 5 is a current-voltage diagram of the conventional light-emitting light-receiving element shown in FIG. 1 and the light-receiving element part in the embodiment shown in FIG. The characteristic diagram, FIG. 6, is a pulse response waveform diagram of the light receiving element section. 1... n + -InP substrate, 2... n + -InP layer, 3...
...n-InGaAsP layer, 4...p + -InP layer, 5,37
... Insulating film, 6, 38 ... P-side electrode of light-receiving element section, 7, 39 ... P-side electrode of light-emitting element section, 8, 4
0... Light shielding part, 9... N-side electrode serving both as light emitting element part and light receiving element part, 10, 41... Light emitting element part, 1
1, 42... Light receiving element section, 33... n + -InP layer,
34...n -- InGaAsP layer, 35...n-InP layer,
36... p + region formed by thermal diffusion method, 4
3...n-side electrode of the light-receiving element section, 44...n-side electrode of the light-emitting element section.

Claims (1)

【特許請求の範囲】[Claims] 1 第1の導電型を有し禁制帯幅E1の第1の半
導体層上に、第1導電型で不純物濃度N1を示し
禁制帯幅E2(E1>E2)の第2の半導体層、
第1導電型で禁制帯幅E(E3>E2)の第3の
半導体層、第1導電型で不純物濃度N2(N2<
N1)を示し禁制帯幅E4(E4≦E2)の第4
の半導体層を形成する工程と、一部領域を第3の
半導体層に達するまで除去し凹部を形成する工程
と、前記凹部の第2の半導体層に達するまで第2
の導電型に変える工程と、前記凹部の外周部を第
1の半導体層に達するまで除去する工程と、前記
凹部、及び凹部と分離された外周部とに個別に電
極を形成する工程とを備えることを特徴とする発
光受光素子の製造方法。
1. On a first semiconductor layer having a first conductivity type and a forbidden band width E1, a second semiconductor layer of the first conductivity type and having an impurity concentration N1 and a forbidden band width E2 (E1>E2);
A third semiconductor layer of the first conductivity type and a forbidden band width E (E3>E2), a third semiconductor layer of the first conductivity type and an impurity concentration N2 (N2<
N1) and the fourth forbidden band width E4 (E4≦E2)
a step of forming a recess by removing a partial region until reaching the third semiconductor layer; and a step of forming a recess by removing a partial region until reaching the second semiconductor layer of the recess
a step of removing the outer periphery of the recess until it reaches the first semiconductor layer; and a step of forming electrodes individually in the recess and the outer periphery separated from the recess. A method for manufacturing a light-emitting light-receiving element, characterized in that:
JP58193801A 1983-10-17 1983-10-17 Light-emitting/light-receiving element Granted JPS6085579A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58193801A JPS6085579A (en) 1983-10-17 1983-10-17 Light-emitting/light-receiving element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58193801A JPS6085579A (en) 1983-10-17 1983-10-17 Light-emitting/light-receiving element

Publications (2)

Publication Number Publication Date
JPS6085579A JPS6085579A (en) 1985-05-15
JPH0542837B2 true JPH0542837B2 (en) 1993-06-29

Family

ID=16313997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58193801A Granted JPS6085579A (en) 1983-10-17 1983-10-17 Light-emitting/light-receiving element

Country Status (1)

Country Link
JP (1) JPS6085579A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07190082A (en) * 1993-07-15 1995-07-28 Ath Albarus Transmissoes Homocineticas Ltda Sealing device used for constant-velocity joint

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6237978A (en) * 1985-08-12 1987-02-18 Matsushita Electric Ind Co Ltd Light emitting and receiving integrated element
EP0288267B1 (en) * 1987-04-21 1993-10-06 Nec Corporation An optical semiconductor device
US4879250A (en) * 1988-09-29 1989-11-07 The Boeing Company Method of making a monolithic interleaved LED/PIN photodetector array
US5055894A (en) * 1988-09-29 1991-10-08 The Boeing Company Monolithic interleaved LED/PIN photodetector array
JPH02155278A (en) * 1988-12-08 1990-06-14 Ricoh Co Ltd Optically functional element
JP2889618B2 (en) * 1988-12-28 1999-05-10 株式会社リコー Array type semiconductor light emitting device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57140752U (en) * 1981-02-26 1982-09-03
JPS59151459U (en) * 1983-03-28 1984-10-11 オムロン株式会社 Light emitting light receiving element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07190082A (en) * 1993-07-15 1995-07-28 Ath Albarus Transmissoes Homocineticas Ltda Sealing device used for constant-velocity joint

Also Published As

Publication number Publication date
JPS6085579A (en) 1985-05-15

Similar Documents

Publication Publication Date Title
JP2002314118A (en) Photodetector
JPH0542837B2 (en)
JPH04111478A (en) Light-receiving element
JP2001177143A (en) Semiconductor photodetector and method of manufacturing the same
JPS6244709B2 (en)
JPH04342174A (en) Semiconductor photoelectric receiving element
US6589848B1 (en) Photodetector device and method for manufacturing the same
JPH09223805A (en) Semiconductor waveguide type light receiver
JPS59149070A (en) Photodetector
JPH0316275A (en) Manufacture of semiconductor photodetector
JP4601129B2 (en) Semiconductor light receiving element manufacturing method
JPH0373576A (en) Semiconductor photodetector
JP2711055B2 (en) Semiconductor photodetector and method of manufacturing the same
JPS59136981A (en) Semiconductor photo detector
JPS59232470A (en) Semiconductor light receiving element
JP2991555B2 (en) Semiconductor light receiving element
JP2638445B2 (en) Semiconductor light receiving element
JPS63187671A (en) 1.3mum-range semiconductor photodetector
JPS61204988A (en) Semiconductor light receiving element
JPH01257378A (en) Semiconductor photodetector
JPH0382085A (en) Semiconductor photodetector and manufacture thereof
JPH01162382A (en) Semiconductor photodetector
JPH01205478A (en) Photodetector
JPS6244710B2 (en)
JP2995751B2 (en) Semiconductor light receiving element

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees