JPH0538936U - Assembly board - Google Patents

Assembly board

Info

Publication number
JPH0538936U
JPH0538936U JP9540891U JP9540891U JPH0538936U JP H0538936 U JPH0538936 U JP H0538936U JP 9540891 U JP9540891 U JP 9540891U JP 9540891 U JP9540891 U JP 9540891U JP H0538936 U JPH0538936 U JP H0538936U
Authority
JP
Japan
Prior art keywords
substrate
connecting portion
board
collective
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9540891U
Other languages
Japanese (ja)
Other versions
JP2552354Y2 (en
Inventor
茂康 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP9540891U priority Critical patent/JP2552354Y2/en
Publication of JPH0538936U publication Critical patent/JPH0538936U/en
Application granted granted Critical
Publication of JP2552354Y2 publication Critical patent/JP2552354Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】 【目的】 基板接続部を切断してもその周囲の基盤部や
チップ部品にストレスを与えない構造の集合基板の提供
を目的とする。 【構成】 チップ部品を実装するための複数枚の単一基
板を12A,12B,12C有し、これらの単一基板の
境界を分離用孔14と基板接続部20とを交互に配設し
て構成した集合基板10であって、前記基板接続部20
の近傍に該基板接続部の切断時に発生するストレスを緩
和する孔16,16Iを設けるよう構成する。
(57) [Abstract] [Purpose] An object of the present invention is to provide a collective substrate having a structure in which stress is not exerted on the surrounding base portion and chip components even when the substrate connecting portion is cut. [Structure] A plurality of single substrates 12A, 12B, 12C for mounting chip parts are provided, and the separation holes 14 and the substrate connecting portions 20 are alternately arranged at the boundaries of these single substrates. The assembled substrate 10 configured as above, wherein the substrate connecting portion 20 is provided.
The holes 16 and 16I for relieving the stress generated at the time of cutting the substrate connecting portion are provided in the vicinity of.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案はチップ部品を実装するための単一基板を複数枚有し、これらの単一基 板の境界を、所謂、ミシン目の様に分離用孔と基板接続部とを交互に配設して構 成した集合基板に関する。 The present invention has a plurality of single substrates for mounting chip parts, and the boundaries of these single substrates are provided with alternate separation holes and substrate connecting portions like so-called perforations. Related to the assembled substrate.

【0002】[0002]

【従来の技術】[Prior Art]

チップ部品を実装する基板は、その実装効率を向上させるために、一般にミシ ン目の様に分離用孔と基板接続部とを交互に配設して構成した境界によって囲ま れた単一基板を複数枚有した集合基板としている。従って、各種チップ部品を実 装後に上記各基板接続部を切断して、各単一基板に分離させている。 In order to improve the mounting efficiency of the chip components, a single substrate surrounded by a boundary composed of alternating holes for separation and substrate connecting portions is generally used to improve the mounting efficiency. It is a collective substrate having a plurality of sheets. Therefore, after mounting various chip parts, the above-mentioned board connecting portions are cut to separate them into single boards.

【0003】 図6を用いてこのことを説明する。集合基板50には、長孔から成る分離用孔 54と基板接続部60とを交互に配設してその境界とした二枚の単一基板52A ,52Bが用意されている。 この基板接続部60の近傍部分Aを拡大図示したものが図7である。各チップ 部品を実装後各単一基板を分離させるためには基板接続部60をニッパー等によ って切断しなければならない。このニッパー62による切断の様子を示したもの が図8と図9である。図8は図7の矢視線B−Bにより、図9は図7の矢視線C −Cによる断面図である。This will be described with reference to FIG. The collective substrate 50 is provided with two single substrates 52A and 52B, which are boundaries of the separating holes 54 and the substrate connecting portions 60, which are long holes. FIG. 7 is an enlarged view of a portion A near the board connecting portion 60. In order to separate each single board after mounting each chip component, the board connecting portion 60 must be cut by a nipper or the like. FIGS. 8 and 9 show how the cutting is performed by the nippers 62. 8 is a sectional view taken along the line BB of FIG. 7, and FIG. 9 is a sectional view taken along the line C-C of FIG. 7.

【0004】[0004]

【考案が解決しようとする課題】[Problems to be solved by the device]

然しながら、ニッパー62によって各基板接続部60を切断すると、ニッパー の刃の厚みのためにその周辺領域にストレスが作用し、その結果基板接続部60 の近傍に実装されているチップ部品58にクラック58Aが発生したり、チップ 部品実装に使用されている半田にクラックが生じたりする。従って、基板接続部 の近くにはチップ部品を配置することができず、基板の設計上において大きな制 約となっていた。このことを図6でいうと、斜線で示す各領域53は有効に使用 できないこととなる。 However, when each board connecting portion 60 is cut by the nippers 62, stress acts on the peripheral area due to the thickness of the blade of the nipper, and as a result, the crack 58A is generated in the chip component 58 mounted in the vicinity of the board connecting portion 60. May occur or cracks may occur in the solder used to mount the chip components. Therefore, it is not possible to place chip components near the board connection part, which is a large constraint on the board design. This means that the hatched areas 53 cannot be used effectively.

【0005】 この切断時に発生するクラックの防止ではないが、基板にチップ部品を実装し たり、半田リフローする工程において当該基板が変形したり、破損することを防 止するために当該基板には補助用分割基板部を設けることがあり、特公平1─4 9031号公報にこのことが開示されている。そしてこの公報には、前記補助用 分割基板部をミシン目状に打抜き成形する際に、当該ミシン目部にクラックが発 生することを防止するため捨て孔10を形成している。この捨て孔が、以下に述 べる本発明のストレスを緩和する孔と一見同じ様に見える。Although it does not prevent the cracks that occur during cutting, it does not prevent the board from being deformed or damaged in the process of mounting chip components on the board or in the process of solder reflow. There may be a case where a divided substrate portion is provided, which is disclosed in Japanese Patent Publication No. 1-49031. Then, in this publication, when the auxiliary divided substrate portion is punched and formed in a perforated shape, a waste hole 10 is formed in order to prevent a crack from being generated in the perforated portion. The abandoned holes seem to be similar to the stress-relieving holes of the present invention described below.

【0006】 しかしこの公報の捨て孔は、補助用分割基板部をミシン目状に打抜き成形する 際に同時に打抜き成形されると共に、その打抜きに使用された金型のポンチがこ の捨て孔に入って補助用分割基板部を保持、固定する作用によってミシン目部の 割れを防止するものであり、本発明のようにミシン目部を切り取る際のストレス の低減のための孔ではない。また、公報の捨て孔はスリット8,8′によって囲 まれた補助用分割基板部を対象としていることも本発明の場合と異なり、更に大 きな相違点は、上述した捨て孔10の目的から、当該捨て孔10はミシン目部の 孔9の近くには形成することができないが、本発明の孔は、基板接続部の近傍に 設けることによって初めてその切断時のストレスを低減することができるという 孔の形成場所の相違である。However, the waste hole of this publication is punched at the same time when the auxiliary split substrate portion is punched into a perforated shape, and the punch of the die used for the punching enters the waste hole. The function of holding and fixing the auxiliary split substrate portion is to prevent the perforation from cracking, and is not a hole for reducing stress when cutting out the perforation as in the present invention. Further, unlike the case of the present invention, the waste hole in the publication is directed to the auxiliary divided substrate portion surrounded by the slits 8 and 8 ', and a larger difference is from the purpose of the waste hole 10 described above. Although the discard hole 10 cannot be formed near the perforation hole 9, the hole of the present invention can reduce the stress at the time of cutting only when the hole is provided near the board connecting portion. That is the difference in the place where the holes are formed.

【0007】 よって本考案は、基板接続部を切断してもその周囲の基板部やチップ部品にス トレスを与えない構造の集合基板の提供を目的とする。Therefore, an object of the present invention is to provide a collective substrate having a structure that does not give stress to the surrounding substrate portion and chip components even when the substrate connecting portion is cut.

【0008】[0008]

【課題を解決するための手段】[Means for Solving the Problems]

上記目的に鑑みて本考案は、チップ部品を実装するための複数枚の単一基板を 有し、これらの単一基板の境界を分離用孔と基板接続部とを交互に配設して構成 した集合基板であって、前記基板接続部の近傍に該基板接続部の切断時に発生す るストレスを緩和する孔を設けたことを特徴とする集合基板を提供する。 In view of the above object, the present invention has a plurality of single substrates for mounting chip parts, and the boundaries of these single substrates are configured by alternately arranging separation holes and substrate connecting portions. An aggregate substrate, characterized in that a hole is provided near the substrate connecting portion to alleviate stress generated when the substrate connecting portion is cut.

【0009】[0009]

【作用】[Action]

ニッパーによって基板接続部を切断すると、そのニッパーの刃の厚みのために その周囲にストレスが発生するが、基板接続部の近傍に孔を設けたことによって そのストレスを吸収、緩和する。 When the substrate connecting portion is cut by the nipper, stress is generated around the blade due to the thickness of the blade of the nipper, but the stress is absorbed and alleviated by providing the hole near the substrate connecting portion.

【0010】[0010]

【実施例】【Example】

以下、本考案を添付図面に示す実施例に基づき、更に詳細に説明する。 図1は本考案に係るチップ部品を実装するための集合基板10を示している。 この集合基板10は、各単一基板を分離させるための長孔14と、それらの間に 配置された基板接続部20とによって囲まれた三枚の単一基板12A,12B, 12Cを有している。これらの各単一基板の各基板接続部20の近傍には丸孔1 6又は16Iを設けている。丸孔16は各単一基板の境界の外側位置に形成され ており、丸孔16Iは内側位置に形成されたものを示す。これらの丸孔は基板接 続部20の近傍であればよく、特にその内外は問わない。単一基板配置のスペー スの関係上、外側になったり内側になったりするのである。 Hereinafter, the present invention will be described in more detail with reference to the embodiments shown in the accompanying drawings. FIG. 1 shows a collective substrate 10 for mounting a chip component according to the present invention. This collective substrate 10 has three single substrates 12A, 12B, 12C surrounded by a long hole 14 for separating each single substrate and a substrate connecting portion 20 arranged between them. ing. Round holes 16 or 16I are provided in the vicinity of each board connecting portion 20 of each of these single boards. The round holes 16 are formed outside the boundary of each single substrate, and the round holes 16I are formed inside. These round holes may be provided in the vicinity of the substrate connecting portion 20, and may be inside or outside thereof. Due to the space of the single board layout, it can be outside or inside.

【0011】 図2は単一基板12Aの一つの基板接続部20の近傍を拡大図示したものであ るが、丸孔16は単一基板12Aの外側に設けてある。他の変形例として長孔1 6Lを単一基板12Aの外側に設け、また他の変形例として丸孔16Iを単一基 板12Aの内側に設けている。FIG. 2 is an enlarged view showing the vicinity of one substrate connecting portion 20 of the single substrate 12A, but the round hole 16 is provided outside the single substrate 12A. As another modification, the long hole 16L is provided outside the single substrate 12A, and as another modification, a round hole 16I is provided inside the single substrate 12A.

【0012】 次に、本考案の効果を図3から図5を参照しながら説明する。 図3は幅が1mmであって互いの間隔が図示の通り2.5mmである長孔14 間の基板接続部20の近傍にストレス緩和用の孔を設けていない従来の集合基板 を示している。この基板接続部20をニッパーによって切断する際のストレスに よる歪を、基板接続部20から2mm離れた測定点MP1において測定した。Next, the effect of the present invention will be described with reference to FIGS. 3 to 5. FIG. 3 shows a conventional collective substrate having no holes for stress relaxation in the vicinity of the substrate connecting portion 20 between the elongated holes 14 having a width of 1 mm and a distance between them of 2.5 mm as shown. .. The strain due to the stress when the substrate connecting portion 20 was cut with a nipper was measured at a measurement point MP1 2 mm away from the substrate connecting portion 20.

【0013】 また、図4は上記図3の集合基板に対して、基板接続部20から2mm離れた 図示の位置に直径が2mmの丸孔16を形成した本考案に係る集合基板を示して いる。この基板接続部20をニッパーによって切断する際のストレスによる歪を 、図3の場合と同じ位置である基板接続部20から2mm離れた測定点MP2に おいて測定した。FIG. 4 shows a collective board according to the present invention in which a round hole 16 having a diameter of 2 mm is formed at a position 2 mm apart from the board connecting portion 20 with respect to the collective board of FIG. 3 described above. .. The strain due to the stress when the substrate connecting portion 20 was cut with a nipper was measured at the measurement point MP2, which is the same position as in FIG. 3 and 2 mm away from the substrate connecting portion 20.

【0014】 上記の各歪測定において、基板接続部20の切断に使用するニッパーの厚さ寸 法を二種類用い、それぞれのニッパーによる切断ストレスに対する歪の測定を行 っている。図5に示すように二種類のニッパーの刃先角度θは同じであるが、厚 さ寸法は異なり、一方は0.9mm、他方は0.5mmである。In each of the above strain measurements, two types of thickness measurements of the nippers used for cutting the substrate connecting portion 20 are used, and the strains due to the cutting stress by the respective nippers are measured. As shown in FIG. 5, the cutting edge angles θ of the two types of nippers are the same, but the thickness dimensions are different, one being 0.9 mm and the other being 0.5 mm.

【0015】 図5の測定データD1とD2は、共に切断対象が図3に示す従来の集合基板で あり、それぞれ厚さ寸法が0.9mmのニッパーによる切断、厚さ寸法が0.5 mmのニッパーによる切断に対する測定点MP1の圧縮歪である。また、測定デ ータD3とD4は、共に切断対象が図4に示す本発明の集合基板であり、それぞ れ厚さ寸法が0.9mmのニッパーによる切断、厚さ寸法が0.5mmのニッパ ーによる切断に対する測定点MP2の圧縮歪である。また丸印M1,M2,M3 ,M4はそれぞれ各データの平均値を示している。In the measurement data D1 and D2 of FIG. 5, the cutting target is the conventional collective substrate shown in FIG. 3, and the cutting is performed with a nipper having a thickness of 0.9 mm and a thickness of 0.5 mm. It is the compressive strain of the measurement point MP1 with respect to the cutting by the nipper. Further, both of the measurement data D3 and D4 are the collective substrate of the present invention shown in FIG. 4 whose cutting target is the cutting with the nipper having the thickness of 0.9 mm and the thickness of 0.5 mm. It is the compressive strain of the measurement point MP2 with respect to the cutting by the nipper. The circles M1, M2, M3 and M4 indicate the average value of each data.

【0016】 これらの測定結果、平均値データM1とM2とを比較すると、ニッパーの薄い 方が歪が小さいことがわかる。また、他の平均値データM3とM4とを比較して も同様のことがいえる。更に、平均値データM1とM3、または平均値データM 2とM4とを比較すると、従来の集合基板よりも本考案に係る集合基板の方が発 生する圧縮歪が低減されることが分かる。この実験では歪が約4割低減されてい る。From the results of these measurements, comparing the average value data M1 and M2, it can be seen that the thinner the nipper, the smaller the strain. The same thing can be said when the other average value data M3 and M4 are compared. Further, by comparing the average value data M1 and M3 or the average value data M2 and M4, it can be seen that the compressive strain generated in the aggregate substrate according to the present invention is reduced as compared with the conventional aggregate substrate. In this experiment, the strain is reduced by about 40%.

【0017】 図4に示す様に、切断に伴う応力や歪を低減させるための孔16は基板接続部 20の近傍に設けることが望ましいが、この孔をあまり近づけると集合基板を製 造する際に基板にクラックが入るため、図の寸法Lを基板の板厚以上に設計する ことが望ましい。As shown in FIG. 4, it is desirable to provide a hole 16 for reducing stress and strain associated with cutting in the vicinity of the board connecting portion 20, but if this hole is made too close to it, a collective substrate is manufactured. Since the substrate is cracked, it is desirable to design the dimension L in the figure to be equal to or larger than the thickness of the substrate.

【0018】[0018]

【考案の効果】[Effect of the device]

以上の説明から明らかなように本考案によれば、基板接続部をニッパーによっ て切断する際に生ずる歪を、前記基板接続部の近傍に設けた孔によって緩和する ことができる。従って、基板接続部の近傍が破損することがなく、そこへチップ 部品の配置ができ、基板を有効に使用した設計が可能となり、高密度実装も可能 となる。また、ニッパーの厚さを厚くしても基板接続部の切断に際してのストレ スが緩和されるので、ニッパーの耐久性を向上させることができる。 As is clear from the above description, according to the present invention, the strain generated when the substrate connecting portion is cut by the nipper can be alleviated by the hole provided in the vicinity of the substrate connecting portion. Therefore, the vicinity of the board connecting portion is not damaged, chip parts can be arranged there, and the board can be effectively used for designing, and high-density mounting is also possible. Further, even if the thickness of the nipper is increased, the stress at the time of cutting the substrate connecting portion is alleviated, so that the durability of the nipper can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】図1は本考案に係る集合基板の平面図である。FIG. 1 is a plan view of a collective substrate according to the present invention.

【図2】図2は本考案に係る集合基板の基板接続部近傍
の拡大図である。
FIG. 2 is an enlarged view of the vicinity of a board connecting portion of the collective board according to the present invention.

【図3】図3は従来の集合基板の基板接続部近傍の拡大
図であり、図5の実験の対象を示す図である。
FIG. 3 is an enlarged view of the vicinity of a board connecting portion of a conventional collective board, and is a view showing a target of the experiment of FIG.

【図4】図4は本考案に係る集合基板の基板接続部近傍
の拡大図であり、図5の実験の対象を示す図である。
FIG. 4 is an enlarged view of the vicinity of the board connecting portion of the collective board according to the present invention, showing the object of the experiment of FIG.

【図5】図5は本考案に係る集合基板の効果を説明する
ためのグラフである。
FIG. 5 is a graph for explaining the effect of the collective substrate according to the present invention.

【図6】図6は従来の集合基板の平面図である。FIG. 6 is a plan view of a conventional collective substrate.

【図7】図7は図6のA部の拡大図である。FIG. 7 is an enlarged view of part A of FIG.

【図8】図8は図7の基板接続部のニッパーによる切断
時の矢視線B─Bによる断面図である。
8 is a cross-sectional view taken along the line BB of FIG. 7 when cutting the board connecting portion with a nipper.

【図9】図9は図7の基板接続部のニッパーによる切断
時の矢視線C−Cによる断面図である。
9 is a cross-sectional view taken along the line C-C of FIG. 7 when cutting the board connecting portion with a nipper.

【符号の説明】[Explanation of symbols]

10 集合基板 12A,12B,12C 単一基板 14 分離用孔 16,16I ストレス緩和用孔 18 チップ部品 20 基板接続部 10 Aggregate substrate 12A, 12B, 12C Single substrate 14 Separation hole 16, 16I Stress relaxation hole 18 Chip component 20 Board connection part

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 チップ部品を実装するための複数枚の単
一基板を有し、これらの単一基板の境界を分離用孔と基
板接続部とを交互に配設して構成した集合基板であっ
て、前記基板接続部の近傍に該基板接続部の切断時に発
生するストレスを緩和する孔を設けたことを特徴とする
集合基板。
1. A collective board having a plurality of single boards for mounting chip parts, wherein boundaries of these single boards are constituted by alternately arranging separation holes and board connecting portions. A collective substrate, characterized in that a hole is provided near the substrate connecting portion to reduce stress generated when the substrate connecting portion is cut.
JP9540891U 1991-10-24 1991-10-24 Assembly board Expired - Fee Related JP2552354Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9540891U JP2552354Y2 (en) 1991-10-24 1991-10-24 Assembly board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9540891U JP2552354Y2 (en) 1991-10-24 1991-10-24 Assembly board

Publications (2)

Publication Number Publication Date
JPH0538936U true JPH0538936U (en) 1993-05-25
JP2552354Y2 JP2552354Y2 (en) 1997-10-29

Family

ID=14136854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9540891U Expired - Fee Related JP2552354Y2 (en) 1991-10-24 1991-10-24 Assembly board

Country Status (1)

Country Link
JP (1) JP2552354Y2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008053633A (en) * 2006-08-28 2008-03-06 Mitsubishi Electric Corp Printed wiring board and dividing method
JP2008135475A (en) * 2006-11-27 2008-06-12 Matsushita Electric Works Ltd Metal printed circuit board
JP2011243878A (en) * 2010-05-20 2011-12-01 Panasonic Electric Works Co Ltd Aggregate substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008053633A (en) * 2006-08-28 2008-03-06 Mitsubishi Electric Corp Printed wiring board and dividing method
JP2008135475A (en) * 2006-11-27 2008-06-12 Matsushita Electric Works Ltd Metal printed circuit board
JP2011243878A (en) * 2010-05-20 2011-12-01 Panasonic Electric Works Co Ltd Aggregate substrate

Also Published As

Publication number Publication date
JP2552354Y2 (en) 1997-10-29

Similar Documents

Publication Publication Date Title
JP3676192B2 (en) Punching method for continuously variable transmission belt elements
WO2020189526A1 (en) Nitride ceramic substrate production method and nitride ceramic base material
JPH0538936U (en) Assembly board
US9942995B2 (en) Method for producing a metal core substrate having improved edge insulating properties
JP2681144B2 (en) Lead frame for semiconductor device
JPH10156823A (en) Ceramic base having division grooves and resistor using the same
JP2552354Z (en)
JP2017154160A (en) Piercing processing method
US20030170481A1 (en) Method for production and/or processing of plug parts in follow-on composite tools
JP2004154839A (en) Metallic member with bent flange and processing metal die structure thereof
JPS6236313Y2 (en)
JP2019043010A (en) End material separation method
JP6163085B2 (en) Pallet for parts alignment and manufacturing method thereof
JP2007165404A (en) Electronic equipment
JPH02230787A (en) Printed wiring board
JP3120219B2 (en) Cut-and-raise processing method
JP5003203B2 (en) Method of cutting frame and method of manufacturing semiconductor device
JPH10305325A (en) Puncher for half blanking process
JP2000084627A (en) Working method for platelike parts
JP4442964B2 (en) Ceramic substrate for electronic parts
JPH09277038A (en) Manufacture of pin fin type heat sink and the same with axial fan
JP3712520B2 (en) Manufacturing method of multilayer ceramic substrate
JP4562413B2 (en) Drilling die and method for punching ceramic green sheet using the same
JP4145718B2 (en) Manufacturing method of metal plate members
JP3131228B2 (en) Ballast case manufacturing method

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees