JPH0536875A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH0536875A JPH0536875A JP19302691A JP19302691A JPH0536875A JP H0536875 A JPH0536875 A JP H0536875A JP 19302691 A JP19302691 A JP 19302691A JP 19302691 A JP19302691 A JP 19302691A JP H0536875 A JPH0536875 A JP H0536875A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- semiconductor device
- soldered
- piece
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ハイブリッド集積回路
等の半導体装置及び該装置の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a hybrid integrated circuit and a method of manufacturing the device.
【０００２】[0002]
【従来の技術】図１は従来の半導体装置を示す断面構造
図であり、図中３はＡｌヒートシンクである。Ａｌヒー
トシンク３上にはメタライズ基板２がはんだ（４）付け
されており、メタライズ基板２上には銅ヒートシンク６
がはんだ（４）付けされている。メタライズ基板２は、
銅ヒートシンク６とＡｌヒートシンク３とを電気的に分
離するために設けられている。銅ヒートシンク６上には
凹所が２箇所設けられており、該凹所にパワートランジ
スタ１及びＡｌ片９が夫々はんだ（４）付けされてい
る。パワートランジスタ１の上面に設けられたエミッタ
及びベース（図示せず）はＡｌ線８，８により外部の回
路と接続されており、パワートランジスタ１の下面に設
けられたコレクタは銅ヒートシンク６及びＡｌ片９を経
由してＡｌ線８により外部の回路と接続されている。従
来の半導体装置は以上の如く構成されており、パワート
ランジスタ１が発する熱は、銅ヒートシンク６及びＡｌ
ヒートシンク３により外部に放出される。2. Description of the Related Art FIG. 1 is a cross-sectional structural view showing a conventional semiconductor device, and 3 in the drawing is an Al heat sink. The metallized substrate 2 is soldered (4) on the Al heatsink 3, and the copper heatsink 6 is placed on the metallized substrate 2.
Is soldered (4). The metallized substrate 2 is
It is provided to electrically separate the copper heat sink 6 and the Al heat sink 3. Two recesses are provided on the copper heat sink 6, and the power transistor 1 and the Al piece 9 are soldered (4) to the recesses. The emitter and base (not shown) provided on the upper surface of the power transistor 1 are connected to an external circuit by Al wires 8 and 8, and the collector provided on the lower surface of the power transistor 1 is a copper heat sink 6 and an Al piece. It is connected to an external circuit by an Al wire 8 via 9. The conventional semiconductor device is configured as described above, and the heat generated by the power transistor 1 is generated by the copper heat sink 6 and the Al.
It is released to the outside by the heat sink 3.
【０００３】[0003]
【発明が解決しようとする課題】パワートランジスタ１
のエミッタ、ベース及びＡｌ片９と外部の回路とは超音
波ワイヤボンディングにより接続されるが、図２に示し
た如くＡｌ片９が銅ヒートシンク６の凹所底面に対して
傾斜していると、超音波の振動がＡｌ片９に垂直に伝達
できず、接着強度が小さくなるという問題があった。従
ってはんだ付け後にＡｌ片９が傾いている場合は、不良
品と判断されていた。またＡｌ片９が傾斜することなく
はんだ付けされた場合でもＡｌ片９のはんだ付けの位置
がずれていることがあり、この場合には自動機でワイヤ
ボンドするときにワイヤボンディングエリアから外れ、
ワイヤボンドできなくなることがあった。このようにＡ
ｌ片９を銅ヒートシンク６上にはんだ付けする作業は困
難であり、手間を要した。Power transistor 1
Although the emitter, the base, and the Al piece 9 are connected to the external circuit by ultrasonic wire bonding, if the Al piece 9 is inclined with respect to the bottom surface of the recess of the copper heat sink 6 as shown in FIG. There is a problem that ultrasonic vibration cannot be transmitted vertically to the Al piece 9 and the adhesive strength is reduced. Therefore, if the Al piece 9 was tilted after soldering, it was determined to be a defective product. Further, even if the Al piece 9 is soldered without being inclined, the position of soldering the Al piece 9 may be misaligned. In this case, when the wire is bonded by an automatic machine, it is removed from the wire bonding area,
Sometimes it was not possible to wire bond. Like this
The work of soldering the 1-piece 9 onto the copper heat sink 6 is difficult and time-consuming.
【０００４】本発明は斯かる事情に鑑みなされたもので
あり、Ａｌ以外の材料からなるヒートシンクに半導体チ
ップを嵌め込む孔を設けるべきＡｌ板を貼設することに
より、不良品の発生率を低減させ、工数を低減させて製
造コストを低減させる半導体装置及び該装置の製造方法
を提供することを目的とする。The present invention has been made in view of such circumstances, and reduces the occurrence rate of defective products by pasting an Al plate on which a hole for fitting a semiconductor chip is provided in a heat sink made of a material other than Al. It is an object of the present invention to provide a semiconductor device and a method for manufacturing the device, which reduce the number of steps and the manufacturing cost.
【０００５】[0005]
【課題を解決するための手段】本発明は、Ａｌ以外の材
料からなるヒートシンクに半導体チップを嵌め込む孔を
設けるべきＡｌ板を貼設させたものである。According to the present invention, an Al plate is provided on a heat sink made of a material other than Al for forming a hole into which a semiconductor chip is fitted.
【０００６】[0006]
【作用】本発明においては、ヒートシンクにワイヤボン
ディングを行うためのＡｌ片を必要としないので、Ａｌ
片が原因で生じていた不良がなくなり、製品の不良発生
率が低減する。また、Ａｌ片をはんだ付けするコストが
削減される。In the present invention, since the Al piece for wire bonding to the heat sink is not required,
The defects caused by the pieces are eliminated, and the defect occurrence rate of the product is reduced. Also, the cost of soldering the Al pieces is reduced.
【０００７】[0007]
【実施例】以下、本発明をその実施例を示す図面に基づ
き具体的に説明する。図３は本発明に係る半導体装置の
平面図であり、図４はその断面構造図である。図中３は
Ａｌヒートシンクである。Ａｌヒートシンク３上にはメ
タライズ基板２がはんだ（４）付けされており、メタラ
イズ基板２上にはＡｌクラッド７がはんだ（４）付けさ
れている。Ａｌクラッド７は、銅からなる母材６の上に
Ａｌ板５がクラッドされてなるものであり、母材６がヒ
ートシンクの機能を果たす。Ａｌクラッド７は、Ａｌ板
５を上にしてメタライズ基板２上にはんだ付けされてい
る。メタライズ基板２は、Ａｌクラッド７とＡｌヒート
シンク３とを電気的に分離するために設けられている。
Ａｌクラッド７のＡｌ板５にはパワートランジスタ１よ
りやや大きい孔が設けられており、該孔にパワートラン
ジスタ１の下面に設けられたコレクタがはんだ（４）付
けされている。パワートランジスタ１の上面に設けられ
たエミッタ及びベース（図示せず）はＡｌ線８，８によ
り外部の回路と接続されており、パワートランジスタ１
の下面に設けられたコレクタは母材６を経由し、Ａｌ板
５の適宜の位置に設けられたＡｌ線８により外部の回路
と接続されている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to the drawings showing the embodiments. FIG. 3 is a plan view of a semiconductor device according to the present invention, and FIG. 4 is a sectional structural view thereof. In the figure, 3 is an Al heat sink. The metallized substrate 2 is soldered (4) on the Al heat sink 3, and the Al clad 7 is soldered (4) on the metallized substrate 2. The Al clad 7 is formed by clad an Al plate 5 on a base material 6 made of copper, and the base material 6 functions as a heat sink. The Al clad 7 is soldered on the metallized substrate 2 with the Al plate 5 facing up. The metallized substrate 2 is provided to electrically separate the Al clad 7 and the Al heat sink 3.
The Al plate 5 of the Al clad 7 is provided with a hole slightly larger than the power transistor 1, and the collector provided on the lower surface of the power transistor 1 is soldered (4) to the hole. The emitter and base (not shown) provided on the upper surface of the power transistor 1 are connected to an external circuit by Al wires 8 and 8.
The collector provided on the lower surface of is connected via a base material 6 to an external circuit by an Al wire 8 provided at an appropriate position on the Al plate 5.
【０００８】次に本発明の半導体装置の製造方法につい
て説明する。まず、Ａｌヒートシンク３上にメタライズ
基板２をはんだ（４）付けする。このメタライズ基板２
上にＡｌクラッド７をそのＡｌ板５を上にしてはんだ
（４）付けする。パターンエッチングによりＡｌクラッ
ド７上部のＡｌ板５にパワートランジスタ１を嵌め込む
べき孔を設ける。該孔にパワートランジスタ１のコレク
タをはんだ（４）付けする。そして超音波ワイヤボンデ
ィング方法によってパワートランジスタ１の上面に設け
られたエミッタ及びベースと外部の回路とをＡｌ線８，
８で接続し、Ａｌ板５の適宜の位置にＡｌ線８を接続し
てパワートランジスタ１の下面に設けられたコレクタと
外部の回路とを接続する。Next, a method of manufacturing the semiconductor device of the present invention will be described. First, the metallized substrate 2 is soldered (4) on the Al heat sink 3. This metallized substrate 2
The Al clad 7 is soldered (4) with the Al plate 5 facing upward. A hole for fitting the power transistor 1 is formed in the Al plate 5 on the Al clad 7 by pattern etching. The collector of the power transistor 1 is soldered (4) to the hole. Then, the emitter and the base provided on the upper surface of the power transistor 1 and the external circuit are connected to the Al wire 8 by the ultrasonic wire bonding method.
8 and the Al wire 8 is connected to an appropriate position of the Al plate 5 to connect the collector provided on the lower surface of the power transistor 1 to an external circuit.
【０００９】本発明の半導体装置は上述の如く構成され
ており、従来装置のようにヒートシンク上にＡｌ片を設
置する必要がないのでＡｌ片の設置位置及び設置角度に
起因するワイヤボンディングの不良がなくなる。なお、
本発明の実施例においては、半導体チップとしてパワー
トランジスタを適用した場合につき説明しているが何ら
これに限定されるものではなく、他の半導体チップに適
用し得ることは言うまでもない。そして、本発明の実施
例においては、Ａｌクラッドの母材として銅を使用した
場合につき説明しているが何らこれに限定されるもので
はなく、他の金属でもよい。The semiconductor device of the present invention is configured as described above, and unlike the conventional device, it is not necessary to install the Al piece on the heat sink, so that the wire bonding failure due to the installation position and the installation angle of the Al piece may occur. Disappear. In addition,
In the embodiment of the present invention, the case where the power transistor is applied as the semiconductor chip has been described, but the present invention is not limited to this, and it goes without saying that the present invention can be applied to other semiconductor chips. In the embodiment of the present invention, the case where copper is used as the base material of the Al clad has been described, but the present invention is not limited to this, and other metals may be used.
【００１０】[0010]
【発明の効果】以上の如く本発明においては、Ａｌ以外
からなるヒートシンクに半導体チップを嵌め込む孔を設
けるべきＡｌ板を貼設しているので、ヒートシンクにＡ
ｌ片を設置する必要がなく、不良品の発生率を低減さ
せ、製造コストを低減させることができる。そしてワイ
ヤボンディングによる他の回路への接続の信頼性が向上
する等、本発明は優れた効果を奏するものである。As described above, according to the present invention, the heat sink made of a material other than Al is pasted with an Al plate having a hole into which a semiconductor chip is fitted.
Since it is not necessary to install a single piece, it is possible to reduce the occurrence rate of defective products and reduce the manufacturing cost. The present invention has excellent effects such as improvement in reliability of connection to other circuits by wire bonding.
【図１】従来の半導体装置を示す断面構造図である。FIG. 1 is a cross-sectional structure diagram showing a conventional semiconductor device.
【図２】従来の半導体装置でＡｌ片が傾いた場合を示す
断面構造図である。FIG. 2 is a sectional structural view showing a case where an Al piece is tilted in a conventional semiconductor device.
【図３】本発明に係る半導体装置を示す平面図である。FIG. 3 is a plan view showing a semiconductor device according to the present invention.
【図４】本発明に係る半導体装置を示す断面構造図であ
る。FIG. 4 is a sectional structural view showing a semiconductor device according to the present invention.
１ パワートランジスタ ２ メタライズ基板 ３ Ａｌヒートシンク ４ はんだ ５ Ａｌ板 ６ 母材 ７ Ａｌクラッド ８ Ａｌ線 1 power transistor 2 Metallized substrate 3 Al heat sink 4 solder 5 Al plate 6 Base material 7 Al clad 8 Al wire
Claims (2)
に半導体チップが装着されている半導体装置において、
前記ヒートシンクに前記半導体チップを嵌め込む孔を設
けるべきＡｌ板が貼設されており、該Ａｌ板がＡｌ線に
より外部の回路と接続されていることを特徴とする半導
体装置。1. A semiconductor device in which a semiconductor chip is mounted on a heat sink made of a material other than Al,
A semiconductor device, wherein an Al plate for forming a hole into which the semiconductor chip is fitted is attached to the heat sink, and the Al plate is connected to an external circuit by an Al wire.
に半導体チップを装着する半導体装置の製造方法におい
て、ヒートシンクに貼設したＡｌ板に前記半導体チップ
を嵌め込む孔を設け、該Ａｌ板をＡｌ線により外部の回
路と接続することを特徴とする半導体装置の製造方法。2. In a method of manufacturing a semiconductor device, wherein a semiconductor chip is mounted on a heat sink made of a material other than Al, an Al plate attached to the heat sink is provided with a hole into which the semiconductor chip is fitted, and the Al plate is an Al wire. A method for manufacturing a semiconductor device, characterized in that the semiconductor device is connected to an external circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19302691A JPH0536875A (en) | 1991-08-01 | 1991-08-01 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19302691A JPH0536875A (en) | 1991-08-01 | 1991-08-01 | Semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0536875A true JPH0536875A (en) | 1993-02-12 |
Family
ID=16300942
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19302691A Pending JPH0536875A (en) | 1991-08-01 | 1991-08-01 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0536875A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009200525A (en) * | 2009-05-29 | 2009-09-03 | Mitsubishi Electric Corp | Semiconductor apparatus |
-
1991
- 1991-08-01 JP JP19302691A patent/JPH0536875A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009200525A (en) * | 2009-05-29 | 2009-09-03 | Mitsubishi Electric Corp | Semiconductor apparatus |
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