JPH0535574B2 - - Google Patents
Info
- Publication number
- JPH0535574B2 JPH0535574B2 JP60256364A JP25636485A JPH0535574B2 JP H0535574 B2 JPH0535574 B2 JP H0535574B2 JP 60256364 A JP60256364 A JP 60256364A JP 25636485 A JP25636485 A JP 25636485A JP H0535574 B2 JPH0535574 B2 JP H0535574B2
- Authority
- JP
- Japan
- Prior art keywords
- adhesive tape
- wafer
- film
- semiconductor wafer
- adhesive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000002390 adhesive tape Substances 0.000 claims description 24
- 239000004065 semiconductor Substances 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 9
- 235000012431 wafers Nutrition 0.000 description 21
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 6
- 238000004806 packaging method and process Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001680 brushing effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体ウエハの保管や運搬時におけ
る保護方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for protecting semiconductor wafers during storage and transportation.
半導体ウエハは、各種プロセスによる素子形成
が完了すると、チツプに分割するためのダイシン
により割れ目が形成される。そして、そのウエハ
を適当に保護した状態で保管や運搬が行なわれ
る。
When semiconductor wafers are completed with device formation through various processes, cracks are formed by dicing to divide them into chips. The wafers are then stored and transported while being appropriately protected.
この保護方法としては、ダイシング済みの半導
体ウエハ１に対して、第２図に示すように、裏面
に粘着テープ２を貼着すると共に素子形成面、つ
まり表面にも粘着テープ３を貼着して包装する方
法が採られる。 This protection method involves attaching an adhesive tape 2 to the back surface of the diced semiconductor wafer 1, as shown in FIG. 2, and also attaching an adhesive tape 3 to the element forming surface, that is, the front surface. A packaging method is used.
そして、そのウエハ１の使用に際しては、包装
の状態でローラをかけて割れ目を完全に分割して
チツプ化し、その後に表面側の粘着テープ３を剥
離し、その後に、裏面側の粘着テープ２を伸ばし
て分割したチツプをその粘着テープ２から分離さ
せていた。なお、表面側には、粘着テープ３に代
えて剥離紙が使用されることもある。 When using the wafer 1, the wafer 1 is rolled while it is packaged to completely divide the cracks into chips, and then the adhesive tape 3 on the front side is peeled off, and then the adhesive tape 2 on the back side is peeled off. The stretched and divided chips were separated from the adhesive tape 2. Note that a release paper may be used instead of the adhesive tape 3 on the front side.
ところが、この従来の包装方法では、表面側の
粘着テープ３や剥離紙の粘着剤がウエハ１の表面
に残留することががあり、それを除去する別の手
間が必要となるという欠点があつた。また、表面
の粘着テープ３や剥離紙は素子の表面全部及び他
方の粘着テープ２にまで粘着するので、その剥離
に手間がかかるという問題もあつた。 However, this conventional packaging method has the disadvantage that the adhesive from the adhesive tape 3 on the front side and the adhesive from the release paper may remain on the surface of the wafer 1, requiring additional effort to remove it. . Furthermore, since the adhesive tape 3 and the release paper on the front surface adhere to the entire surface of the element and even the other adhesive tape 2, there was a problem in that it took time and effort to peel them off.
本発明の目的は、粘着剤がウエハ表面に残留せ
ず、しかもその剥離を容易に行なうことができる
ようにした保護方法を提供することである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a protection method that does not allow adhesive to remain on the wafer surface and can be easily peeled off.
このため本発明では、半導体ウエハを、粘着テ
ープと別の粘着テープ又は剥離紙との間に挟着し
て保護するに際して、該半導体ウエハの素子形成
面を予めフイルムで被覆するようにした。
Therefore, in the present invention, when protecting a semiconductor wafer by sandwiching it between an adhesive tape and another adhesive tape or release paper, the element forming surface of the semiconductor wafer is covered with a film in advance.
以下、本発明の実施例について説明する。第１
図はその一実施例を示すものであり、第２図にお
けるものと同一のものには同一の符号を附した。
Examples of the present invention will be described below. 1st
The figure shows one embodiment, and the same parts as in FIG. 2 are given the same reference numerals.
本実施例では、半導体ウエハ１の素子形成面で
ある上面をフイルム４で完全に被覆した後に、そ
の上面に粘着テープ３を粘着するようにした。裏
面の粘着テープ２は従来と同様である。 In this embodiment, after the upper surface of the semiconductor wafer 1, which is the element forming surface, is completely covered with the film 4, the adhesive tape 3 is attached to the upper surface. The adhesive tape 2 on the back side is the same as the conventional one.
このフイルム４には、内部にカーボン等を混入
させ、導電性をもたせたものが使用される。 This film 4 has carbon or the like mixed therein to make it conductive.
以上により、半導体ウエハ１の表面は、粘着テ
ープ３がフイルム４を介して覆うようになるの
で、その粘着テープ３の剥離に際して、そのウエ
ハ１に粘着剤が残留するようなことはおこらな
い。また、剥離に際しては、下面側の粘着テープ
２に対する接着部のみを剥がせば良いので、その
剥離作業が容易となる。 As described above, the surface of the semiconductor wafer 1 is covered with the adhesive tape 3 via the film 4, so that no adhesive remains on the wafer 1 when the adhesive tape 3 is peeled off. Moreover, when peeling, it is only necessary to peel off the adhesive part to the adhesive tape 2 on the lower surface side, so the peeling operation becomes easy.
また、粘着テープ３の粘着直後の引き伸ばしの
ための刷毛かけ、或いは剥離の前段階でのウエハ
１の押し割に際し、静電気が発生してウエハ１に
形成された素子に悪い影響を及ぼすこと（特に
MOSトランジスタに対して）があるが、上記し
たようにフイルム４が導電特性を有するので、ウ
エハ１の表面がそのフイルム４によりシールドさ
れ、静電気により素子破壊が起こる恐れもない。 Furthermore, when brushing the adhesive tape 3 to stretch it immediately after adhering it, or when pushing and splitting the wafer 1 before peeling, static electricity is generated, which may have a negative effect on the elements formed on the wafer 1 (especially
However, since the film 4 has conductive properties as described above, the surface of the wafer 1 is shielded by the film 4, and there is no risk of device destruction due to static electricity.
なお、上面側の粘着テープ３は、剥離紙に代え
ることができる。 Note that the adhesive tape 3 on the upper surface side can be replaced with release paper.
以上のように、本発明によれば、予めウエハの
表面にフイルムを被覆したので、そのウエハの素
子形成面に直接粘着テープ等が接触することはな
く、粘着剤の残留問題は起こらない。また、その
粘着テープの剥離も簡単となる。更に、フイルム
を導電性の材質のものにすれば、ウエハの表面側
の粘着テープ等で発生する静電気から、ウエハの
素子をシールドすることが可能となる。
As described above, according to the present invention, since the surface of the wafer is coated with a film in advance, the adhesive tape or the like does not come into direct contact with the element forming surface of the wafer, and the problem of residual adhesive does not occur. Moreover, the adhesive tape can be easily peeled off. Furthermore, if the film is made of a conductive material, it becomes possible to shield the elements on the wafer from static electricity generated by adhesive tape or the like on the front side of the wafer.
第１図は本発明の実施例の包装保護説明のため
の断面図、第２図は従来の包装保護説明のための
断面図である。
１……半導体ウエハ、２，３……粘着テープ、
４……フイルム。
FIG. 1 is a cross-sectional view for explaining packaging protection according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view for explaining conventional packaging protection. 1... Semiconductor wafer, 2, 3... Adhesive tape,
4...Film.
Claims (1)
プ又は剥離紙との間に挟着して行なう保護方法に
おいて、 該半導体ウエハの素子形成面を予めフイルムで
被覆するようにしたことを特徴とする半導体ウエ
ハの保護方法。 ２ 上記フイルムが、導電性を有することを特徴
とする特許請求の範囲第１項記載の半導体ウエハ
の保護方法。[Claims] 1. A protection method in which a semiconductor wafer is sandwiched between an adhesive tape and another adhesive tape or a release paper, wherein the element-forming surface of the semiconductor wafer is covered with a film in advance. A method for protecting a semiconductor wafer, characterized in that: 2. The method for protecting a semiconductor wafer according to claim 1, wherein the film is electrically conductive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60256364A JPS62115840A (en) | 1985-11-15 | 1985-11-15 | Protecting method for semiconductor wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60256364A JPS62115840A (en) | 1985-11-15 | 1985-11-15 | Protecting method for semiconductor wafer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62115840A JPS62115840A (en) | 1987-05-27 |
| JPH0535574B2 true JPH0535574B2 (en) | 1993-05-26 |
Family
ID=17291654
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60256364A Granted JPS62115840A (en) | 1985-11-15 | 1985-11-15 | Protecting method for semiconductor wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62115840A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0369135A (en) * | 1989-08-08 | 1991-03-25 | Nec Kyushu Ltd | Adhesive sheet for semiconductor device manufacturing use |
-
1985
- 1985-11-15 JP JP60256364A patent/JPS62115840A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62115840A (en) | 1987-05-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |