JPH05346869A - Digital computer system - Google Patents

Abstract

PURPOSE:To provide the computer system which can monitor the operation of a processor without imposing a burden on a software, and without exerting influence on the operation of the processor itself. CONSTITUTION:In addition to an instruction fetch unit IFU, a sequencer SEQ, an operation unit OU, an internal register unit IRU and an external interface EXT-I/F, constituted as processors of the computer system, a diagnostic interface DIAG-I/F connected directly to an internal bus of the processor is added as a part of the processor. In order to control this diagnostic interface DIAG-I/F from the outside of the processor, a user terminal UT is provided. Since the diagnostic interface DIAG-I/F is connected to internal data buses D1-D4, no influence is exerted on the operation of the operation unit OU, etc., and debug for flowing through the internal data bus D2 is read as a result of the operation unit OU, and outputted to the user terminal UT.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital computer system, and in particular, it directly monitors or directly diagnoses the movement of a processor in the digital computer system in response to a command from the outside so that it can be externally provided to the digital computer system. The present invention relates to a digital computer system capable of outputting.

[0002]

2. Description of the Related Art Monitoring or diagnosing the operation of a processor in a digital computer system is performed, for example, during program debugging, during maintenance of the digital computer system, or when a failure occurs in the digital computer system. It is valid. Therefore, various measures have been taken to monitor or grasp the internal operation of the digital computer system, in particular, the operating condition of the program. However, it is necessary to directly access the internal bus to monitor the details of the processor. Has not been realized yet, and software is usually used to monitor the input / output status of the processor via the external bus.

[0003]

Since the internal bus of the digital computer system cannot be directly monitored, the problem that the processor itself cannot be directly monitored has been encountered. In addition, since the operation of the digital computer system is limited by using software to monitor the input / output state, the operation of the monitoring software causes the operation of the digital computer system to operate the original software. In different states, specifically,
It is unavoidable to monitor the digital computer system in a state where the operating speed is reduced or in a special operating state for diagnosis. This encounters the problem of not being able to monitor the operation of the program or the entire digital computer system under actual operating conditions. In addition, the scale of the software becomes large, and the burden of creating diagnostic programs is heavy. The conventional method of diagnosing a digital computer system cannot perform diagnosis by externally giving conditions such as condition setting to the program for the diagnosis.

The present invention solves the above-mentioned problems, and can directly monitor or diagnose the operating state of a digital computer system, particularly a processor in the digital computer system, in a diagnostic mode or a monitoring mode without changing the normal operating state. The purpose of the present invention is to provide a digital computer system. Another object of the present invention is to provide a digital computer system in which the operating state of the processor can be arbitrarily set directly from outside the processor.

[0005]

In order to solve the above problems and to achieve the above-mentioned object, a digital computer system of the present invention responds to an instruction sequencer for decoding an instruction to be executed and an instruction sequencer for decoding the instruction. And an internal data storage unit, an internal bus connected to the internal data storage unit and the arithmetic unit for transmitting signals between them, and at least a diagnostic connected to the internal bus. And processing means. The diagnostic processing means detects the state of either the arithmetic unit or the internal data storage unit via the internal bus in response to an external diagnostic command.

Specifically, the diagnostic processing means reads at least the operating state of the arithmetic unit from the internal bus.

Further, specifically, the diagnostic processing means is further connected to an instruction sequencer, and cooperates with the instruction sequencer to operate either the arithmetic unit or the data storage unit based on a command from the outside. More specifically, the diagnostic processing means, in cooperation with the instruction sequencer, applies data to either the operation unit or the data storage unit via the internal bus based on a command from the outside.

More specifically, the diagnosis processing circuit analyzes the data read from the internal bus in response to a command from the outside of the computer system to diagnose the operation of the arithmetic unit.

Preferably, the diagnostic processing means is provided with a computer that issues the above command outside the computer system.

[0010]

Since the diagnostic processing means is connected to the internal bus in the processor, the data passing through the internal bus can be read. Therefore, the operation status of the processor, in particular, the instruction sequencer and the arithmetic unit that executes the instruction according to the instruction decoding of this instruction sequencer, in other words, the processing contents of the software currently being executed, are directly Can be monitored. The processor and the diagnostic processing means operate independently, and the diagnostic processing means does not hinder the operation of the processor when reading data from the internal bus.
Further, since it is not necessary to operate software for monitoring the operation of the processor, there is no influence such as delay of the original operation of the processor.

Further, the diagnostic processing means forcibly supplies control data for operating the arithmetic unit via the internal bus, and operates the arithmetic unit under a special condition for debugging, for example. Based on the command, it is possible to operate the processor under conditions different from the original operation.

Further, the diagnostic processing means can statistically process the data read from the internal bus to analyze the software processing contents.

A computer for issuing the above command is provided outside the processor, and this computer is connected to the diagnostic processing means to perform the above processing.

[0014]

1 is a block diagram of an embodiment of a digital computer system of the present invention. This digital computer system is composed of an instruction fetch unit IFU and a sequencer SE that form the processor body.
Q, operation unit (arithmetic unit) OU, internal register unit IRU, external interface EXT-I /
F, these units have internal control signal bus C1
To C4 are connected to internal data buses D1 to D4.
The internal control signal bus C1 and the internal data bus D1 are connected to the outside of the processor. In the digital computer system of this embodiment, a diagnostic interface DIAG-I / F is provided as a diagnostic processing means in the processor so that the operating state of the processor inherent in the computer system can be directly monitored. The diagnostic interface DIAG-I / F is connected to the internal data bus D2 connected to the operation unit OU via the internal data bus D3, or the internal control signal bus C4.
Is connected to the sequencer SEQ via. This diagnostic interface DIAG-I / F also constitutes a processor. Instruction fetch unit IFU,
The sequencer SEQ, the operation unit OU, etc. are configured as an LSI circuit by integrated circuit technology,
Therefore, this diagnostic interface DIAG-I / F
Similarly to the operation unit OU and the like, it is preferable that they are integrally configured as an LSI circuit. The digital computer system also has a diagnostic interface DI.
A user terminal UT is provided in order to output the operation status of the operation unit OU to the outside of the processor via the AG-I / F or to make the operation unit OU perform a forced special operation.

The instruction fetch unit IFU reads a program to be executed from the outside of the processor, fetches an instruction (instruction) to be executed each time, and applies it to the sequencer SEQ via the internal control signal bus C2. .. The sequencer SEQ sequentially (sequentially) decodes (analyzes) the instruction fetched by the instruction fetch unit IFU, and decodes the instruction to the operation unit OU via the internal control signal buses C3 and C3a according to the instruction. Applied or via the internal control signal bus C3, C3b to the internal register unit I
Applied to RU or internal control signal bus C3, C3
It is applied to the external interface EXT-I / F via c. Therefore, the operation unit OU, the internal register unit IRU, the external interface EXT-I
/ F is controlled by the sequencer SEQ.

The operation unit OU executes the decoded instruction in the sequencer SEQ. Data is transferred to the internal data bus D2 in accordance with the execution of the instruction in the operation unit OU.
a, D2, and the internal control signal bus C2b, the operation unit OU and the internal register unit IR
Data transmission with U. Similarly, data is transmitted between the operation unit OU and the external interface EXT-I / F via the internal data buses D2a and D2 and the internal control signal bus C2c in response to the execution of the instruction in the operation unit OU. It The internal register unit IRU is a general term for a memory in the processor, and stores data in an internal register without going through the operation unit OU, for example.
Alternatively, the data is sent to the outside. The external interface EXT-I / F is a part that interfaces with the outside of the program, and transmits / receives data to / from the outside via the internal data bus D2. Alternatively, the external interface E is connected via the internal data buses D2c, D2, D2a.
Data transmission / reception between the XT-I / F and the operation unit OU, or internal data buses D2c, D
2, D2b, external interface EXT-I /
Data is transmitted and received between F and the internal register unit IRU.

The diagnostic interface DIAG-I / F has an operation unit O via an internal data bus D3.
U, the internal register unit IRU, and the internal data bus D2 connected to the external interface EXT-I / F. Therefore, the diagnostic interface DI
The AG-I / F can read various data transmitted on the internal data bus D2. In addition, as described above, the sequencer SEQ, in accordance with the instruction decoded therein, the operation unit OU, the internal register unit IRU, the external interface EXT-I.
Controls operations such as / F. Diagnostic interface DIA
The G-I / F is directly connected to the sequencer SEQ, and like the instruction fetch unit IFU, can externally fetch an instruction to be forcibly executed from the user terminal UT. As a result, the data appearing on the internal data bus D2 by externally drivingly controlling the operation unit OU, the internal register unit IRU, the external interface EXT-I / F, etc. according to the instruction applied and fetched via the user terminal UT. Can be read via the internal data bus D3.

The user terminal UT is connected to the diagnostic interface DIAG-I / F via the internal data bus D4, and controls the diagnostic interface DIAG-I / F from outside the program to monitor the internal state of the program. Or control the program externally. The user terminal UT is realized by using, for example, a personal computer. The user (user) uses the user terminal UT to execute the diagnostic interface DIAG-I / F.
Examples of the diagnostic mode performed through the following include the ones listed below.

(1) Simple data reading mode This mode is a processing mode of reading the data flowing through the internal data bus D2 to the user terminal UT via the diagnostic interface DIAG-I / F. In this mode, start time and end time can be set. Alternatively, the process can be terminated when the read data reaches a predetermined number.

(2) Conditional data reading mode According to the simple reading mode described above, a very large amount of data is read out to the user terminal UT, so the storage capacity and effective utilization of the read out data difficult. Therefore, this conditional data read mode is
A condition for data reading, for example, reading is performed only when data is stored in a certain address of the internal register unit IRU, or the external interface EX is used.
The diagnostic interface DIAG-I / F fetched by the instruction fetch unit IFU by imposing conditions such as reading only when data is output from the T-I / F to the outside via the internal data bus D1. The diagnostic interface DIAG-I / F reads the data flowing to the internal data bus D2 only when the instruction is input from the internal data bus via the internal control signal bus C5 and the corresponding condition set from the user terminal UT is met. However, diagnostic interface DIAG-I /
This is an operation mode in which the data is temporarily stored in the buffer memory provided in F and is output to the user terminal UT. In this mode, for example, the internal data bus D only when the program set by the user terminal UT runs
You can also read the data flowing through 2. Various other conditions can be set for such conditions.

(3) Data write mode In this mode, the diagnostic interface DIAG-I / F interrupts the data set by the user terminal UT to suspend the operation of the instruction fetch unit IFU and replaces the instruction fetch unit IFU. , A data write instruction is fetched via the internal control signal bus C4 and applied to the sequencer SEQ to be transferred from the internal data bus D3 to the internal register unit IRU or to the external interface EXT-I.
/ F is an operation mode of writing data from the user terminal UT to / F. After this operation is completed, the diagnostic interface D
The IAG-I / F restarts the operation of the instruction fetch unit IFU whose operation has been interrupted, and resumes the original program operation again.

(4) Operation unit drive mode In the above data write mode, data is transferred to the internal register unit IRU or the external interface EXT-I / F.
In this mode, the instruction fetch unit IFU is suspended and the operation unit OU is forcibly operated by the instruction from the user terminal UT. Then, the operation result of the operation unit OU is read from the data flowing through the internal data bus D2, and the operation result accompanying the operation of the operation unit OU is monitored.

(5) Statistical processing (analysis) of read data
Processing mode The data read in the simple data reading mode or the conditional data reading mode is statistically processed and the result is output to the user terminal UT. For example,
In the above-described conditional data reading mode, there are processes such as counting the number of times data written in a certain address, calculating an average value, and detecting the time and the value when the value changes.

For example, the operation of the simple data reading mode described above will be described in more detail. The user
The "simple data read mode" is set via the user terminal UT. In response to the mode setting, the user terminal UT specifies the mode and drives the diagnostic interface DIAG-I / F. The diagnostic interface DIAG-I / F recognizes the simple read mode, reads the data flowing on the internal data bus D2, and stores it in the internal buffer memory. The diagnostic interface DIAG-I / F continues this operation. In the above-mentioned mode, the user outputs the read data via the user terminal UT to the diagnostic interface DIAG-I.
Request to / F. Diagnostic interface DIAG-I / F
Responds to the request, the read data stored in the buffer memory is sequentially output to the user terminal UT.
The user terminal UT is a diagnostic interface DIAG-
The data output from the I / F is displayed on a CRT display device or output to a printer, for example. As a result, the data transmitted from the operation unit OU to the internal register unit IRU can be transferred to the processor without interfering with the operation on the processor side and without changing or modifying the original program running on the processor. User terminal U provided outside
Can be output to T. As a method of utilizing the data output to the user terminal UT, for example, in the case of debugging, analysis of the intermediate result of the operation of a certain program,
Alternatively, it can be used as a history analysis of a program operating in a series of program processing.

Considering the contents of each mode described above and the operation of the simple data read mode described above, the detailed operation in each diagnostic mode is clear. Therefore, the detailed operation in the other diagnostic modes described above is omitted. To do. Configuration shown in FIG. 1 and diagnostic interface D
From the processing functions of the IAG-I / F and the user terminal UT, and the combination of these functions, there is no need for any software load other than the above-mentioned diagnostic mode, and there is no need for debugging, maintenance, or a processor. It goes without saying that other diagnostic processing for monitoring the operation of can be performed.

When these diagnostic modes are used alone or in combination, various usage forms as exemplified below and the effects as a result thereof are obtained. (1) The processor, such as the programmer, maintenance staff, and customer, does not affect the original operation of the processor itself such as the operation unit OU, the internal register unit IRU, and the external interface EXT-I / F, and the processor is operated under the conditions desired by the user. It is possible to grasp the internal operation status of. As a result, for example, it is possible to analyze the behavior of the program when debugging the program or evaluate the processing result and the validity of the program. (2) By a command from the user terminal UT outside the program, it becomes possible to interrupt or change the processing contents of the program already loaded in the digital computer system. For example, via the user terminal UT the diagnostic interface DIAG-
Data can be given to the I / F and the data can be written to the internal register unit IRU. This process is performed, for example, when performing a time-consuming convergence calculation at the time of debugging, or when the result of the convergence calculation is known in advance, the calculation result is written to the internal register unit IRU via the user terminal UT, It is used for the purpose of shortening the debug time by jumping to the program processing after the calculation. Alternatively, it can be used when the function of the malfunction detection circuit of the processor is confirmed by giving a command that causes a clear malfunction from the outside during maintenance and inspection. (3) The usage status of the circuit module of the processor or the operation analysis of the program can be analyzed by statistically processing the monitoring result of the internal operation of the processor. (4) Enables automatic testing of computer systems during mass production. (5) It can be incorporated as a self-diagnosis circuit of a processor to perform self-diagnosis.

FIG. 2 shows a block diagram of a more specific digital computer system of the present invention. The digital computer system shown in FIG. 2 is a parallel distributed processing type digital computer system using a symbol processing language, for example, LISP, and an evaluator unit EU.
, Resource manager RM, data storage STR
G, diagnostic interface DIAG-I / F, and
It has a diagnostic means DIAG. Here, the evaluator unit EU is located as a computer main body, and the workstation WS in the resource manager RM is located as an external computer corresponding to the user terminal UT. The diagnostic interface DIAG- shown in FIG.
The I / F and the diagnostic means DIAG correspond to the diagnostic interface DIAG-I / F in FIG. In the configuration example shown in FIG. 2, the diagnostic means DIAG performs the processing of the diagnostic interface DIAG-I / F shown in FIG. 1, and the diagnostic interface DIAG-I / F shown in FIG. 1 corresponds to the internal data bus D4 shown in FIG. The data storage STRG is one type of external device of the processor.

The modules constituting the digital computer system shown in FIG. 1 are as follows when the relevant parts of the modules in the computer system shown in FIG. 2 are associated. The instruction fetch unit IFU shown in FIG. 1 is the instruction cache IC in the evaluator unit EU shown in FIG. 2, the sequencer SEQ is the system controller SC in the evaluator unit EU, and the operation unit OU is the arithmetic unit ALU in the evaluator unit EU. And a masker MSK, an internal register unit IRU is a local memory LM in the arithmetic unit ALU, an external interface EXT-I / F is a main memory interface MM-I / F and a resource manager interface RM-I / F in the arithmetic unit ALU, and a user. Terminal U
T is a workstation WS in the resource manager RM
Is.

The internal data buses D1 to D shown in FIG.
4 corresponds to the internal data buses IB1 to IB3 in FIG. However, the internal control signal bus C is not shown in FIG. The diagnostic means DIAG includes internal data buses IB1 to IB.
3 through internal bus connection lines IL1 to IL3. The diagnostic means DIAG is connected to the system controller SC corresponding to the sequencer SEQ via the internal bus connection line IL4. Also, diagnostic means D
The IAG is connected to the workstation WS via a diagnostic interface D-I / F, and this diagnostic interface D-I / F corresponds to the internal data bus D4 shown in FIG. The diagnostic means DIAG shown in FIG. 2 can be configured using a personal computer.

In the digital computer system shown in FIG. 2, as in the digital computer system shown in FIG. 1, the user terminal UT shown in FIG.
In accordance with the specification of the diagnostic mode from the workstation WS that functions as a user, operation monitoring within the evaluator unit EU desired by the user, setting of external drive conditions,
Other actions can be performed.

As described above, the diagnostic means DIAG which is directly connected to the internal bus of the processor in the computer system and functions as a part of the processor is provided, and the user terminal is located outside the processor and is connected to this diagnostic means DIAG. The configuration in which the UT or the workstation WS is provided is not limited to the above configuration example, and can be applied to other computer systems.

[0032]

According to the present invention, it is possible to directly monitor (understand) the internal operating state of a processor of a computer system without affecting the operation itself of the processor. This internal operation monitoring can be performed under certain conditions. According to this internal operation monitoring of the processor, it is possible to efficiently debug in the original operating state without preparing a debugging program at the time of debugging or changing the original program processing contents for debugging. Being able to directly monitor the internal state of the processor is effective not only for debugging but for maintenance of the processor or periodical diagnosis of the processor. Further, according to the present invention, the operation of the processor can be forcibly interrupted based on a request from the outside of the processor, and the processor can be made to perform the operation from the outside. Therefore, processing other than the program already installed in the digital computer system can be performed. Further, according to the present invention, it is possible to provide the result of automatically statistically processing the above monitoring result and the like.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a first embodiment of a digital computer system of the present invention.

FIG. 2 is a block diagram of a parallel distributed processing digital computer system using a symbolic language as a second embodiment of the digital computer system of the present invention.

[Explanation of symbols]

IFU ... Instruction fetch unit SEQ ... Sequencer IRU ... Internal register unit OU ... Operation unit EXT-I / F ... External interface C1 to C4 ... Internal control signal bus D1 to D4 ... Internal data bus DIAG ... Diagnostic means DIAG-I / F ... Diagnostic interface DIAG-I
/ FUT ··· User terminal EU · · Evaluator unit RM · · Resource manager STRG · · Data storage ALU · · Arithmetic unit (operation unit) IB1 to IB4 · Internal bus IL1 to IL4 · Internal bus connection line WS · ..Workstation IC ... Instruction cache SC ... System controller LM ... Local memory

Claims (6)

[Claims] 1. An instruction sequencer for decoding an instruction to be executed, an arithmetic unit for executing the instruction according to the instruction decoding of the instruction sequencer, an internal data storage unit, an internal data storage unit and the arithmetic unit. An internal bus that is connected and that transmits signals between them, and at least a diagnostic processing unit that is connected to the internal bus are provided, and the diagnostic processing unit is the internal bus in response to a diagnostic command from outside the computer system. A digital computer system configured to detect the state of either the arithmetic unit or the internal data storage unit via a computer. 2. The digital computer system according to claim 1, wherein said diagnostic processing means reads at least the operating state of said arithmetic unit from said internal bus. 3. The diagnostic processing means is further connected to the instruction sequencer, and cooperates with the instruction sequencer to operate either the arithmetic unit or the data storage unit based on a command from the outside of the computer system. Claim 1
The described digital computer system. 4. The diagnostic processing means, in cooperation with the instruction sequencer, applies data to either the arithmetic unit or the data storage unit via the internal bus based on a command from the outside of the computer system. The digital computer system according to claim 3. 5. The diagnosis processing circuit analyzes the data read from the internal bus in response to a command from the outside of the computer system to diagnose the operation of the arithmetic unit. The described digital computer system. 6. The digital computer according to claim 1, wherein a computer provided outside the computer system is connected to the diagnostic processing circuit, and the command is set in the diagnostic processing means from the computer. system.