JPH05343376A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH05343376A
JPH05343376A JP14557492A JP14557492A JPH05343376A JP H05343376 A JPH05343376 A JP H05343376A JP 14557492 A JP14557492 A JP 14557492A JP 14557492 A JP14557492 A JP 14557492A JP H05343376 A JPH05343376 A JP H05343376A
Authority
JP
Japan
Prior art keywords
substrate
compound film
film
substrates
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP14557492A
Other languages
Japanese (ja)
Inventor
Shuji Watanabe
修治 渡辺
Kazuya Kubo
加寿也 久保
Hiroshi Daiku
博 大工
Kisou Yamada
競 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14557492A priority Critical patent/JPH05343376A/en
Publication of JPH05343376A publication Critical patent/JPH05343376A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To firmly attach a semiconductor substrate to a support substrate to realize thinning by laminating an Si compound film, an Si-containing organic compound film and an Si compound film on the semiconductor substrate, forming an Si compound film on the support substrate, joining both substrates and removing the Si compound film from the rear of the semiconductor substrate. CONSTITUTION:Coatings of an Si compound film 11, an organic Si-coated glass film 12 the Si compound film 11 are laminated on a surface of an Si substrate 3 with a semiconductor element formed. On the other hand, a coating of the Si compound film 11 is formed on a support substrate 6, and after both substrates 3, 6 are cleaned, the substrates 3, 6 are joined with their coatings in contact, so that the Si substrate 3 is thinned from the rear of the Si substrate 3, the joined substrates 3, 6 are etched and the Si compound film 11 is removed. Then the thinned Si substrate 3 is separated from the support substrate 6. Thus a semiconductor substrate formed with a thinned semiconductor element can be obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造方法に
係り、特に半導体素子を形成した半導体基板の薄層化の
工程を含む半導体装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device including a step of thinning a semiconductor substrate having a semiconductor element formed thereon.

【0002】[0002]

【従来の技術】従来より図3(a)に示すように、赤外線に
高感度を有し、エネルギーギャップの狭い水銀・カドミ
ウム・テルル(HgCdTe)のような化合物半導体基板1に
該基板の逆導電型の不純物原子を導入して赤外線検知素
子2を形成し、シリコン(Si)基板3に不純物原子を導
入して前記検知素子2で得られた検知信号を信号処理す
る電荷転送素子の入力ダイオード4を形成し、両者の基
板1,3 に形成された半導体素子同士をインジウム(In)
の金属バンプ5で圧着接合して赤外線検知装置が形成さ
れている。
2. Description of the Related Art Conventionally, as shown in FIG. 3 (a), a compound semiconductor substrate 1 such as mercury, cadmium, tellurium (HgCdTe), which has a high sensitivity to infrared rays and a narrow energy gap, has a reverse conductivity of the substrate. Type impurity atoms are introduced to form the infrared detecting element 2, and impurity atoms are introduced to the silicon (Si) substrate 3 to process the detection signal obtained by the detecting element 2 as an input diode 4 of a charge transfer element. To form indium (In) between semiconductor elements formed on both substrates 1 and 3.
The infrared detection device is formed by pressure bonding and joining with the metal bumps 5.

【0003】ところで、上記HgCdTeの化合物半導体基板
1は、Si基板3に対して熱膨張率が大であり、上記のよ
うにして形成した赤外線検知装置は液体窒素温度で使用
しており、該装置を保管する場合は室温であるので、室
温より液体窒素温度迄の間に赤外線検知装置が曝される
間に、両者の基板1,3 の熱膨張率の相違に起因して、両
者の半導体素子を接続している金属バンプ5が外れた
り、亀裂を生じたりして半導体素子同士が接続不良とな
る問題を生じている。
The HgCdTe compound semiconductor substrate 1 has a higher coefficient of thermal expansion than the Si substrate 3, and the infrared detector formed as described above is used at liquid nitrogen temperature. Since the room temperature is stored at room temperature, the semiconductor elements of the two semiconductor devices will be affected by the difference in the coefficient of thermal expansion between the substrates 1 and 3 while the infrared detector is exposed between room temperature and liquid nitrogen temperature. There is a problem in that the metal bumps 5 connecting with each other are disengaged or cracks are generated, resulting in poor connection between the semiconductor elements.

【0004】そのため、図3(b)に示すように、この赤外
線検知素子を形成したHgCdTe基板1を出来る丈、薄層状
態に研磨し、この薄層化した基板1を、Si基板より成る
支持基板6にエポキシ樹脂(商品名:アラルダイト、チ
バガイギー社製)より成る接着剤7にて接着する。
Therefore, as shown in FIG. 3 (b), the HgCdTe substrate 1 on which the infrared detecting element is formed is polished into a thin layer having a length as long as possible, and the thinned substrate 1 is supported by a Si substrate. It is adhered to the substrate 6 with an adhesive 7 made of an epoxy resin (trade name: Araldite, manufactured by Ciba Geigy).

【0005】次いで図3(c)に示すように、この支持基板
6に接着され、赤外線検知素子を形成している薄層化し
たHgCdTe基板1とSi基板3をInの金属バンプ5で圧着接
合して三次元の赤外線検知装置を形成している。
Next, as shown in FIG. 3 (c), the thin HgCdTe substrate 1 and the Si substrate 3 which are adhered to the supporting substrate 6 and form the infrared detecting element are pressure bonded to each other with In metal bumps 5. To form a three-dimensional infrared detector.

【0006】このようにすると、前記HgCdTe基板1は薄
層化されてSi基板3に接着されているので、Si基板3の
熱膨張率がHgCdTe基板1の熱膨張率よりも支配的にな
り、金属バンプ5が剥がれたり、亀裂を発生したりする
事故が無くなる。
In this way, since the HgCdTe substrate 1 is thinned and adhered to the Si substrate 3, the coefficient of thermal expansion of the Si substrate 3 becomes more dominant than the coefficient of thermal expansion of the HgCdTe substrate 1. Accidents in which the metal bumps 5 are peeled off or cracks occur are eliminated.

【0007】[0007]

【発明が解決しようとする課題】然し、この方法による
と、前記HgCdTe基板1とSi基板3とを接着剤7で接着す
る工程に於いて、前記接着剤7の内部に気泡が入りやす
く、この気泡によって研磨すべきHgCdTe基板1が、その
気泡の存在する箇所より研磨工程中に割れたり、クラッ
クが入ったりする恐れが有り、上記赤外線検知素子2を
形成したHgCdTe基板1を30μm 以下の厚さに研磨するこ
とは困難である。
However, according to this method, in the step of adhering the HgCdTe substrate 1 and the Si substrate 3 with the adhesive 7, bubbles easily enter the inside of the adhesive 7, The HgCdTe substrate 1 to be polished by air bubbles may be cracked or cracked during the polishing process from the location where the air bubbles are present. The HgCdTe substrate 1 on which the infrared detection element 2 is formed has a thickness of 30 μm or less. It is difficult to polish.

【0008】本発明は上記した問題点を除去するもの
で、上記赤外線検知素子を形成したHgCdTe基板、或いは
半導体素子を形成した他のSi基板等の半導体基板を、気
泡の発生が起こりやすい接着剤を用いることなく、強固
に支持基板に接着でき、薄層化できる半導体装置の製造
方法の提供を目的とする。
The present invention eliminates the above-mentioned problems, and an HgCdTe substrate on which the infrared detection element is formed, or another semiconductor substrate such as a Si substrate on which a semiconductor element is formed, is used as an adhesive agent in which bubbles are easily generated. An object of the present invention is to provide a method for manufacturing a semiconductor device, which can be firmly adhered to a supporting substrate and can be thinned without using.

【0009】[0009]

【課題を解決するための手段】本発明の半導体装置の製
造方法は、請求項1に示すように、表面に半導体素子を
形成した半導体基板の表面側にシリコンの化合物膜、シ
リコンを含む有機化合物膜およびシリコンの化合物膜を
積層して形成するとともに、支持基板上にシリコンの化
合物膜を形成し、前記両者の基板を洗浄した後、該両者
の基板上に形成した被膜同士を対向させて両者の基板を
接着し、前記半導体基板の裏面側より該半導体基板を薄
層化し、前記シリコンの化合物膜の選択エッチング液を
用いて、接着した両者の基板をエッチングし、前記シリ
コンの化合物膜を除去することで、薄層化された半導体
基板を支持基板より分離する工程を含むことを特徴とす
るものである。
According to the method of manufacturing a semiconductor device of the present invention, as described in claim 1, a compound film of silicon or an organic compound containing silicon is formed on the surface side of a semiconductor substrate on which a semiconductor element is formed. A film and a silicon compound film are laminated, a silicon compound film is formed on a supporting substrate, both substrates are washed, and then the coating films formed on the both substrates are made to face each other. The substrates are adhered, the semiconductor substrate is thinned from the back surface side of the semiconductor substrate, and the both adhered substrates are etched by using the selective etching solution for the compound film of silicon to remove the compound film of silicon. By doing so, a step of separating the thinned semiconductor substrate from the supporting substrate is included.

【0010】また請求項2に示すように、前記支持基板
を透明基板とすることを特徴とするものである。
According to a second aspect of the present invention, the supporting substrate is a transparent substrate.

【0011】[0011]

【作用】鏡面研磨をしたSi基板を純水にて洗浄し、表面
が清浄と成った鏡面状態のSi基板同士、或いはSiO2等の
Siの化合物膜を表面に形成したSi基板を純水により清浄
に洗浄し、前記化合物膜を対向させてSi基板同士を接着
すると、該Si基板上、或いはSiの化合物膜上で洗浄の際
に形成されたOH基同士が水素結合を起こして強固に結
合するので、Si基板同士、或いはSiの化合物膜を形成し
たSi基板同士が室温で加圧することなく密着するとされ
ている。
[Function] A mirror-polished Si substrate is washed with pure water to obtain a mirror-finished Si substrate with a clean surface or SiO 2 or the like.
When the Si substrate having the Si compound film formed on the surface is cleanly washed with pure water, and the compound films are opposed to each other and the Si substrates are adhered to each other, the Si substrate or the Si compound film is washed at the time of cleaning. Since the formed OH groups form a hydrogen bond and are strongly bonded to each other, the Si substrates or the Si substrates on which the Si compound film is formed are said to adhere to each other at room temperature without applying pressure.

【0012】そしてこのように密着したSi基板同士を加
熱すると、更に接着が進行するとされている。このこと
は文献“R.Stengl.Tan and U.Goesele;Jpn.J.Appl.Phy
s.Vol28,page1735(1989 年)"に於いて記載されている。
[0012] It is said that when the Si substrates thus closely adhered to each other are heated, the adhesion further proceeds. This is described in the literature “R.Stengl.Tan and U.Goesele; Jpn.J.Appl.Phy.
s. Vol 28, page 1735 (1989) ".

【0013】本発明者等は上記したことを利用し、半導
体素子を表面に形成したSi基板の表面側に燐珪酸ガラス
膜(PSG膜;Phosph Silicate Glass膜) 膜より成るSiの化
合物膜を形成した後、その上に有機シリコン塗布ガラス
膜(S0G膜;Spin On Glass膜)を塗布して表面を平坦に加
工し、更にその上に燐珪酸ガラス膜の三層構造の被膜を
形成する。
Utilizing the above, the present inventors form a Si compound film consisting of a phosphosilicate glass film (PSG film; Phosph Silicate Glass film) film on the surface side of a Si substrate on which a semiconductor element is formed. After that, an organic silicon-coated glass film (S0G film; Spin On Glass film) is applied thereon to make the surface flat, and a film having a three-layer structure of a phosphosilicate glass film is further formed thereon.

【0014】一方、サファイア、或いは石英のような絶
縁性の支持基板上に燐珪酸ガラス膜の被膜を形成し、両
者の基板に形成した被膜同士を対向させて接着した後、
半導体素子を形成したSi基板の裏面側より研磨し、該Si
基板を薄層化する。
On the other hand, after forming a film of a phosphosilicate glass film on an insulating supporting substrate such as sapphire or quartz, and adhering the films formed on both substrates so as to face each other,
Polishing from the back side of the Si substrate on which the semiconductor element is formed
Thin the substrate.

【0015】そして所定の寸法にSi基板が薄層化された
時点で、燐珪酸ガラス膜を選択的にエッチングするエッ
チング液を用いて、半導体素子を表面に形成し、且つ薄
層化されたSi基板を取り出す。
When the Si substrate is thinned to a predetermined size, a semiconductor element is formed on the surface using an etching solution for selectively etching the phosphosilicate glass film, and the Si thinned layer is formed. Take out the substrate.

【0016】このようにすると、半導体素子を形成した
Si基板は、割れたり、欠けたりせずに容易に所定の寸法
に迄薄層化される。また接着剤を用いて居ないので、気
泡が発生して、その気泡の発生部分よりSi基板の薄層化
の研磨の際にクラックが発生したりする事故が無くな
る。
In this way, a semiconductor element was formed.
The Si substrate can be easily thinned to a predetermined size without cracking or chipping. Further, since no adhesive is used, there is no accident that bubbles are generated and cracks are generated from the portion where the bubbles are generated during polishing for thinning the Si substrate.

【0017】[0017]

【実施例】以下、図面を用いて本発明の一実施例に付き
詳細に説明する。図1(a)に示すように、表面に半導体素
子を形成し、凹凸形状を呈するSi基板3を準備する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. As shown in FIG. 1 (a), a semiconductor element is formed on the surface and a Si substrate 3 having an uneven shape is prepared.

【0018】次いで図1(b)に示すように、前記半導体素
子を形成し、凹凸形状を呈しているSi基板3上に化学気
相成長法(CVD;Chemical Vapor Deposition 法) を
用いて燐シリケートガラス膜より成るSiの化合物膜11を
形成する。
Then, as shown in FIG. 1 (b), the semiconductor element is formed, and phosphorous silicate is formed on the Si substrate 3 having an uneven shape by chemical vapor deposition (CVD). A Si compound film 11 made of a glass film is formed.

【0019】次いでその上に組成が珪素化合物〔RnSi(O
H)4-n 〕とガラス質形成剤と有機溶剤の混合液よりな
り、(商品名;OCD 、東京応化株式会社製) のSOG膜
(SpinOn Glass膜) と称する有機シリコン塗布ガラス膜1
2の形成剤をスピナーを用いて回転塗布する。そして前
記有機シリコン塗布ガラス膜12を、前記凹凸状を呈して
いるSi基板3の表面が平坦に成るように埋めて形成す
る。次いで更に400 ℃前後の温度で該基板3をベーキン
グする。
Then, a silicon compound [RnSi (O
H) 4-n ], a vitreous-forming agent and an organic solvent mixture (trade name; OCD, manufactured by Tokyo Ohka Co., Ltd.)
Organosilicon coated glass film called (SpinOn Glass film) 1
Spin-form the forming agent of 2 using a spinner. Then, the organic silicon-coated glass film 12 is formed by burying it so that the surface of the Si substrate 3 having the uneven shape becomes flat. Then, the substrate 3 is further baked at a temperature of around 400 ° C.

【0020】更に、その上に前記CVD法で燐シリケー
トガラス膜11を形成し、3層構造の被膜を10μm 程度の
厚さ迄形成する。このように形成した3層構造の被膜を
研磨し、表面粗さが5nm以下の程度まで研磨する。
Further, a phosphorus silicate glass film 11 is formed thereon by the CVD method, and a film having a three-layer structure is formed to a thickness of about 10 μm. The three-layered film thus formed is polished to a surface roughness of about 5 nm or less.

【0021】一方、図1(c)に示すように、石英、或いは
サファイア基板より成る支持基板6を準備する。次いで
図1(d)に示すように、該支持基板6上に前記したCVD
法により燐シリケートガラス膜、或いはSiO2膜より成る
Siの化合物膜11を形成する。
On the other hand, as shown in FIG. 1C, a supporting substrate 6 made of quartz or a sapphire substrate is prepared. Then, as shown in FIG. 1 (d), the above-mentioned CVD is performed on the supporting substrate 6.
By phosphorous silicate glass film or SiO 2 film
A Si compound film 11 is formed.

【0022】次いで図2(a)に示すように、半導体素子を
形成したSi基板3と、支持基板6とを塵が無い状態まで
充分純水にて洗浄し、上記両者の基板3,6 上に形成した
Si化合物膜11同士が対向するようにし、室温で重ね合わ
せて接着する。
Next, as shown in FIG. 2 (a), the Si substrate 3 on which the semiconductor element is formed and the supporting substrate 6 are sufficiently washed with pure water until dust-free, and the Si substrate 3 and the supporting substrate 6 on both substrates 3 and 6 are cleaned. Formed into
The Si compound films 11 are made to face each other, and are laminated and bonded at room temperature.

【0023】この重ね合わせる時点で、両者の基板3,6
に直流のパルス電圧を印加する、いわゆる静電パルス圧
着法を用いて接着すると尚、一層強固に接着できる。そ
して石英板、或いはサファイア基板のような透明な支持
基板6の側より顕微鏡等を用いて観察し、両者の基板3,
6 の接着された箇所に気泡が有るか、否かの検査を行
い、気泡が有る場合は、燐シリケートガラス膜より成る
Si化合膜11の選択エッチング液を用いて両者の基板3,6
を分離し、再度Si化合物膜11、或いは有機シリコン塗布
ガラス膜12を形成する。
At the time of this superposition, both substrates 3, 6 are
If the bonding is carried out by using a so-called electrostatic pulse pressure bonding method in which a DC pulse voltage is applied, the bonding can be further strengthened. Then, it is observed from the side of the transparent support substrate 6 such as a quartz plate or a sapphire substrate using a microscope or the like, and both substrates 3,
6 Inspect whether or not there are air bubbles in the bonded area, and if there are air bubbles, consist of a phosphorus silicate glass film
Using the selective etching solution for the Si compound film 11, both substrates 3, 6
Then, the Si compound film 11 or the organic silicon-coated glass film 12 is formed again.

【0024】次いで気泡が無い場合は、両者の基板3,6
を200 〜500 ℃の温度で熱処理し、より密着度を強化す
る。このようにした後、図2(b)に示すように、Si基板3
の裏面側より該基板3を研磨装置で研磨し、10μm 以下
の厚さ迄研磨する。この場合研磨剤を選択し、研磨した
面の表面粗さが0.1 μm 程度に成るように研磨する。
Next, when there is no bubble, both substrates 3, 6 are
Is heat-treated at a temperature of 200 to 500 ° C to further strengthen the adhesion. After this, as shown in FIG. 2 (b), the Si substrate 3
The substrate 3 is polished from the back surface side thereof by a polishing device to a thickness of 10 μm or less. In this case, an abrasive is selected and the surface to be polished has a surface roughness of about 0.1 μm.

【0025】前記した燐シリケートガラス膜より成るSi
の化合物膜11は、有機シリコン塗布ガラス膜12よりエッ
チング速度が高いので、燐シリケートガラス膜より成る
Si化合物膜11のエッチング液を用いることで、選択エッ
チングされる。
Si comprising the above-mentioned phosphorus silicate glass film
The compound film 11 of FIG. 3 has a higher etching rate than the organic silicon-coated glass film 12, and thus is made of a phosphosilicate glass film.
Selective etching is performed by using an etching solution for the Si compound film 11.

【0026】そして図2(c)に示すように、薄層化され、
半導体素子を表面に形成したSi基板3が接着箇所より分
離される。なお、本実施例の支持基板6として用いたサ
ファイア基板、或いは石英板の代わりに、SOS(Sili
con On Sapphir)基板を用いても良い。この場合は、該
基板上に燐シリケートガラス膜や、SiO2膜のようなSi化
合膜を形成する必要は無い。
Then, as shown in FIG. 2 (c), a thin layer is formed,
The Si substrate 3 having the semiconductor element formed on the surface is separated from the bonding portion. It should be noted that instead of the sapphire substrate or the quartz plate used as the support substrate 6 of this embodiment, SOS (Silicon
A con On Sapphir) substrate may be used. In this case, it is not necessary to form a phosphorus silicate glass film or a Si compound film such as a SiO 2 film on the substrate.

【0027】また半導体素子を形成したSi基板3上に、
Siの化合物膜として燐シリケートガラス膜を形成する代
わりにSiO2膜を形成しても良い。
On the Si substrate 3 on which the semiconductor element is formed,
Instead of forming the phosphorus silicate glass film as the Si compound film, a SiO 2 film may be formed.

【0028】[0028]

【発明の効果】以上述べたように、本発明の方法に依る
と半導体素子を形成したSi基板が、所定の厚さに割れ、
欠けを発生しない状態で薄層化されるので、このような
薄層化の工程を採る半導体装置の製造方法に、本発明の
方法を用いると極めて有利で、高歩留りで半導体装置が
形成できる効果がある。
As described above, according to the method of the present invention, the Si substrate on which the semiconductor element is formed is cracked to a predetermined thickness,
Since it is thinned in a state that no chipping occurs, it is extremely advantageous to use the method of the present invention in a method of manufacturing a semiconductor device that adopts such a thinning step, and an effect that a semiconductor device can be formed with high yield There is.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の方法の一実施例を示す断面図であ
る。
FIG. 1 is a cross-sectional view showing an embodiment of the method of the present invention.

【図2】 本発明の方法の一実施例を示す断面図であ
る。
FIG. 2 is a sectional view showing an embodiment of the method of the present invention.

【図3】 従来の半導体装置とその製造方法の説明図で
ある。
FIG. 3 is an explanatory diagram of a conventional semiconductor device and a method of manufacturing the same.

【符号の説明】[Explanation of symbols]

3 Si基板 6 支持基板 11 Siの化合物膜 12 有機シリコン塗布ガラス膜 3 Si substrate 6 Support substrate 11 Si compound film 12 Organic silicon coated glass film

フロントページの続き (72)発明者 山田 競 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内Front page continuation (72) Inventor Yamada Racing 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 表面に半導体素子を形成した半導体基板
(3) の表面側にシリコンの化合物膜(11)、シリコンを含
む有機化合物膜(12)およびシリコンの化合物膜(11)を積
層して形成するとともに、支持基板(6) 上にシリコンの
化合物膜(11)を形成し、 前記両者の基板(3,6) を洗浄した後、該両者の基板(3,
6) 上に形成した被膜同士を対向させて両者の基板(3,6)
を接着し、 前記半導体基板(3) の裏面側より該半導体基板(3) を薄
層化し、前記シリコンの化合物膜(11)の選択エッチング
液を用いて、接着した両者の基板(3,6) をエッチング
し、前記シリコンの化合物膜(11)を除去することで、薄
層化された半導体基板(3) を支持基板(6) より分離する
工程を含むことを特徴とする半導体装置の製造方法。
1. A semiconductor substrate having a semiconductor element formed on the surface thereof.
A silicon compound film (11), a silicon-containing organic compound film (12) and a silicon compound film (11) are laminated on the surface side of (3), and a silicon compound film is formed on the supporting substrate (6). After the film (11) is formed and the both substrates (3, 6) are washed, the both substrates (3, 6) are
6) Make the coatings formed on each other face each other and make the substrates (3, 6)
The semiconductor substrate (3) is thinned from the back surface side of the semiconductor substrate (3), and the two substrates (3, 6) are adhered using a selective etching solution for the silicon compound film (11). ) Is removed and the silicon compound film (11) is removed to separate the thinned semiconductor substrate (3) from the support substrate (6). Method.
【請求項2】 前記支持基板(6) を透明基板とすること
を特徴とする請求項1記載の半導体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the supporting substrate (6) is a transparent substrate.
JP14557492A 1992-06-05 1992-06-05 Manufacture of semiconductor device Withdrawn JPH05343376A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14557492A JPH05343376A (en) 1992-06-05 1992-06-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14557492A JPH05343376A (en) 1992-06-05 1992-06-05 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH05343376A true JPH05343376A (en) 1993-12-24

Family

ID=15388260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14557492A Withdrawn JPH05343376A (en) 1992-06-05 1992-06-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH05343376A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004051708A3 (en) * 2002-11-29 2005-02-24 Fraunhofer Ges Forschung Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer
CN100365791C (en) * 2002-11-29 2008-01-30 弗兰霍菲尔运输应用研究公司 Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004051708A3 (en) * 2002-11-29 2005-02-24 Fraunhofer Ges Forschung Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer
JP2006508540A (en) * 2002-11-29 2006-03-09 フラウンホファー ゲゼルシャフト ツール フェルドルンク デル アンゲヴァントテン フォルシュンク エー ファウ Wafer processing process and apparatus and wafer with intermediate and carrier layers
CN100365791C (en) * 2002-11-29 2008-01-30 弗兰霍菲尔运输应用研究公司 Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer
US7482249B2 (en) 2002-11-29 2009-01-27 Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer
US8173522B2 (en) 2002-11-29 2012-05-08 Thin Materials Ag Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer
JP4936667B2 (en) * 2002-11-29 2012-05-23 フラウンホファー ゲゼルシャフト ツール フェルドルンク デル アンゲヴァントテン フォルシュンク エー ファウ Wafer processing process and apparatus and wafer with intermediate and carrier layers

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