JPH053387A - Multilayer printed wiring board for surface mounting - Google Patents

Multilayer printed wiring board for surface mounting

Info

Publication number
JPH053387A
JPH053387A JP15429291A JP15429291A JPH053387A JP H053387 A JPH053387 A JP H053387A JP 15429291 A JP15429291 A JP 15429291A JP 15429291 A JP15429291 A JP 15429291A JP H053387 A JPH053387 A JP H053387A
Authority
JP
Japan
Prior art keywords
layer
insulating layer
wiring board
printed wiring
layer circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15429291A
Other languages
Japanese (ja)
Other versions
JP2586361B2 (en
Inventor
Atsushi Kanai
淳 金井
Kazunori Mitsuhashi
一紀 光橋
Shigeru Ito
繁 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Shin Kobe Electric Machinery Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Kobe Electric Machinery Co Ltd filed Critical Shin Kobe Electric Machinery Co Ltd
Priority to JP15429291A priority Critical patent/JP2586361B2/en
Publication of JPH053387A publication Critical patent/JPH053387A/en
Application granted granted Critical
Publication of JP2586361B2 publication Critical patent/JP2586361B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE:To elevate the reliability of a solder connection part by preventing the solder connection part of a composite type of multilayer printed wiring board surface mounted from cracking. CONSTITUTION:In an object wherein the insulating layer a of an outer layer circuit is made glass woven fabric impregnated with epoxy resin and an insulating layer b, which constitutes an inner layer circuit board, and an adhesive layer between the inner layer circuit board and the insulating layer are made glass unwoven fabric impregnated with epoxy resin, a layer of butyral denatured phenol resin is made in contact with the outer layer circuit inside of this. This layer becomes the shape of rubber at high temperature, and it prevents the solder connection part from cracking caused by stress by absorbing said stress based on the difference of thermal expansion coefficient between the parts mounted on the surface and the insulating layer.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、表面実装部品(Sur
face Mount Device:SMD)搭載用の
多層プリント配線板に関する。
BACKGROUND OF THE INVENTION The present invention relates to surface mount components (Sur
The present invention relates to a multilayer printed wiring board for mounting a face mount device (SMD).

【0002】[0002]

【従来の技術】セラミックチップ等のSMDを搭載する
多層プリント配線板は、SMDの熱膨張係数が6.5×
10~6/℃と小さいために、配線板の絶縁層にも平面方
向の熱膨張係数が小さいものが要求される。従来用いら
れているのは、ガラス織布を基材として、これにエポキ
シ樹脂を含浸して絶縁層としたもの(FR−4)であ
り、その平面方向の熱膨張係数は、(10〜15)×1
0~6/℃である。また、絶縁層の基材として、ガラス織
布とガラス不織布を組合せたコンポジットタイプの多層
プリント配線板がドリル穴明け性改良したものとして提
案されている。SMDの搭載には、クリーム半田を使用
するリフロー半田付け法が主として採用されている。
2. Description of the Related Art A multilayer printed wiring board on which an SMD such as a ceramic chip is mounted has an SMD coefficient of thermal expansion of 6.5 ×.
Since it is as small as 10 to 6 / ° C., the insulating layer of the wiring board is also required to have a small coefficient of thermal expansion in the planar direction. Conventionally used is a glass woven fabric as a base material, which is impregnated with an epoxy resin to form an insulating layer (FR-4), and has a thermal expansion coefficient in the plane direction of (10 to 15). ) × 1
It is 0 to 6 / ° C. Further, as a base material for the insulating layer, a composite type multilayer printed wiring board in which a glass woven cloth and a glass nonwoven cloth are combined is proposed as a material having improved drilling properties. A reflow soldering method using cream solder is mainly used for mounting the SMD.

【0003】[0003]

【発明が解決しようとする課題】上記の絶縁層の基材に
ガラス織布を用いた技術では、SMDと基板の熱膨張係
数の差が比較的小さいので、両者の熱による膨張収縮の
差もそれほど大きいものではなく、現時点では対応して
いる。しかし、コンポジットタイプの多層プリント配線
板では、絶縁層の平面方向の熱膨張係数が20×10~6
/℃と大きいために、前記膨張収縮の差も大きくなり、
SMDの半田接続部に大きな応力が作用して、半田接続
部にクラックが生じやすくなる。本発明が解決しようと
する課題は、SMDを搭載したコンポジットタイプの多
層プリント配線板の半田接続部に熱衝撃によりクラック
が入るのを防止して、半田接続部の信頼性を高めること
である。
In the technique using the glass woven cloth as the base material of the insulating layer, the difference in thermal expansion coefficient between the SMD and the substrate is relatively small. It's not that big, and it's currently supported. However, in a composite type multilayer printed wiring board, the thermal expansion coefficient of the insulating layer in the plane direction is 20 × 10 to 6
Since it is as large as / ° C, the difference in expansion and contraction also becomes large,
Large stress acts on the solder connection portion of the SMD, and cracks are likely to occur at the solder connection portion. The problem to be solved by the present invention is to prevent cracks from being generated in a solder connection portion of a composite type multilayer printed wiring board mounted with an SMD by thermal shock, and to enhance reliability of the solder connection portion.

【0004】[0004]

【課題を解決するための手段】上記課題を解決する本発
明に係る表面実装用多層プリント配線板は、外層回路の
絶縁層(a)を熱硬化性樹脂含浸ガラス織布とし、内層
回路板を構成する絶縁層(b)、ならびに内層回路板と
前記絶縁層(a)との接着層を熱硬化性樹脂含浸ガラス
不織布としたものにおいて、外層回路の内側に、これと
接してブチラール変性フェノール樹脂の層を形成したこ
とを特徴とする。また、回路の層数が4層を越えるよう
な場合で、内層回路板同士の接着層も熱硬化性樹脂含浸
ガラス不織布としたものについても、前記と同様に、外
層回路の内側に、これと接してブチラール変性フェノー
ル樹脂の層を形成したことを特徴とする。
In a surface mounting multilayer printed wiring board according to the present invention which solves the above problems, a thermosetting resin impregnated glass woven cloth is used as an insulating layer (a) of an outer layer circuit, and an inner layer circuit board is formed. A thermosetting resin-impregnated glass nonwoven fabric is used as the constituent insulating layer (b) and the adhesive layer between the inner layer circuit board and the insulating layer (a), butyral-modified phenolic resin inside the outer layer circuit and in contact therewith. Is formed. Also, in the case where the number of layers of the circuit exceeds four layers, the thermosetting resin-impregnated glass nonwoven fabric is also used as the adhesive layer between the inner layer circuit boards, in the same manner as described above, inside the outer layer circuit. It is characterized in that a layer of butyral-modified phenolic resin is formed in contact therewith.

【0005】[0005]

【作用】上記ブチラール変性フェノール樹脂の層は、1
00℃における弾性率が0.4Kgf/mm2であり、殆どゴム
状態にあると考えられる。従って、使用環境が高温にな
って基板と搭載しているSMDとの間の熱膨張の差が大
きくなっても、ゴム状態になっているブチラール変性フ
ェノール樹脂の層が変形することにより、前記熱膨張差
に基づく応力を吸収し、半田接続部に応力がかかるのを
回避することができる。
The above-mentioned butyral-modified phenol resin layer has 1 layer.
The elastic modulus at 00 ° C. is 0.4 Kgf / mm 2 , which is considered to be almost rubbery. Therefore, even if the use environment becomes high and the difference in thermal expansion between the substrate and the mounted SMD becomes large, the layer of butyral-modified phenolic resin in the rubber state is deformed, and the heat It is possible to absorb the stress due to the difference in expansion and avoid applying stress to the solder connection portion.

【0006】[0006]

【実施例】実施例10.18mm厚さのガラス不織布に臭
素化ビスフェノールA型エポキシ樹脂を含浸乾燥して得
たプリプレグを4枚重ね、その両側に35μmの銅箔を
配して、温度165℃、圧力40Kgf/cm2で50分間加
熱加圧成形して0.8mm厚さの銅張り積層板を製造し
た。この積層板に、電源グランドパターンを焼き付けエ
ッチングにより回路加工をし、内層回路板とした。回路
表面には、後工程での接着性を考慮して黒化処理を施し
た。別途、0.18mm厚さのガラス織布に臭素化ビスフ
ェノールA型エポキシ樹脂を含浸乾燥したプリプレグを
用意した。前記内層回路板の両側にガラス不織布プリプ
レグを1枚、さらにその両側に前記別途用意したガラス
織布プリプレグを1枚重ね、最外層には、接着面にブチ
ラール変性フェノール樹脂を25μ厚さに塗布した18
μ厚さの銅箔を配し、加熱加圧成形により一体化した。
成形条件は、内層回路板用の銅張り積層板の成形の場合
と同様である。
EXAMPLES Example 10. Fourteen prepregs obtained by impregnating and drying a 10.18 mm thick glass non-woven fabric with brominated bisphenol A type epoxy resin were placed, and 35 μm copper foil was placed on both sides thereof, and the temperature was 165 ° C. Then, a copper-clad laminate having a thickness of 0.8 mm was manufactured by heat and pressure molding at a pressure of 40 Kgf / cm 2 for 50 minutes. A power source ground pattern was printed on the laminated board to perform circuit processing by etching to obtain an inner layer circuit board. The circuit surface was subjected to a blackening treatment in consideration of the adhesiveness in a later process. Separately, a prepreg was prepared by impregnating and drying a 0.18 mm-thick glass woven fabric with a brominated bisphenol A type epoxy resin. One piece of glass nonwoven fabric prepreg was laminated on both sides of the inner layer circuit board, and one piece of the above-mentioned separately prepared glass woven fabric prepreg was laminated on both sides thereof, and the outermost layer was coated with butyral-modified phenolic resin to a thickness of 25 μm. 18
A copper foil having a thickness of μ was arranged and integrated by heat and pressure molding.
The molding conditions are the same as in the case of molding a copper-clad laminate for an inner layer circuit board.

【0007】そして、以下の工程にて、多層プリント配
線板への加工を行なった。所定位置にスルホール加工を
した後、エッチングにより外層回路を形成をし、最終仕
上げとして半田レベラー処理を行った。部品の半田付け
工程は、まず、リフロー面にクリーム半田を塗布し、セ
ラミックレジスタを搭載して遠赤外熱風炉で半田付けし
た。次に、フロー面にセラミックレジスタを接着剤で固
定し、噴流半田にて半田付けをした。
Then, the multilayer printed wiring board was processed in the following steps. After the through hole processing at a predetermined position, an outer layer circuit was formed by etching, and a solder leveler processing was performed as a final finish. In the component soldering process, first, cream solder was applied to the reflow surface, a ceramic resistor was mounted, and soldering was performed in a far infrared hot air oven. Next, a ceramic resistor was fixed to the flow surface with an adhesive and soldered with jet solder.

【0008】半田接続部の初期の表面状態を観察した
後、−40℃/30分と125℃/30分の気相冷熱サ
イクル試験を行い、半田接続部のクラック発生状況を観
察した。その結果を他の特性と共に表2に示すが、表1
には絶縁層とブチラール変性フェノール樹脂層の弾性率
を参考までに示した。ブチラール変性フェノール樹脂層
は、30℃においても基板の約1/500の弾性率であ
る。
After observing the initial surface condition of the solder connection portion, a vapor phase cooling / heating cycle test of -40 ° C./30 minutes and 125 ° C./30 minutes was performed to observe the crack generation state of the solder connection portion. The results are shown in Table 2 together with other characteristics.
For reference, the elastic moduli of the insulating layer and the butyral-modified phenolic resin layer are shown. The butyral-modified phenolic resin layer has an elastic modulus of about 1/500 that of the substrate even at 30 ° C.

【0009】尚、ブチラール変性フェノール樹脂層は、
銅箔の接着面に塗布して形成する代わりに、ブチラール
変性フェノール樹脂のシートを使用したり、外層回路の
絶縁層となるガラス織布プリプレグの表面にブチラール
変性フェノール樹脂を塗布しておいて形成してもよい。
The butyral-modified phenolic resin layer is
Instead of applying it on the adhesive surface of copper foil, use a sheet of butyral modified phenolic resin, or apply butyral modified phenolic resin on the surface of the glass woven prepreg that will be the insulating layer of the outer layer circuit. You may.

【0010】[0010]

【表1】 [Table 1]

【0011】従来例1 実施例1において、ブチラール変性フェノール樹脂を最
外層の銅箔に塗布せず、他は実施例1と同様の工程を経
て多層プリント配線板とした。その特性を表2に示す。
Conventional Example 1 In Example 1, a butyral-modified phenolic resin was not applied to the outermost copper foil, and the other steps were the same as in Example 1 to obtain a multilayer printed wiring board. The characteristics are shown in Table 2.

【0012】従来例2 絶縁層を構成する基材を全てガラス織布とし、他は従来
例1と同様の工程を経て多層プリント配線板とした。そ
の特性を表2に示す。
Conventional Example 2 A multi-layered printed wiring board was obtained through the same steps as in Conventional Example 1 except that the base material forming the insulating layer was made of glass woven cloth. The characteristics are shown in Table 2.

【0013】表2において、スルホール信頼性は、20
℃シリコンオイル(20秒浸漬)と260℃シリコンオ
イル(10秒浸漬)の繰返し浸漬を行ない、導通抵抗の
増加が起こるまでのサイクルを調べた。半田耐熱性は、
260℃半田浴に浸漬して実施した。
In Table 2, the through hole reliability is 20
C. Silicon oil (immersion for 20 seconds) and 260.degree. C. oil (immersion for 10 seconds) were repeatedly immersed, and the cycle until the increase of conduction resistance occurred was examined. Solder heat resistance is
It was carried out by dipping in a solder bath at 260 ° C.

【0014】[0014]

【表2】 [Table 2]

【0015】[0015]

【発明の効果】表2から明らかなように、本発明に係る
コンポジットタイプの多層プリント配線板は、絶縁層と
表面実装部品の熱膨張の差に基づく応力をブチラール変
性フェノール樹脂の層が吸収して、半田接続部に前記応
力に起因するクラックが発生するのを防止することがで
きる。そして、他の特性も、従来のFR−4多層プリン
ト配線板と同等である。また、ブチラール変性フェノー
ル樹脂の層は、外層回路の絶縁層を滑らかにするので、
外層回路のエッチング加工による精度を上げることがで
きる。尚、本発明は、コンポジットタイプの多層プリン
ト配線板に係るものであるが、絶縁層の全ての基材にガ
ラス織布を用いたFR−4多層プリント配線板に対して
同様の技術を適用すれば、熱膨張に対する半田接続部の
信頼性は、さらに高いものになる。
As is clear from Table 2, in the composite type multilayer printed wiring board according to the present invention, the stress due to the difference in thermal expansion between the insulating layer and the surface mount component is absorbed by the butyral-modified phenol resin layer. As a result, it is possible to prevent a crack due to the stress from being generated in the solder connection portion. And other characteristics are also equivalent to the conventional FR-4 multilayer printed wiring board. Also, the butyral modified phenolic resin layer smoothes the insulating layer of the outer layer circuit,
It is possible to improve the accuracy by etching the outer layer circuit. Although the present invention relates to a composite type multilayer printed wiring board, the same technique can be applied to an FR-4 multilayer printed wiring board using a glass woven cloth for all the base materials of the insulating layer. For example, the reliability of the solder connection portion against thermal expansion becomes higher.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】内層および外層に回路を有する多層プリン
ト配線板において、外層回路の絶縁層(a)が熱硬化性
樹脂含浸ガラス織布であり、内層回路板を構成する絶縁
層(b)、ならびに内層回路板と前記絶縁層(a)との
接着層が熱硬化性樹脂含浸ガラス不織布であり、外層回
路の内側に、これと接してブチラール変性フェノール樹
脂の層を形成した表面実装用多層プリント配線板。
1. A multilayer printed wiring board having circuits in an inner layer and an outer layer, wherein an insulating layer (a) of the outer layer circuit is a thermosetting resin-impregnated glass woven cloth, and an insulating layer (b) constituting the inner layer circuit board, In addition, the adhesive layer between the inner layer circuit board and the insulating layer (a) is a thermosetting resin-impregnated glass non-woven fabric, and a butyral-modified phenolic resin layer is formed inside the outer layer circuit in contact therewith to form a multi-layer surface mount print. Wiring board.
【請求項2】内層および外層に回路を有する多層プリン
ト配線板において、外層回路の絶縁層(a)が熱硬化性
樹脂含浸ガラス織布であり、内層回路板を構成する絶縁
層(b)、内層回路板と前記絶縁層(a)との接着層な
らびに内層回路板同士の接着層が熱硬化性樹脂含浸ガラ
ス不織布であり、外層回路の内側に、これと接してブチ
ラール変性フェノール樹脂の層を形成した表面実装用多
層プリント配線板。
2. A multilayer printed wiring board having a circuit in an inner layer and an outer layer, wherein an insulating layer (a) of the outer layer circuit is a thermosetting resin impregnated glass woven cloth, and an insulating layer (b) constituting the inner layer circuit board, The adhesive layer between the inner layer circuit board and the insulating layer (a) and the adhesive layer between the inner layer circuit boards are thermosetting resin-impregnated glass nonwoven fabrics, and a butyral-modified phenolic resin layer is provided inside the outer layer circuit in contact therewith. The formed multi-layer printed wiring board for surface mounting.
JP15429291A 1991-06-26 1991-06-26 Multilayer printed wiring board for surface mounting Expired - Fee Related JP2586361B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15429291A JP2586361B2 (en) 1991-06-26 1991-06-26 Multilayer printed wiring board for surface mounting

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15429291A JP2586361B2 (en) 1991-06-26 1991-06-26 Multilayer printed wiring board for surface mounting

Publications (2)

Publication Number Publication Date
JPH053387A true JPH053387A (en) 1993-01-08
JP2586361B2 JP2586361B2 (en) 1997-02-26

Family

ID=15580954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15429291A Expired - Fee Related JP2586361B2 (en) 1991-06-26 1991-06-26 Multilayer printed wiring board for surface mounting

Country Status (1)

Country Link
JP (1) JP2586361B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5516071A (en) * 1993-04-27 1996-05-14 Ikeda Bussan Co., Ltd. Seat slide device with walk-in mechanism
JP2012079765A (en) * 2010-09-30 2012-04-19 Fdk Corp Electronic component mounting substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5516071A (en) * 1993-04-27 1996-05-14 Ikeda Bussan Co., Ltd. Seat slide device with walk-in mechanism
JP2012079765A (en) * 2010-09-30 2012-04-19 Fdk Corp Electronic component mounting substrate

Also Published As

Publication number Publication date
JP2586361B2 (en) 1997-02-26

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