JPH05322943A - Frequency measuring apparatus - Google Patents
Frequency measuring apparatusInfo
- Publication number
- JPH05322943A JPH05322943A JP4154144A JP15414492A JPH05322943A JP H05322943 A JPH05322943 A JP H05322943A JP 4154144 A JP4154144 A JP 4154144A JP 15414492 A JP15414492 A JP 15414492A JP H05322943 A JPH05322943 A JP H05322943A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- period
- signal
- counter
- measured
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Measuring Frequencies, Analyzing Spectra (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、携帯型マルチデジタル
メータ等に装備される周波数計測装置に係るものであっ
て、特に被測定信号の周期を計測して周波数を計算する
周波数計測装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency measuring device mounted on a portable multi-digital meter or the like, and more particularly to a frequency measuring device for measuring a period of a signal under measurement and calculating the frequency. Is.
【0002】[0002]
【従来の技術】従来の周波数計測装置の機能ブロックを
図2に示す。この装置では、入力端子1に入力する周波
数Fの被測定信号の周期Tを基準周波数パルスでカウン
トする周期カウント部2、ここで得た周期Tを、F=1
/Tから周波数換算する周波数換算部3、被測定信号の
周波数Fを基準時間内のパルス数としてカウントする周
波数カウント部4とを設け被測定信号の周波数Fが1K
Hz未満のときは、周波数換算部3で得られた信号をセ
レクタ5で選択して表示回路6に送りLCD等の表示器
7で表示し、また1KHz以上のときはセレクタ5で周
波数カウント部4で得られた信号を選択して同様に処理
することが行われる。2. Description of the Related Art A functional block of a conventional frequency measuring device is shown in FIG. In this device, a period counting unit 2 for counting a period T of a signal under measurement having a frequency F input to an input terminal 1 with a reference frequency pulse, the period T obtained here is F = 1.
The frequency conversion unit 3 for converting the frequency from / T and the frequency counting unit 4 for counting the frequency F of the signal under measurement as the number of pulses within the reference time are provided and the frequency F of the signal under measurement is 1K.
When the frequency is less than Hz, the signal obtained by the frequency conversion unit 3 is selected by the selector 5 and sent to the display circuit 6 to be displayed on the display device 7 such as an LCD. The signal obtained in step 1 is selected and similarly processed.
【0003】[0003]
【発明が解決しようとする課題】このように従来では、
周波数の大きさによって、周波数の値を得るための計測
方法が異なっていたので、計測後のデータ処理や表示の
ための処理が複雑になり、例えばマイクロコンピュータ
にて制御する場合、制御プログラムが大きくなる等の問
題があった。As described above, in the prior art,
Since the measurement method for obtaining the frequency value was different depending on the magnitude of the frequency, the data processing after measurement and the processing for display became complicated. For example, when controlling with a microcomputer, the control program was large. There was a problem such as becoming.
【0004】本発明の目的は、周波数の大小に拘らず、
周期の測定によって周波数計測を行うことにより、装置
全体を制御するマイクロコンピュータのプログラムステ
ップ数の増加を防止した周波数計測装置を提供すること
である。The object of the present invention is to achieve high and low frequencies,
It is an object of the present invention to provide a frequency measuring device that prevents an increase in the number of program steps of a microcomputer that controls the entire device by measuring the frequency by measuring the period.
【0005】[0005]
【課題を解決するための手段】このため本発明の周波数
計測装置は、被測定信号を入力してその周期を所定の分
周比で分周し、被測定周期を得る周期制御部と、該被測
定周期の間、第1基準周波数のパルスをカウントする第
1カウンタと、上記分周比に比例する第2基準周波数に
より基準周期をカウントして上記第1カウント値のカウ
ント毎にパルスを出力するプログラム分周器と、該プロ
グラム分周器の出力パルスをカウントする第2カウンタ
とからなり、該第2カウンタのカウント値から上記被測
定信号の周波数を得るように構成した。For this reason, the frequency measuring device of the present invention includes a cycle control section for inputting a signal to be measured and dividing the cycle by a predetermined frequency division ratio to obtain a cycle to be measured. During a period to be measured, a first counter that counts pulses of a first reference frequency and a second reference frequency that is proportional to the division ratio are used to count the reference period, and a pulse is output for each count of the first count value. And a second counter for counting the output pulses of the program frequency divider. The frequency of the signal under measurement is obtained from the count value of the second counter.
【0006】[0006]
【実施例】以下、本発明の実施例について説明する。図
1はその一実施例の周波数計測装置のブロック図であ
る。8は入力端子から周波数Fの被測定信号を入力して
分周比Mで分周する周期制御部であり、その比測定信号
の周期が所定長以下のときは、その分周比Mを大きくし
て得られる周期Taが所定の範囲内に入るように処理す
る。9は第1カウンタであり、周期制御部8で得られた
周期Taと基準周波数信号Faを入力して、基準周波数
信号Faのパルス数を周期Taの間カウントして、カウ
ント値N=Ta×Faを得る。10は第1カウンタ9の
カウント出力Nを一時保持するするラッチである。11
はプログラム分周器であり、基準周波数信号Fbのパル
スを基準周期Tbの間カウントし、その間にNカウント
毎にパルスを出力する。12は第2カウンタであって、
プログラム分周器11から出力するパルスをカウント
し、そのカウント値Cを得る。そして、この第2カウン
タ12が第1の所定値をオーバフローすると周期制御部
8の分周比Mを大きくし、第2の所定値に達しないとき
同分周比Mを小さくする。このカウント値Cは被測定信
号の周波数Fを示すことになる。13はデジタル表示器
であり、得られた周波数を表示する。EXAMPLES Examples of the present invention will be described below. FIG. 1 is a block diagram of a frequency measuring device according to the embodiment. Reference numeral 8 denotes a cycle control unit for inputting a signal under measurement having a frequency F from an input terminal and dividing the frequency by a division ratio M. When the cycle of the ratio measurement signal is a predetermined length or less, the division ratio M is increased. The processing is performed so that the obtained cycle Ta falls within a predetermined range. Reference numeral 9 denotes a first counter, which inputs the period Ta and the reference frequency signal Fa obtained by the period control unit 8 and counts the number of pulses of the reference frequency signal Fa during the period Ta to obtain a count value N = Ta × Obtain Fa. Reference numeral 10 is a latch for temporarily holding the count output N of the first counter 9. 11
Is a program frequency divider, which counts the pulses of the reference frequency signal Fb during the reference period Tb, and outputs a pulse every N counts during that period. 12 is a second counter,
The pulses output from the program frequency divider 11 are counted and the count value C is obtained. When the second counter 12 overflows the first predetermined value, the frequency division ratio M of the cycle controller 8 is increased, and when the second predetermined value is not reached, the frequency division ratio M is decreased. This count value C indicates the frequency F of the signal under measurement. Reference numeral 13 is a digital display, which displays the obtained frequency.
【0007】さて、入力端子1に印加した周波数Fの被
測定信号は、周期制御部8によって分周比Mで分周され
て、次の式で周期Tが得られる。 Ta=M/F ここで、1/F=Tとすれば、 Ta=M・T となり、入力信号の周期がM倍される。第1カウンタ9
で得られるカウント値Nは、 N=Fa・Ta となり、これがラッチ10で保持される。よって、プロ
グラム分周器11では、 C=(Fb・Tb)/N =(Fb・Tb)/(Fa・Ta) =(Fb・Tb)/[Fa/(M/F)] =F(Fb・Tb)/(Fa・M) が行われて、これがカウンタ12でカウントされる。こ
こで、基準周波数Fbを周期制御部8の分周比Mと関連
させ、別の基準周波数FcをM倍した周波数、つまりF
b=M・Fcに設定すると、 C=F(M・Fc・Tb)/(Fa・M) =F[Tb(Fc/Fa)] となる。[ ]内は固定値であり、よってカウント値C
は被測定信号の周波数Fに比例した値となる。そして、
例えば、Tb=0.5s、Fc=2MHz、Fa=1M
Hzに設定しておけば、C=Fになり、被測定信号の周
波数がそのまま得られる。The signal to be measured having the frequency F applied to the input terminal 1 is frequency-divided by the frequency division ratio M by the period controller 8 to obtain the period T by the following equation. Ta = M / F Here, if 1 / F = T, then Ta = M · T, and the cycle of the input signal is multiplied by M. First counter 9
The count value N obtained at is N = Fa · Ta, which is held by the latch 10. Therefore, in the program frequency divider 11, C = (Fb · Tb) / N 2 = (Fb · Tb) / (Fa · Ta) = (Fb · Tb) / [Fa / (M / F)] = F (Fb * Tb) / (Fa * M) is performed and this is counted by the counter 12. Here, the reference frequency Fb is associated with the frequency division ratio M of the cycle control unit 8 and a frequency obtained by multiplying another reference frequency Fc by M, that is, F
When b = M · Fc is set, C = F (M · Fc · Tb) / (Fa · M) = F [Tb (Fc / Fa)]. The value in [] is a fixed value, so the count value C
Is a value proportional to the frequency F of the signal under measurement. And
For example, Tb = 0.5s, Fc = 2MHz, Fa = 1M
If it is set to Hz, C = F, and the frequency of the signal under measurement can be obtained as it is.
【0008】[0008]
【発明の効果】以上から本発明によれば、常時周期の計
測により周波数を計測するので、制御が簡単となり、プ
ログラムステップ数を減少させることができる。As described above, according to the present invention, since the frequency is constantly measured by measuring the cycle, the control becomes simple and the number of program steps can be reduced.
【図1】 本発明の一実施例の周波数計測装置のブロ
ック図である。FIG. 1 is a block diagram of a frequency measuring device according to an embodiment of the present invention.
【図2】 従来の周波数計測装置のブロック図であ
る。FIG. 2 is a block diagram of a conventional frequency measuring device.
8:周期制御部、9:第1カウンタ、10:ラッチ、1
1:プログラム分周器、12:第2カウンタ、13:周
波数表示器。8: cycle control unit, 9: first counter, 10: latch, 1
1: Program frequency divider, 12: Second counter, 13: Frequency display.
Claims (2)
分周比で分周し、被測定周期を得る周期制御部と、該被
測定周期の間、第1基準周波数のパルスをカウントする
第1カウンタと、上記分周比に比例する第2基準周波数
により基準周期をカウントして上記第1カウント値のカ
ウント毎にパルスを出力するプログラム分周器と、該プ
ログラム分周器の出力パルスをカウントする第2カウン
タとからなり、該第2カウンタのカウント値から上記被
測定信号の周波数を得ることを特徴とする周波数計測装
置。1. A period control section for inputting a signal to be measured and dividing the period by a predetermined division ratio to obtain a period to be measured, and counting pulses of a first reference frequency during the period to be measured. A first counter, a program frequency divider that counts a reference period with a second reference frequency that is proportional to the frequency division ratio, and outputs a pulse for each count of the first count value, and an output of the program frequency divider. A frequency measuring device comprising a second counter that counts pulses, and obtains the frequency of the signal under measurement from the count value of the second counter.
オーバーフロー、又はダウンフローにより上記分周比を
変更されることを特徴とする請求項1に記載の周波数計
測装置。2. The frequency measuring device according to claim 1, wherein the cycle control unit changes the frequency division ratio by overflow or downflow of the second counter.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP04154144A JP3126219B2 (en) | 1992-05-22 | 1992-05-22 | Frequency measurement device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP04154144A JP3126219B2 (en) | 1992-05-22 | 1992-05-22 | Frequency measurement device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05322943A true JPH05322943A (en) | 1993-12-07 |
JP3126219B2 JP3126219B2 (en) | 2001-01-22 |
Family
ID=15577840
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP04154144A Expired - Fee Related JP3126219B2 (en) | 1992-05-22 | 1992-05-22 | Frequency measurement device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3126219B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11333693B2 (en) | 2020-06-24 | 2022-05-17 | Seiko Epson Corporation | Frequency measurement apparatus, microcontroller, and electronic apparatus |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102664203B1 (en) * | 2022-01-26 | 2024-05-10 | 한국전력공사 | Water-proof device for cable pathway of securely fastening to gasket, mounting method and removing method of the same |
-
1992
- 1992-05-22 JP JP04154144A patent/JP3126219B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11333693B2 (en) | 2020-06-24 | 2022-05-17 | Seiko Epson Corporation | Frequency measurement apparatus, microcontroller, and electronic apparatus |
Also Published As
Publication number | Publication date |
---|---|
JP3126219B2 (en) | 2001-01-22 |
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