JPH0531829B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a static induction thyristor that is capable of high-speed switching of large currents, and has the characteristics of high blocking voltage and low forward voltage drop, and a method for manufacturing the same. In particular, the present invention relates to a structure that improves switching speed.

(Conventional technology) A static induction thyristor (hereinafter referred to as SIThy) is
In the case of n-channel type, basically p ⁺ n ^- n ⁺ diode or p ⁺ nn ^{- n +} n ⁺ which becomes the cathode of the diode ^.
It has a structure in which p ⁺ gate regions are provided in a mesh shape or a stripe shape near the region. Traditional
An example of the cross-sectional structure of one unit of SIThy is shown in Figure 1. FIG. 1 shows that a SIThy with a surface gate structure has a relatively thin n ^- layer 14 and a p ⁺ anode region 12.
FIG. 2 is a cross-sectional view of a typical example in which a thin n-layer 15 is provided adjacent to. The same symbols are used for areas that have the same effect. The area between the p ⁺ gates 13 and the p ⁺ gates 13 in the n ^- region 14 is called a channel,
When SIThy is on, charge carriers flow through the channel, and when SIThy is off, a potential barrier induced in the channel blocks the flow of charge carriers. When cut off, a reverse bias voltage is applied between the gate 13 and the cathode 11 to induce a potential barrier within the channel, thereby blocking the flow of charge carriers, which is called a normally-on type SIThy. In other words, a normally-on type SIThy is one that becomes conductive when the bias voltage between the gate 13 and cathode 11 is reduced to zero.
Say. On the other hand, gate 13 and cathode 11
A normally-off type SIThy is one in which a barrier is induced in the channel by the built-in potential of the gate 13 and the current can be interrupted even if the bias voltage between the channels is zero. In order to bring the normally-off type SIThy into a conductive state, a forward bias can be applied between the gate and the cathode. Both normally-on type and normally-off type SIThy can control conduction and interruption of anode current simply by changing the bias voltage between the gate and cathode. That is, a major feature is that gate turn-off operation is possible. Furthermore, SIThy is a traditional
Compared to a gate turn-off thyristor (hereinafter referred to as GTO) consisting of a pnpn four-layer structure, it has a lower forward voltage drop and faster switching speed.
It has features such as high dI/dt and dV/dt tolerance. The conventional SIThy, as a switching device that can handle large amounts of power, has several superior features compared to the GTO, but its switching speed, especially the current drop time during the turn-off process, is significantly lower than the GTO. Fast one 2~
The speed was about 5 μsec, which was insufficient for application to motor control and switching power supplies using pulse width modulation methods, which require high switching speeds. If the switching speed is not very fast and the control frequency is increased, the switching loss will increase and the heat dissipation design of the device will become complicated and large. If the equipment is to be made simple and compact, the control frequency must be lowered, and if the frequency remains within the human audible range, the noise emitted by the equipment may cause discomfort to the operator, and soundproofing measures must be taken. If we try to do this, we end up creating a contradiction in that it will lead to larger sizes. Furthermore, it is said that the weight of inductance devices such as transformers is inversely proportional to the 1/2 power of the frequency, and although there are great advantages to increasing the frequency, it is not possible to provide low-loss, high-speed switching devices. Due to the current situation, increasing the frequency increases switching loss, making it impossible to obtain a compact, lightweight, low loss, and highly efficient device.

First, we will explain why the t _f of the conventional SIThy is not so fast using FIG. 2. Second
The figure shows an equivalent circuit diagram superimposed on a diagram (same as Figure 1) showing the cross-sectional structure of a typical conventional surface gate type SIThy. When SIThy is conductive, bipolar mode static induction transistor (hereinafter referred to as BSIT) Q ₁ and pnp transistors Q ₂ and Q ₃ are all conductive. now,
When trying to turn off SIThy, apply a reverse bias between the gate and cathode. When a reverse bias is applied to the gate, holes in the channel flow into the gate at high speed, inducing a potential barrier in the channel, eliminating injection of electrons from the cathode, and BSITQ ₁ is cut off. As a result, the cathode current I _k can be cut off very quickly, whereas the anode current I _A is not cut off so quickly for the reasons described below. The reason why the anode current I _A is not so fast is shown in Figure 2.
pnp transistors Q ₂ and Q ₃ are not turned off fast
This is because the injection of holes from the p ⁺ anode region continues for a certain period of time, and these holes escape to the gate as the gate current I _G. The reason why the pnp transistors Q ₂ and Q ₃ are not shut off quickly is that the potential of the n layer, which is the base of the pnp transistor, maintains a value sufficient for a certain period of time to inject holes from the p ⁺ anode region, which is the emitter of the pnp transistor. It depends. In the turn-off process, the time during which holes continue to be injected from the p ⁺ anode region is
The electrons injected from the cathode into the n ^-region are
It depends on how much remains in front of the p ⁺ anode, ie in the n layer. That is, SIThy with n layers
The longer the lifetime of the charge carrier, the longer the hole injection continues.

(Object of the Invention) In view of the above-mentioned circumstances, an object of the present invention is to provide a SIThy having a structure that enables high-speed switching.

(Structure of the Invention) The present invention includes a low impurity density region, a high impurity density cathode region having the same conductivity type as the low impurity density region, and a gate having a conductivity type opposite to the cathode region formed near the cathode region. a high impurity density anode region which faces the cathode region with the low impurity density region in between and has an opposite conductivity type to the cathode region, and is provided between the low impurity density region and the anode region; A high-speed electrostatic induction thyristor comprising a thin layer region having a relatively high impurity density and having a conductivity type opposite to that of the anode region, and a region formed in the thin layer region and having a relatively short charge carrier life. be.

(Operation and effect of the invention) Hereinafter, the present invention will be explained in detail with reference to Examples.

FIG. 3 is a cross-sectional view of an embodiment of an n-channel SIThy with a surface gate structure for explaining the structure and effects of the present invention. In FIG. 3, the n ^- layer is relatively thin, and a thin layer region 35 of the n layer with relatively high impurity density is provided adjacent to the front surface of the p ⁺ anode 32. By the maximum blocking voltage, p ⁺ gate 33 and
The electric field distribution between the p ⁺ anode 32 has a quadrilateral shape with the maximum electric field near the junction between the p ⁺ gate 33 and the n ^- layer 34, and the n layer 3 has a relatively high impurity density.
The structure is such that 5 remains as a neutral region.
It's SIThy. In FIG. 3, the same symbols are used for areas having the same effect. SIThy of the structure shown in Figure 3
The anode side junction of 1×10 ¹⁸ to 1×10 ¹⁹ cm
It can be easily obtained by continuous vapor phase epitaxial growth with controlled impurity density on a p-type silicon substrate having an impurity density of ^-3 . For the n ⁺ cathode region 31 and p ⁺ gate region 33 formed on the surface facing the p+ anode 32, phosphorus or arsenic is selected for the n ⁺ cathode region 31, and boron is selected for the p ⁺ gate region 33 ^. Obtained by diffusion. A feature of the structure of FIG. 3 according to the present invention is that a region 36 having a short charge carrier life is provided in the n-layer 35. For example, the region 36 can be provided at a desired position within the n-layer 35 by controlling its energy through proton beam irradiation, and the degree of decrease in charge carrier life depends on the amount of proton beam irradiation and the post-irradiation This can be selected depending on the annealing process.
One of the greatest effects of providing the region 36 at a desired position, which reduces the charge carrier lifetime, is that the pnp transistors Q 2 _{and 2} of the equivalent circuit of FIG. This promotes the disappearance of the charge carriers accumulated in the base (n-layer) of Q ₃ and rapidly cuts off Q ₂ and Q ₃ . That is, the current fall time t _f of SIThy becomes extremely fast. Furthermore, one of the effects of the present invention is that by localizing the region 36 at a certain position in the n layer 35, the original charge carrier lifetime is preserved in the vicinity of the n ⁺ cathode region 31 and the p ⁺ gate region 33. and shall not interfere with the operation or characteristics of the device. The irradiation may be performed after all the steps of forming the conventional SIThy on the silicon wafer have been completed, or may be performed before the electrode wiring of aluminum or the like is provided.

Conventional techniques for reducing charge carrier lifetime include:
Diffusion of gold or similar heavy metals has been attempted, but difficult problems exist in the gold diffusion process. The reason is that gold in silicon diffuses at a very high rate, and it is difficult to limit the region where gold is diffused to an arbitrary location, which generally covers the entire silicon wafer. Gold in the vicinity of the n ⁺ cathode and p ⁺ gate regions reduces the charge carrier lifetime in the vicinity, leading to increased forward voltage drop and decreased gate sensitivity of the device. Furthermore, it no longer satisfies the requirements for an electrostatic induction thyristor. In other words, the gate ground current amplification factor α BSIT of BSIT configured near the n ⁺ cathode region and the p ⁺ gate _{region decreases, and α BSIT and}
Consists of p ⁺ anode, n ^- layer and p ⁺ gate
The sum α _BSIT + α _pop of the common base current amplification factor α _pop of the pnp transistor becomes smaller than 1 and no longer latches. Fast switching is possible under the condition α _BSIT +α _pop <1, but the forward voltage drop increases and such devices require significant gate current to remain conductive. The SIThy of the present invention has high gate sensitivity because the region with reduced charge carrier lifetime is localized only in a position effective for improving the current drop time t _f , and the increase in forward voltage drop is also minimized. This results in a high-speed switching device with low loss and high efficiency.

(Example) Next, SIThy of an example according to the present invention will be described. First, let's look at the conventional image SIThy as shown in Figure 1.
was produced. A p-type substrate with an impurity density of approximately 5×10 ¹⁸ cm ^-3 and a thickness of 350 μm (this will be the p ⁺ anode)
First, an n-type layer of about 2×10 ¹⁶ cm ^-3 was epitaxially grown to a thickness of about 15 μm, and then about 1×10 ¹⁴ cm ^-3 was continuously grown.
An n ^-type layer of about 35 μm is epitaxially grown.
The silicon wafer obtained in this way has
Repeated selective diffusion from the n ^- layer side surface, diffusion depth 3.5μm
A p ⁺ gate region with a diffusion depth of 0.5 μm and an n ⁺ cathode region with a diffusion depth of 0.5 μm were formed. Thereafter, aluminum electrode wiring with a thickness of 5 μm was applied. The channel between ^the p ⁺ gates has a width of 1.5 μm. Note that the chip size is 7 x 10 ^mm2 . The characteristics of the conventional SIThy manufactured in this way are as shown in Figure 4. In Figure 4a, the vertical axis is the anode current
This is the static characteristic of SIThy where I _A and the horizontal axis indicate the anode and cathode voltages V _AK . When the gate-cathode voltage V _GK is zero, SIThy is OFF,
It is ON when V _GK is about 0.8V (when current flows into the gate), which is a typical normally-off type.
It shows the switch characteristics of SIThy. It can be seen that when the anode current I _A is 50 A, the forward voltage drop is about 1 V. Further, the maximum forward blocking voltage of the SIThy was 500V.

FIG. 4b shows a conventional SIThy switching waveform in which the vertical axis represents the gate current I _G and the anode current I _A , and the horizontal axis represents time. gate current
Measurements were made by injecting _IG into the gate in pulses at the desired timing to turn on SIThy, and pulling it out from the gate in pulses at the timing to turn off SIThy. A typical latch-up operation is shown in this diagram. Anode current I _A
It can be seen that the rise time t _r is extremely fast at 20 nsec, but the fall time t _f is slow at 5 μsec. Furthermore, a storage time t _stg of 1 μsec has been observed during the turn-off process.

With conventional SIThy, which has these characteristics, a wafer after forming an aluminum electrode is irradiated with a proton beam from the side on which the cathode is formed, with an energy of 2 MeV and a dose of approximately 1 x 10 ¹³ proton particles/cm ² death,
A SIThy having the structure of the present invention as shown in FIG. 3 was manufactured. A proton beam with an energy of 2 MeV penetrates to a depth of approximately 45 μm from the wafer surface. The degree of damage to the crystal lattice due to radiation irradiation is significantly greater in the vicinity of the radiation penetration depth than in the normal path region. Therefore, in this example, the region where the charge carrier lifetime is reduced is localized at a depth of approximately 45 μm from the surface.

FIG. 5 shows the characteristics of SIThy of the structure of the present invention.
a is anode current I _A vs. voltage between anode and cathode
This is a characteristic of V _AK using gate current I _G as a parameter, and b is a switching waveform of gate current I _G and anode current I _A versus time. Looking at the static characteristics, it can be seen that there is a breakover with respect to some parameters of the gate current I _G , and it is operating as a thyristor. However, the forward voltage drop is the anode current I _A
When is 50A, it increases to 2V. Looking at the switching waveform, the effects of the present invention are particularly noticeable in the turn-off process. That is, the current fall time t _f is 50 nsec. These values represent that a speed 100 times faster than the current fall time t _f value of the conventional SIThy has been achieved. In particular, the accumulation time t _stg is so small that it is almost unreadable, and the rise time t _r
Although it is slightly slower, it is extremely fast at 50nsec. The graph showing the relationship between the forward voltage drop V _po (when I _A = 50 A) and the drop time t _f is as follows:
FIG.

Figure 6 also shows the SIThy value of the conventional type in which a region with a short charge carrier lifetime is partially provided in the n ⁺ layer, but as can be seen in the figure, in the present invention, the overall When the charge carrier lifetime is reduced,
It is possible to produce an electrostatic induction thyristor that is faster and has a smaller forward voltage drop than when regions with short charge carrier lifetimes are partially provided in the n ^- layer, and the effects of the present invention are obvious.

Up to now, preferred embodiments have been described for explaining the configuration of the present invention and its effects, but it goes without saying that the energy and irradiation amount of the proton beam are not limited to the values in the embodiments. For example, SIThy is designed and manufactured to have a high forward blocking voltage.
The low impurity density layer (n ^- layer) is about 100 μm. When forming a region with a reduced charge carrier lifetime in the n region of SIThy by irradiating a proton beam from the surface where the cathode is formed, considerably higher energy is required than in the previous embodiment. Furthermore, when irradiating the proton beam from the anode side surface, the irradiation energy is set in consideration of the thickness of the p ⁺ anode region. Setting the energy of a proton beam to form a region of reduced charge carrier lifetime at a desired location is described, for example, in H.
“HYDROGEN stopping Powers and Ranges” by H. Andersen and JF Ziegler
``RANGE OF'' in ``in All Elements''
HYDROGEN IONS IN SI [14]” and “RANGE OF HYDROGEN IONS IN AL
This can be determined by referring to the graph in [13]. The appropriate proton beam irradiation dose to be applied to the SIThy structure of the present invention strictly depends on the structure of the SIThy, especially the thickness of the low impurity density region, impurity density, etc., and the electrical characteristics of the SIThy to be obtained. However, in the present invention, irradiation was performed in the range of 1×10 ¹¹ to 1×10 ¹⁴ proton particles/cm ² .

So far, we have shown an example of proton beam irradiation as a method for reducing charge carrier lifetime, but there are also other methods, such as irradiation with ions such as Ar from the surface side after the epitaxial growth of the n-type layer in the SIThy fabrication stage, and then , by further growing the n-type layer and growing the n ^-layer on top of it, or also by growing the n ^-layer after Ar irradiation, forming a region with reduced charge carrier lifetime in the n-type layer. can do.
Furthermore, since the charge carrier lifetime becomes shorter as the impurity density increases, forming a relatively thin n ⁺ layer with a high density of impurities in the n-type layer can also improve the proton beam irradiation example. has the same effect.

Figure 7 is a cross-sectional view of SIThy in which an n + layer with an impurity density of 1 × 19 ¹⁹ cm ^-3 is formed in the n ^- type layer.
The n ⁺ layer is formed by ion-implanting _AS . Moreover, its thickness is about 5 μm.

Figures 8a and 8b show the static characteristics and switching characteristics of the SIThy with the above structure, and as in the case of the proton beam, a SIThy with greatly improved t _f and high speed and small voltage drop can be fabricated. This voltage drop
The relationship between V _po and t _f is shown in Figure 6 above,
It is obvious that it has the same effect as proton beam irradiation.

Although the configuration of the present invention and its effects have been specifically explained above using several examples, it goes without saying that various changes can be made in details without departing from the spirit and scope of the present invention.
For example, the embodiment used in the explanation is an n-channel type SIThy with a surface gate structure, but it can also be used with a buried gate structure, a MOS gate structure, and a p-channel type SIThy.
Of course, it can also be applied to SIThy.

According to the present invention, a SIThy capable of high-speed, high-current switching with low loss can be realized with a simple process and at low cost, and its industrial value is extremely large.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a cross-sectional structure of one unit of a conventional surface gate structure SIThy. Figure 2 is
It is a diagram showing an equivalent circuit diagram superimposed on a diagram showing the cross-sectional structure of one unit of SIThy. FIG. 3 is a diagram showing an embodiment of the structure of SIThy of the present invention. Fourth
The figure shows the electrical characteristics of the conventional SIThy.
a is the I _A vs. V _AK characteristic, and b is the switching waveform of I _G and I _A. FIG. 5 shows SIThy of an embodiment of the present invention.
FIG. 3 is a diagram showing the electrical characteristics of the circuit, in which a shows the I _A vs. V _AK characteristic, and b shows the switching waveforms of I _G and I _A.
Figure 6 shows the falling time of SIThy in the embodiment of the present invention.
FIG. 3 is a diagram plotting the relationship between t _f and forward voltage drop V _po . FIG. 7 is a diagram showing the structure of SIThy according to another embodiment of the present invention. FIG. 8 is a diagram showing the electrical characteristics of the embodiment shown in FIG. 7, where a is the I _A vs. V _AK characteristic;
b shows switching waveforms of I _G and I _A. 11, 21, 31, 71...n ⁺ cathode region,
12, 22, 32, 72...p ⁺ anode region,
13, 23, 33, 73...p ⁺ gate region, 1
4, 24, 34, 74...low impurity density n ^- region,
35, 75...n thin layer region, 36, 76... region with reduced charge carrier lifetime.

Claims (1)

[Claims] 1. A low impurity density region 34, a high impurity density cathode region 31 of the same conductivity type as the low impurity density region 34, and a gate region 33 of the opposite conductivity type to the cathode region 31 formed near the cathode region 31.
and an anode region 32 having a high impurity density and opposite to the cathode region 31 with the low impurity density region 34 in between, and having a conductivity type opposite to that of the cathode region 31.
and a thin layer region 35 with relatively high impurity density, which is provided between the low impurity density region 34 and the anode region 32 and has a conductivity type opposite to that of the anode region 32.
and a region 36 formed in the thin layer region 35 and having a relatively short charge carrier lifetime.