JPS60207376A - High-speed electrostatic induction thyristor and manufacture thereof - Google Patents

Abstract

PURPOSE:To enable switching at high speed by forming a region in which charge carrier life formed by irradiating a specific section in a low impurity density region by proton rays is shortened. CONSTITUTION:An N<+> cathode region 51 and P<+> gate regions 53 formed on the opposite surface of a P<+> anode 52 are obtained by selectively diffusing phosphorus or arsenic into the region 51 and boron into the regions 53. A region 56 in which charge carrier life shaped by projecting proton rays into an N<-> layer 54 is shortened if formed. The region 56 can be shaped at a desired position in the N<-> layer 54 by controlling the energy of proton rays, and the extent of the shortening of charge carrier life can be selected by the quantity of proton rays projected and an annealing process after projection. A high-speed switching device, loss thereof is low and which has high efficiency, is manufactured because the region in which charge carrier life is shortened can be localized only at a position effective for shortening current lowering time tf.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a static induction thyristor that is capable of high-speed switching of large currents, and has the characteristics of high blocking voltage and low forward voltage drop, and a method for manufacturing the same, particularly for improving switching speed. Concerning structures and methods of forming them.

A static induction thyristor (hereinafter referred to as sI'rhy) is a n
In the case of a channel type, basically, it has a structure in which a p+ gate head is provided in a mesh shape or a stripe shape near a diode region which becomes a cathode of a pnn diode or a p+n n n+ diode. An example of the cross-sectional structure of a conventional si'rhy for one unit is shown in FIG.

FIG. 1(,) is a cross-sectional view of a typical example of a relatively thick si'rhy layer 14 having a surface dart structure. 1st
Figure (b) shows that 5IThy with a surface dart structure has a relatively thin layer [4] and is adjacent to the p+ anode region 12.
FIG. 3 is a cross-sectional view of a typical example in which a thin layer 15 is provided.

The same symbols are used for areas that have the same effect. The space between the p gates 13 and the p gates 13 in the n-region 14 is called a channel, and when 5IThy is on, charge carriers flow through the channel, and when it is off, a potential barrier induced in the channel flows through the channel. Block the flow of charge carriers. When shutting off, date 13 and cathode 11
A device in which a reverse bias voltage is applied between the two channels to induce a potential barrier in the channel to block the flow of charge carriers is called a normally-on type 5IThy.

In other words, a device that becomes conductive when the bias voltage between the gate 13 and the cathode 11 is made zero is called a normally-on type sr'rhy. On the other hand, gate 1
Even if the bias voltage between 3 and the cathode 11 is zero, a built-in potential barrier is induced in the channel by dirt diffusion, and the current can be blocked. This is called a normally-off type 5I Thy. .

In order to bring the normally-off type sI'rhy into a conductive state, it is sufficient to apply a forward bias between the date and the cathode. In both the normally-on type and normally-off type 5IThy, it is possible to control conduction and interruption of the anode current by simply changing the bias voltage between the center and the cathode (5). That is, a major feature is that it is possible to perform a turn-off operation. Furthermore, 5IThy has a lower forward voltage drop, faster switching speed, dI/dt and av/dt compared to the conventional 9-to-turn thyristor (hereinafter referred to as GTO) composed of a pnpn four-layer structure. It has characteristics such as high tolerance. As a switching device that can handle large amounts of power, the conventional 5IThy has several superior features compared to the GTO, but its switching speed, especially the current drop time during the turn-off process, is much faster than the GTO. However, it was about 2 to 5 μ8 ee, which was insufficient in terms of speed for application to motor control and switching power supplies using the pulse width modulation method, which requires high switching speed.

If the switching speed is not very fast and the control frequency is increased, the switching loss will increase and the heat dissipation design of the device will become complicated and large. If the equipment is to be made simple and compact, the control frequency must be lowered.If the frequency remains within the human audible range, the noise emitted by the equipment will cause discomfort to the worker (6), and soundproofing will be required. Attempting to take measures would create a contradiction in that the size would eventually increase. Furthermore, it is said that the superposition of inductance devices such as transformers is inversely proportional to the square of the frequency, and while there are many advantages to increasing the frequency, it is difficult to provide high-speed switching devices with low loss. Due to the current situation, increasing the frequency like that increases switching loss,
It was not possible to obtain a compact, lightweight, lossless, and highly efficient device.

Therefore, first, using FIG. 2, we will explain why the tf of the conventional 5IThy is not so fast. FIG. 2 is a diagram showing the cross-sectional structure of a typical conventional surface gate type 5IThy (same as FIG. 1(b)), with an equivalent circuit diagram superimposed thereon. When 5ITby is in a conductive state, bipolar mode static induction transistors (hereinafter referred to as BSIT) ] + , pnp ) lannostars Q2 and Q3 are all in a conductive state. Now, when trying to turn off 5IThy, apply a reverse bias between r-) and the cathode. When a reverse bias is applied to the dart, holes in the channel flow into the dart at high speed, a potential barrier is induced in the channel, injection of electrons from the cathode is eliminated, and BSITQ is cut off. As a result, the cathode current ■□ can be cut off extremely quickly, but
On the other hand, the anode current does not cut off so quickly for the following reasons. The reason why the anode current ■□ is not so fast is the pnp transistor Q2 shown in Figure 2.
And Q3 is not cut off quickly and continues for a period of time when holes are injected from the p+ anode region, and this hole causes a dirt current ■
. This is because it closes and exits into dirt. pnp) The reason why Lannostar Q2 and Q3 are not shut off at high speed is because pn
p) The potential of the n layer, which becomes the pace of the transistor, is maintained for a certain period of time at a value sufficient to inject holes from the p+ anode region, which becomes the emitter of the transistor. In the turn-off process, the time during which holes continue to be injected from the p+ anode region depends on how much electrons, which were injected from the cathode into the n- region during conduction, remain in the front surface of the p+ anode. That is,
In sr'rhy with a single n layer of the same thickness, the longer the lifetime of the charge carrier, the longer the hole injection continues. In addition, in 5IThy, which has n single layers with the same charge carrier life,
The thinner the n layer is, the longer the hole injection continues.

FIG. 3 is a graph showing the results of one experiment that substantiates the above description of the conventional sI'rhy turn-off process. Figure 3 (a) shows dart current ■. , the anode current ■i and the cathode current ■k were observed independently, Fig. 3 (
b) is the gate current I on the oscilloscope. This is a waveform displayed by adding the anode current IA and the anode current IA.

As is clear from Fig. 3, in the turn-off process, Ik
is cut off extremely quickly and becomes ■□-〇, then Io1I
A-〇 has been observed. In other words, -I o = I A, and the anode current in the process of transitioning to cutoff is
6 is the gate current ■. This indicates that the water is flowing out. FIG. 4 is a graph showing another experimental result that substantiates the above description of the conventional sI'rhy turn-off process.

Fig. 4(a) shows the switching waveform of sI'rhy when the thickness of the n layer is 400 μm and the impurity degree is 2X10 cm.
However, n 5ITh with a single layer impurity density of 5X10 cm
y switching waveform. Figure 4 (a) and (b)
Comparing n, the thickness of the single layer is the same, but the anode current ■.

It can be seen that the falling time tf of (b) is longer. usually,
Since the carrier life is longer when the impurity density is lower, these graphs demonstrate the validity of the above explanation. Furthermore, FIG. 4(c) shows the switching waveform of sI'rhy in which the thickness of one n layer is 50 μm and the impurity density of one n layer is 2×10” cm −3 .

Comparing (,) and (c) in FIG. 4, it can be seen that even though the impurity density of the n layer is the same, the current fall time 1f is much longer in (C). These results indicate that even if the carrier lifetimes are the same, the thinner the n layer is, the higher the electron density in front of the p+ anode region is, causing hole injection from the p+ anode region.

From the above interpretation, if the impurity density of the n-layer is made as high as possible and the thickness of the n-layer is made as thick as possible, the current drop time t
f should be faster, but the (10) rise time t of the anode current IA will be very slow, and it is guaranteed that it can be operated as S Thy and r and has the characteristics of sI'rhy. If one attempts to do so, the possible range of the impurity density and thickness of the n-layer must be limited.

That is, in the channel between the p+ gate and the i gate, a potential barrier capable of blocking current can be induced only by the bias voltage between the gate and the cathode, and the range of the impurity density of the n layer is Or, when blocking current, several hundred
It blocks an anode voltage of V to several 1,000 V, and is limited to an impurity density and thickness of n-layer, which can realize a forward voltage drop of about 0.9 SV to several volts when conducting. In selecting the impurity density and thickness of the n layer within these limits,
It is extremely difficult to reduce the current fall time 1f to 1μ9ee or less, and to make it approximately 01μ8ee or less.

In view of the above circumstances, an object of the present invention is to provide an sI'rhy having a structure that enables high-speed switching and a method for manufacturing the same. More specifically, the object is to realize a SIThy and its manufacturing method in which the current drop time tf in the turn-off process can easily become 1 μSee or less.

In order to achieve the above object, the present invention includes a low impurity density region, a high impurity density anode region having a conductivity type opposite to that of the low impurity density region, and an anode region that faces the anode region with the low impurity density region sandwiched therebetween. A cathode region having a high impurity density and having a conductivity type opposite to that of the anode region, and a case-1 having a conductivity type opposite to that of the cathode region formed near the cathode region.
An electrostatic induction thyristor having a region, characterized in that a region is provided in which the lifetime of charge carriers formed by irradiating a specific portion of the low impurity density region with a proton beam is reduced. .

Further, according to one aspect of the present invention, a thin layer region having a relatively high impurity density and having a conductivity type opposite to that of the anode region is provided adjacent to the anode region.

Further, the method for manufacturing the sr'rhy according to the present invention includes a step of forming a semiconductor device having a structure of electrostatic induction silica similar to the conventional one, and irradiating the semiconductor device with radiation.
forming a region that reduces the charge carrier lifetime in a specific part of the low impurity density region; and a semiconductor in a region with a relatively low defect density outside the region v that reduces the charge carrier lifetime formed by the irradiation. and a step of recovering damage to the crystal lattice.

According to one aspect of the manufacturing method, the proton beam irradiated in the step of forming a region that reduces charge carrier lifetime in the low impurity density region is IMeV to 10 MeV.
A proton beam with an energy of V is used. Further, the radiation dose is preferably about 1012 to 1014 proton particles/crn2.

Further, in one aspect of the manufacturing method of the present invention, the step of recovering damage to the semiconductor crystal lattice in a region having a relatively low defect density other than the region formed by the irradiation and reducing the charge carrier lifetime may be performed for 30 to 30 minutes. 3 at a temperature of 450℃
It is configured as an annealing process in which annealing is performed for 0 to 60 minutes.

Hereinafter, the present invention will be explained in detail with reference to Examples.

(13) FIG. 5 is a diagram of a cross-sectional structure of an embodiment of an n-channel 5IThy having a surface cage structure for explaining the structure and effects of the present invention. In FIG. 5(a), the n-layer 54 is relatively thick, and when the anode current is blocked, the p-gate 53 and the p+ anode 5 are separated by the maximum blocking voltage applied to the anode.
The electric field distribution between the p+ anode 52 and the n-layer 54 has a triangular shape with a maximum electric field near the junction of the p-gate 53 and the n-layer 54, and the electric field due to the neutral region remaining in the n-layer 54 in front of the p+ anode 52 This is 5IThy, which has a structure that has a zero region.

In FIG. 5(b), the n layer is relatively thin and the p anode 5
A thin n-layer region 55 with a relatively high impurity density is provided adjacent to the front surface of the p+ gate 53 and the p+ anode 52 by the maximum blocking voltage applied to the anode when blocking the anode current. 8IThy has a structure in which the electric field distribution between the p-gate 53 and the n-layer 54 has a quadrilateral shape with the maximum electric field near the junction, and the first layer 55 with relatively high impurity density remains as a neutral region. It is. In FIGS. 5(a) and 5(b), the same symbols are used for regions having the same effect. The junction on the anode side of 5IThy with the structure shown in Figure 5 (,) (14) is ■ × 101
It can be easily obtained by diffusing boron into an n-type silicon substrate having an impurity density of 2 to 2×10 cm.

The anode-side junction of 5IThy having the structure shown in FIG. 5(b) can be easily obtained by performing continuous vapor phase epitaxial growth with controlled impurity density on a p-type silicon substrate having an impurity density of 1×10 2 to 1X10 cm 2 . Figure 5 (a
) and (b), the n+ cathode region 51 and p'' formed on the surface facing the p+ anode 52
The -gate region 53 is obtained by selectively diffusing phosphorus or arsenic for the layer cathode region 51 and boron for the p+ dirt region 53.

In both the structures shown in FIGS. 5(a) and 5(b), the feature according to the present invention is that in the n-layer 54, a region 5 having a reduced charge carrier lifetime is formed by irradiating a proton beam.
6 was established. Furthermore, the region 56 can be provided at a desired position within the n-layer 54 by controlling the energy of the proton beam, and the degree of reduction in charge carrier lifetime can be determined by the amount of proton beam irradiation and the annealing after irradiation. It can be selected depending on the process. One of the greatest effects of providing the region 56 that reduces the charge carrier lifetime at a desired position is that the pnp) runnostar of the equivalent circuit of FIG. Q
This promotes the disappearance of the charge carriers accumulated in the bases (n''' layers) of Q2 and Q3, and quickly cuts off Q2 and Q3. In other words, the current fall time t of 5IThy becomes extremely fast. It is what happens.

Furthermore, one of the effects of the present invention is that by localizing the region 56f at the position where the n layer 54 is formed, the vicinity of the n''-cathode region 51 and the p+ cathode region 53 has the original charge carrier lifetime. is preserved and does not interfere with the operation and characteristics of the device.

n cathode region 51 caused by irradiating a proton beam from the surface where the cathode and the cathode are formed.
Damage to the crystal lattice near the p''-gate region 53 can be easily repaired by an annealing process.

Proton beam irradiation can be performed either from the cathode side surface or from the anode side surface, if desired. The irradiation may be performed after all the conventional steps of forming 5IThy on the silicon wafer have been completed, or may be performed before electrode wiring of aluminum or the like is provided. In the latter case, as will be described later, conditions for the irradiation amount and the annealing step are provided.

Conventional techniques for reducing charge carrier lifetime include diffusing gold or similar heavy metals, but difficult problems exist in the gold diffusion process.

The reason is that gold in silicon diffuses at a very high rate, and it is difficult to limit the region where gold is diffused to any desired location, and it generally covers the entire silicon wafer.

Gold in the vicinity of the layer cathode and p+ gate regions does not reduce the charge carrier lifetime in the vicinity, increasing the forward voltage drop of the device, and decreasing the gate sensitivity. Furthermore, it no longer satisfies the requirements for an electrostatic induction thyristor. In other words, the gate ground current amplification factor αBSIT of BSIT configured near the n cathode region and the p dirt region decreases, and αBSIT and p
+ anode, pn consisting of n single layer and p gate
The sum of the pace ground current amplification factors α and n of the p transistor (17) aBSIT+α becomes smaller than 1, and latch-up np does not occur. Fast switching is possible under the condition αBSIT+αpnp<1, but the forward voltage drop increases and a significant dart current must be applied to keep such a device conductive. The 5IThy of the present invention has high gate sensitivity because the tilted wall with a reduced charge carrier life can be localized only at a position that is effective for improving the current drop time t, and the increase in forward voltage drop is also minimized. This results in a high-speed switching device with low loss and high efficiency.

Next, the relationship between the proton beam irradiation and annealing conditions and the improvement in electrical characteristics will be described for Example 5ITy according to the present invention. First, a conventional Sr'rhy as shown in FIG. 2(b) was manufactured. Impurity density is approximately 5×101
8crn-3, 350 μm thick p-type substrate (this is p
+ anode) at first about 2 x 1016cm-3
An n-type layer of about 15 μm is epitaxially grown, and then an n-type layer of about 1×10 cm 2 is epitaxially grown to about 50 μm. The thus obtained (18) silicon wafer was subjected to selective diffusion from the surface of the n single layer to form a p gate region with a diffusion depth of 3.5 μm and a diffusion depth of 0.
．． A 5 μm n cathode region was formed. Thereafter, aluminum electrode wiring with a thickness of 5 μm was applied. The channel between the p+ dart and the 'p+ dart has a width of 1.5 μm. Note that the chip size is 7×10 pieces.

The characteristics of the conventional type 5IThy manufactured in this way are as shown in FIG. FIG. 6(a) shows the static characteristics of SITh)' where the vertical axis shows the anode current and the horizontal axis shows the anode and cathode voltages. Dart, voltage between cathode V. When K is zero, S I'rhy is OF
'F' is ON when svGK is approximately 0.8VC7) (when current is applied to the gate), and exhibits typical normally-off type sI'rhy switching characteristics.

It can be seen that when the anode current is 5OA, the forward voltage drop is about 1. Further, the maximum forward blocking voltage of the sx'rhy was 600V.

In FIG. 6(b), the vertical axis represents the gate current ■. and the anode current ■A, and the conventional 5I where the horizontal axis represents time.
This is the switching waveform of Thy. Dart current I,
The measurement was carried out by injecting 5IThy into the gate in a pulse manner at the desired timing to turn it on, and pulling it out from the gate in a pulsating manner at the desired timing to turn it off. A typical latch-up operation is shown in this figure. The rise time t of the anode current XA is 20 n
Although it is extremely fast at 5 ec, it can be seen that the descent time t is slow at 5 μ8 ee. Furthermore, a straino time tstg of 1 μsec is also observed during the turn-off process.

A proton beam is applied to the wafer after forming a conventional 5IThy aluminum electrode with such characteristics from the side on which the cathode is formed at an energy of 2 MeV at approximately 1×
10 Irradiate with the irradiation amount of proton particles/crn2, as shown in Figure 5 (
sI'rhy having the structure of the present invention as shown in b) was manufactured. A proton beam with an energy of 2 MeV penetrates to a depth of approximately 45 μm from the wafer surface. The degree of damage to the crystal lattice due to radiation irradiation is much greater near the penetration depth of the radiation than in the region of the passage. Therefore, in this example, the region where the charge carrier lifetime is reduced is localized in the vicinity of a depth of about 45 μm from the surface. If no annealing is performed after proton beam irradiation, the irradiation causes relatively little damage to the crystal lattice in the vicinity of the cathode region and dirt region, so the characteristics of the BS IT configured in the vicinity are significantly affected. inferior, 5ITh
y characteristics cannot be obtained.

Next, the sI'rhy of the structure of the present invention was annealed to recover the relatively small crystal lattice damage introduced by the proton beam irradiation near the cathode region and the cathode region. shows the characteristics of 7th
8, 9, and 10 are characteristic diagrams of annealing under annealing conditions of 3ec°C for 60 minutes, 350°C for 60 minutes, 400°C for 60 minutes, and 450°C for 30 minutes, respectively. It is. In the figures with each number, (a) shows the anode current □ versus the voltage vAK between the anode and cathode,
It is a static characteristic with dirt current Io as a parameter, and (
b) is dart current■. and the switching waveform of the anode current fall time. All of Figures 7 to 10 (a
), the gate current ■. It can be seen that there is a breakover even in response to some of the lags (21), indicating that the thyristor is acting as a thyristor. That is, under the above annealing conditions, the basic s
This indicates that the damage to the crystal lattice near the n cathode region and p gate region has been recovered by the time I'rhy operation is possible. However, the forward voltage drop depends on the annealing conditions and is as shown in each of Figures 7 to 10 (&).
From the static characteristics of, when the end node current IA is 5OA, each /
F3V, 2V, 1. It can be read as IV and 1v. It can be seen that under the annealing conditions of 400° C. for 60 minutes and 450° C. for 30 minutes, the forward voltage drop is almost as low as the conventional sx'rhy.

Looking at the switching waveforms shown in each of FIGS. 7 to 10 (b), the effects of the present invention can be seen particularly in the turn-off process. That is, each current drop time tf is 50 n5ec, 120 nsec, 300 n
sec and 600 n5ec. These values are the current drop time tfO value of 5ITh>' of the conventional type.
This indicates that a speed of about 100 to about 10 times has been achieved. In particular, regarding the accumulation time tstg, (
22) Except for 5IThy (tstg = 100 n5ec) under the annealing condition of 450°C for 30 minutes (Fig. 10(b)), the values are so small that they are almost unreadable, and the rise time t is slightly Although it is slower, even 5IThy with the slowest annealing condition of 300℃ and 60 minutes is 1
It is extremely fast at 00nsec. The forward voltage drop vo
FIG. 11 is a graph showing the relationship between n (when ■□=5OA) and fall time t, and annealing conditions. FIG. 11 also shows the st'rhyO value of the conventional type, and as can be seen from the figure, the effects of the present invention are obvious. Further, FIG. 11 shows that the damage to the crystal lattice in the region where the life of charge carriers introduced by proton beam irradiation is reduced is gradually recovered by increasing the annealing temperature.

In the case of sI'rhy annealed at 450°C for 30 minutes,
When the anode current IA is made larger than the anode current IA at which the switching characteristics were measured, for example, 1
When measuring the switching characteristics at 00A, the storage time tst
g increases to about 2 μsec.

This indicates that annealing at 450° C. for 30 minutes largely recovers the damage to the crystal lattice in the region where the charge carrier lifetime was reduced due to proton beam irradiation. Even when annealing is performed at another lower annealing temperature, the storage time tstg increases if the anode current A is made considerably larger than, for example, 100A. If a considerably larger number of charge carriers are injected into the n layer than the rate at which charge carriers recombine in the damaged region of the crystal lattice, the rate at which charge carriers are accumulated naturally increases. If it is desired to keep the accumulation time tstgk as small as possible, it is sufficient to limit the current flowing through sI'rhy to a certain extent.

The following can be said from the graph of FIG. 11 and the above explanation. That is, even if the forward voltage drop is relatively high, in order to perform ultra-high-speed switching and to flow a large anode current IA, annealing at a relatively low temperature of about 300°C to 350°C is required. On the other hand, the forward voltage drop is as low as the conventional si'rhy, the speed is faster than the conventional sx'rhy, and the anode current IA can be limited to a certain extent. 45
Annealing may be performed at a temperature of about 0°C. Furthermore, the SIThy of the present invention is manufactured in accordance with the user's performance requirements. ,
Of course, the irradiation amount and annealing conditions are not limited to the values in the above embodiments.

For example, in a si'rhy that is designed and manufactured to have a high forward blocking voltage, the low impurity density layer (<n- layer) is approximately several hundred micrometers thick. When forming a region with a reduced charge carrier lifetime near the p+ anode region of 5IThy by irradiating a proton beam from the surface where the cathode is to be formed, considerably higher energy is required than in the above embodiment. In addition, when irradiating proton beam from the anode side surface,
The irradiation energy is set taking into consideration the thickness of the p+ anode region. The energy of the proton beam to form a region with reduced charge carrier lifetime at a desired position can be set, for example, at 19
H, H, published by Pergamon Press in 1977.
Andersen and J. F. Ziegler [
HYDROGEN stopping power
nd Ranges in All Elements
r in J RANGEOF HYDROGEN l
0NS IN SI[14':] J and r RAN
GEOF HYDROGEN 10NS IN AL[
It can be determined by referring to the graph of 13'll J C96). S X'r of the structure of the present invention
Strictly speaking, the appropriate proton beam irradiation dose to be applied to hy is S'
Although it depends on the structure of IThy, especially the thickness of the low impurity density region, the impurity density, etc., and the electrical characteristics of sI'rhy to be obtained, in the example implemented in the present invention, it is 1×10
For those irradiated in the range of 12 to I x 1014 proton particles/cm2, the annealing conditions were set to 300°C to 4.
By annealing at temperatures in the range of 50° C. and varying times in the range of 30 to 60 minutes, almost the desired effect could be obtained.

It is possible to set a process in which annealing is performed at the same time as the sintering of the aluminum electrode, taking into consideration the characteristics of the SIThy to be obtained, or it is possible to set a process in which irradiation is performed after the sintering of the aluminum electrode, so that the annealing temperature is higher than that of the aluminum electrode. The sintering temperature must be lower than the sintering temperature of

Although the configuration of the present invention and its effects have been specifically explained above using several examples, it goes without saying that various changes can be made in details without departing from the spirit and scope of the present invention. .

For example, the embodiment used in the explanation is an n-channel type sI'rhy with a surface gate structure, but it can also be used with a buried gate structure.
It goes without saying that it can also be applied to p-channel type 5IThy.

According to the present invention, a 5IThy capable of high-speed, high-current switching with low loss can be realized through a simple process and at low cost, and its industrial value is extremely large.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a cross-sectional structure of one unit of a conventional surface dart structure sI'rhy. FIG. 2 is a diagram in which an equivalent circuit diagram is superimposed on a diagram showing the cross-sectional structure of one unit of S t'rhy. FIG. 3 is a diagram showing the switching characteristics of the conventional 5IThy, where (a) is the individual waveforms of I, iI□ and IK, and 11)) is ■. This shows the waveform obtained by adding the FIG. 4 is a diagram showing the IA switching characteristics of the conventional sI'rhy. FIG. 5 is a diagram showing an embodiment of the structure of 5IThy of the present invention. FIG. 6 is a diagram showing the electrical characteristics of the conventional 5I Thy, where (a) shows the I vs. VAK characteristics, and (b) shows the I Thy. and ■ switching waveforms. FIG. 7 to FIG. 10 are diagrams showing the electrical characteristics of sI'rhy in the embodiment of the present invention, and each (a) is a diagram showing the electrical characteristics of sI'rhy in the embodiment of the present invention.
K characteristic, (b) is ■. The switching waveforms of and ■□ are shown. FIG. 11 shows the fall time tf of 5IThy in the embodiment of the present invention.
and forward voltage drop V. FIG. 4 is a diagram in which n is plotted against annealing conditions. 11.21.51...n+ cathode region, 12. ．． 2
2゜52...p+anode region, 13,23.53.
...p+ dirt region, 14,24,54;-low impurity density n- region, 56...region with reduced charge carrier lifetime. (29) Figure 1 Figure 2 Figure 3 Kunise E oYII '? ! P9 To (V) Ma I Figure 4 (C) Figure 5 (V) Mae (V) Vl'el

Claims (6)

[Claims] (1) A low impurity density region, a high impurity density anode region having a conductivity type opposite to that of the low impurity density region, and a high impurity density region facing the anode region sandwiching the low impurity density region and having a conductivity type opposite to that of the anode region. A cathode region with an impurity density, a cathode region of the opposite conductivity type to the cathode region formed near the cathode region, and a cathode region formed in a specific part of the low impurity density region by irradiation with a proton beam. A high-speed electrostatic induction thyristor characterized in that it has a region that reduces charge carrier lifetime. (2) The high speed according to claim (1), characterized in that a thin layer region having a relatively high impurity density and having a conductivity type opposite to that of the anode region is provided adjacent to the anode region. Electrostatic induction thyristor. (3) The cathode region and the anode region are constituted by mutually opposite conductivity type high impurity density regions, and these two head regions are constituted to face each other with a low impurity density region in between,
and forming a semiconductor device having a structure in which dirt of the same conductivity type as the anode region is provided near the cathode region, and irradiating the semiconductor device with a proton beam to target a specific portion in the low impurity density region. forming a region that reduces the charge carrier lifetime; and repairing damage to a semiconductor crystal lattice in a region formed by the irradiation and having a relatively low defect density other than the region that reduces the charge carrier lifetime. A method for manufacturing a high-speed electrostatic induction thyristor characterized by: (4) The step of forming a region that reduces the charge carrier lifetime in the low impurity density region includes IMe
The method according to claim 3, which comprises irradiating with a proton beam having an energy of MeV. (5) The irradiation is about 1012 to 1014 proton particles/C
The method according to claim 4, comprising irradiating to a radiation dose of rn2. (6) a step of recovering damage to the semiconductor crystal lattice in a region with relatively low defect density other than the region where the charge carrier lifetime is reduced, formed by the irradiation, for a period of 300 to 45 days;
Claims consisting of annealing at a temperature of 0°C for up to 30 to 60 minutes