JPH05315917A - Method for driving gate of igbt - Google Patents

Abstract

PURPOSE:To relax the time change rate of a voltage between the collector and emitter of an IGBT at the time of turning on the IGBT and to reduce a collector loss at the time of transition and a steady state. CONSTITUTION:A serial-parallel connection constituted by connecting a serial connection between a constant voltage diode ZD1 and a resistor R1 in parallel with a resistor R2 having a resistance value larger than that of the resistor R2 is inserted between a forward bias DC power supply having voltage Ef and a transistor(TR) element Tc1 in a photocoupler and an IGBT gate voltage formed in the gate of the IGBT 1 by the voltage Ef impressed through a gate resistor R3 and the parallel-serial connection and used as an envelope voltage of two kinds of component voltages having final voltage values different from respective time constants is used as a required gate voltage VG.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a gate of an IGBT, in which the rate of change in collector-emitter voltage with time when the IGBT is turned on is relaxed and the collector loss during switching and during steady state is reduced.

[0002]

2. Description of the Related Art As a conventional gate driving method for an IGBT of this type, a method illustrated in the circuit diagram of FIG. 3 is known. FIG. 4 is an operation waveform diagram of the gate voltage corresponding to FIG. First, in FIG. 3, reference numeral 1 is an IGBT (insulated gate bipolar transistor), 2 is a photocoupler, which receives an ON / OFF command signal S _D for the IGBT as input, and transistor elements T _c1 and T _c2 according to the command content.
And are to be conjugated. R ₇ is a gate resistance. V _G is a gate control voltage for the IGBT, and E _f and E _r are forward bias and reverse bias DC power supply voltages for the IGBT gate, respectively.

Therefore, if the signal S _D is a turn-on command to the IGBT, the element T _c1 is turned on, and the gate voltage V _G is the reverse bias voltage E as shown in the operation waveform diagram of FIG. forward bias voltage E from _r
Up to _f, a time constant T defined by the product of the gate-emitter capacitance C of the IGBT and the resistance value of the gate resistance R _7.
It will increase according to _G.

[0004]

In the [0006] Generally IGBT turn control, the product of the relaxation of the temporal change rate dV _CE / dt of the collector-emitter voltage V _CE, and the voltage V _CE and the collector current i _c It is required to reduce the collector loss P _C given by the above in steady state and switching. However, if the gate voltage V _G is raised to a sufficiently large value in a short time and a rapid turn-on operation is performed, the loss P _C can be reduced but the change rate dV _CE / dt is increased. There is concern that the photo coupler 2 may malfunction such as malfunction, and conversely, if the final value of the gate voltage V _G is made small and gradually increased, the rate of change dV _CE / dt will be Although it decreases, the loss P _C increases.

Incidentally, the above pattern will be described below with reference to FIGS. First, FIG. 5 is an arm configuration diagram of one phase in a conversion circuit having a bridge configuration.
And anti-freewheel diode FWD in anti-parallel, ie, IGBT ₁ and FWD ₁ , IGBT ₂ and FWD
₂ and ₂ respectively constitute upper and lower arm elements, and the current i _FWD is turned on via the lower arm FWD ₂ while the current i _FWD is energized to turn on the upper arm IGBT ₁ and the collector current as shown by the dotted line in the figure. i _C shows the state in which energization has started.

Next, FIG. 6 shows a collector current i _c and a gate voltage V _c during turn-on operation of the IGBT ₁ shown in FIG.
_G and collector-emitter voltage V _CE and collector loss P _C
6A and 6B are operation waveform charts corresponding to the case where the gate voltage V _G changes as shown in FIG. The collector loss P _C is the above current i _c and voltage V _CE.
The time t _n1 indicates the time at which the transient state of the turn-on operation ends and shifts to its steady state, and the time t _n1 is from the start time of the turn-on operation to the time t _n1 and after the time t _n1. Areas S ₁₁ and S _21, which are the time-integrated values of the loss P _C in both the periods and, indicate the amount of power consumed by the collector of the IGBT _{1 in} the corresponding periods. Further, θ ₁ is the voltage V
_It shows the degree of _CE temporal decrease, that is, the angle corresponding to the turn-on speed of the IGBT ₁ . FIG. 7 shows the reverse bias power supply voltage E _r and the time constant T in FIG.
FIG. 7 is an operation waveform diagram of the various quantities when _G is made the same and only the forward bias power supply voltage E _f is made small to reduce the variation width of the gate voltage V _G.

Compared to the case of FIG. 6, in FIG. 7, θ ₁ <θ _{2 with} respect to the angle, and the rate of temporal change dV _CE / dt of the voltage V _CE is small, but the time t of the loss P _C is t. The steady-state value after _n2 is large, so the steady-state power loss is S ₂₁ <
Increase like S ₂₂ . However, in the conventional IGBT gate driving method as described above, the circuit shown in FIG. 3 causes the gate voltage V _G to change in a single time as shown in the operation waveform diagram of FIG. It was difficult to simultaneously reduce the dynamic change rate dV _CE / dt and the collector loss P _C to desired values.

In view of the above, it is an object of the present invention to provide a gate driving method for simultaneously reducing the rate of change of the voltage V _{CE at} the time of turn-on of the IGBT and the collector loss during the transient and steady states thereof. Is.

[0009]

In order to achieve the above object, in the IGBT gate driving method of the present invention, I
For the turn-on control of the GBT, a first control voltage whose time constant and its voltage final value are both smaller, and a second control voltage whose time constant and its voltage final value are both larger than the first control voltage. And the envelope voltage of the two control voltages obtained by selectively combining only the larger one of the control voltages in the time course of the first and second control voltages. It shall be the required turn-on control gate voltage,
Further, regarding the formation of the envelope voltage, a second resistor having a resistance value larger than that of the first resistor is connected in parallel to the series connection of the constant voltage diode and the first resistor, and the serial-parallel diode is connected. It is assumed that a direct current power supply of a predetermined voltage is supplied to the gate of the IGBT via a connection to form a required envelope voltage at the gate of the IGBT.

[0010]

As described above, when a single gate voltage V _G is applied during turn-on control of the IGBT, the rate of change of the collector loss P _C and collector-emitter voltage V _CE of the IGBT with time is applied. It is difficult to reduce both dV _CE / dt. This is because the gate voltage V _G makes a single time change with its final value and the fluctuation time constant being defined, and if the turn-on operation is transient and steady, it is appropriate. If the gate voltage V _G that changes with time is applied, the collector loss P _C and the rate of time change of the voltage V _CE can be simultaneously reduced.

According to the above, according to the present invention, the envelope voltage of both control voltages is selected and synthesized by selectively synthesizing only the larger one of the two control voltages having different time constants and final voltage values. And the constants are selected so that the temporal change pattern of the envelope voltage components in the two sets of control voltages is optimum for the transient state and the steady state of the turn-on operation of the IGBT.

The operation waveform diagram of FIG. 8 shows the formation pattern of the envelope voltage serving as the gate voltage during the turn-on control of the IGBT. The envelope voltage V _G shown by the solid line and the control voltage V _G1 shown by the dotted line. It is formed by the control voltage V _G2 indicated by the alternate long and short dash line, and the time constant and the final voltage value of the voltage V _G2 are appropriately larger than those at the voltage V _G1 for both control voltages, as shown in the figure. Prioritized voltages in both the period before t _n3 and the period after t _n3 are respectively the above-mentioned voltage V
_G1 and V _G2 are not shown, and the envelope voltage V _G is obtained as a combined voltage of both priority voltages.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The first and second embodiments of the present invention will be described below with reference to the circuit diagrams shown in FIGS. 1 and 2, respectively. In both figures, the same reference numerals are attached to the components having the same functions as in the case of the embodiment of the prior art shown in FIG.
First, in FIG. 1, in the circuit diagram shown in FIG. 3, a constant voltage is applied to a power supply path of the gate voltage V _G for one IGBT via the forward bias power supply, the transistor element T _c1 and the gate resistance R ₇ in the photocoupler 2. Diode ZD ₁
And a resistor R ₁ connected in series, a resistor R ₂ having a resistance value larger than that of the resistor R ₁ is connected in parallel to form a series-parallel connection between the forward bias power source and the collector of the element T _c1 . A circuit configuration is formed in which the resistor R ₇ is replaced by the resistor R ₃ while additionally inserted between them.

Now, assuming that the path passing through the resistor R ₁ and the path passing through the resistor R ₂ are the first and second paths, respectively, the power supply voltage for forward bias of the first path is the second path. It is smaller than that by the Zener voltage of the constant voltage diode ZD ₁ . In addition, both paths share the gate-emitter electrostatic capacitance C of the IGBT and the resistance R _3, and the resistance value of the resistance R ₁ is smaller than that of the resistance R _2. Therefore, in the case of the first path, The constant T _G1 is smaller than the time constant T _G2 of the second path. Here, the voltage across the capacitance C is the IG
Is to be a gate voltage V _G of BT, the first if what the gate voltage due Similarly the second path and V _G1 and V _G2 by the route, the envelope voltage V _G according to both said voltage
In the same manner as shown in FIG. 8, the priority voltage in both the period before and after the time t _n3 is the voltage V
It can be obtained as what constitutes _G1 and V _G2 .

Next, in FIG. 2, buffer transistors T ₁ and T ₂ for amplifying a signal current are added to the circuit shown in FIG. 1, and along with this, a constant voltage diode ZD ₂ and resistors R _{4 to} R _4.
The circuit configuration including ₆ is changed, and the circuit operation is similar to that of the circuit of FIG.

[0016]

According to the present invention, a method for driving an IGBT gate is provided, in which a first control voltage whose time constant and its voltage final value are both small for turn-on control of the IGBT,
A second control voltage whose time constant and its voltage final value are both greater than those of the first control voltage, and whichever is greater in the time course of the first and second control voltages. To form an envelope voltage of the both control voltages obtained by selectively combining only
The envelope voltage is used as a required gate voltage for turn-on control, and with respect to the formation of the envelope voltage, the resistance value of the constant voltage diode and the first resistor is smaller than that of the first resistor with respect to the series connection of the constant voltage diode and the first resistor. A large second resistor is connected in parallel, and the IGB is connected to the DC power supply of a predetermined voltage via the series-parallel connection.
By supplying power to the gate of T, it is possible to reduce the rate of change of the collector-emitter voltage with time when the IGBT is turned on and reduce the collector loss in the transient and steady state.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a prior art embodiment.

FIG. 4 is an operation waveform diagram of a gate voltage corresponding to FIG.

FIG. 5 is an arm configuration diagram for one phase in a bridge configuration.

FIG. 6 shows i _c , V _G , V _CE , and P when the IGBT is turned on.
Waveform chart of various _C quantities (1)

FIG. 7 shows i _c , V _G , V _CE and P at the time of turning on the IGBT.
Operation waveform diagram of various _C quantities (Part 2)

FIG. 8 is an operation waveform diagram of a gate voltage formed as an envelope voltage.

[Explanation of symbols]

1 IGBT (Insulated Gate Bipolar Transistor) 2 Photocoupler R _n Resistance (n = 1, 2, ... 7) T _c1 Transistor element of photocoupler T _c2 Transistor element of photocoupler T ₁ Signal current amplification buffer transistor T ₂ Signal current amplification buffer transistor ZD ₁ Constant voltage diode ZD ₂ Constant voltage diode E _f Forward bias DC power supply voltage E _r Reverse bias DC power supply voltage

Claims (2)

[Claims] 1. A first control voltage having a small time constant and a final voltage value for turn-on control of an IGBT,
A second control voltage whose time constant and its voltage final value are both greater than those of the first control voltage, and whichever is greater in the time course of the first and second control voltages. To form an envelope voltage of the both control voltages obtained by selectively combining only
A method of driving a gate of an IGBT, wherein a required turn-on control gate voltage is obtained by using the envelope voltage. 2. The method of driving an IGBT according to claim 1, wherein in regard to the formation of the envelope voltage, a resistance value of a constant voltage diode and a first resistor connected in series with respect to the first resistor is higher than that of the first resistor. Of the second resistor is connected in parallel, and the IGBT is connected from the DC power source of a predetermined voltage through the series-parallel connection.
The gate driving method of the IGBT, characterized in that a required envelope voltage is formed in the gate of the IGBT by feeding the gate of the IGBT.