JPH05300527A - Color balance correcting device for color image - Google Patents

Abstract

PURPOSE:To facilitate the change of a correction coefficient with use of a simple and inexpensive circuit constitution by storing previously the correction coefficient in a register and multiplying successively the correction coefficient by the input image signals through a single multiplier circuit to add these multiplication results together. CONSTITUTION:The 8-bit input image signals Rin, Gin and Bin of three colors which are given in parallel with each other are successively and repetitively switched by a multiplexer 10 and supplied to one of both input terminals of a multiplier circuit 40. Meanwhile nine correction coefficients K11-K33 are written into a register group 20 through a CPU 4. When the signals Rin, Gin and Bin are successively inputted to the circuit 40 from the multiplexer 10, the correction coefficients K11-K13 are successively inputted to the circuit 40 from a multiplexer 30 and three multiplying operations are carried out, i.e., (RinXK11), (GinXK12) and (BinXK13) respectively. These multiplication results are added together by an adder circuit 50 and a register 70. Then an image signal OUT equivalent to a single corrected color is outputted via a register 80.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a color balance correction device for a color image for correcting the color balance of the image output of a color camera using a CCD image sensor, for example.

[0002]

2. Description of the Related Art A typical conventional configuration of a color balance correction apparatus is shown in FIG. In the figure, 1, 2, and 3 are R, G,
B is a circuit block for calculating the corrected image signals Rout, Gout, and Bout of each color.
Image signals Rin, Gin, and Bin before correction of G and B colors are input in parallel. The blocks 1, 2, and 3 have the same circuit configuration and are therefore shown in a stacked form. Below, the block 1 will be described as a representative.

In this example, the image signals Rin, Gin, and Bin each have 8 bits. Block 1 includes three coefficient multiplication tables T1, T2, T3. The result of multiplying the image signal Rin by the correction coefficient K11 is stored in the table T1 in the form of a data table. The image signal G is stored in the table T2.
The result of multiplying in by the correction coefficient K12 is stored in the form of a data table. The table T3 stores the result of multiplying the image signal Bin by the correction coefficient K13 in the form of a data table.

The tables T1, T2, T3 are composed of ROMs (read-only memories), and 16-bit × 256 which outputs 16-bit data for each 8-bit input.
Memory for word capacity. Each coefficient multiplication table T1, T
The multiplication data from 2, T3 are two adder circuits 11 and 12
Is added, and the addition result is the corrected image signal Rout for one color. That is, the circuit block 1 performs the data processing represented by the following equation.

(1) Rout = Rin × K11 + Gin × K12 + Bin × K13 The circuit blocks 2 and 3 having exactly the same configuration perform the data processing of the following equation to obtain Gout and Bout.

(2) Gout = Rin × K21 + Gin × K22 + Bin × K23 (3) Bout = Rin × K31 + Gin × K32 + Bin × K33

[0007]

In the conventional color balance correction apparatus configured as described above, since the processing function portion for multiplying the input data by the coefficient is formed in the ROM table,
The problem that the correction coefficient cannot be changed individually according to the characteristics of the camera to be used, and 16
A total of nine ROMs with a capacity of bits x 256 words are required,
There is a problem that the circuit cost becomes very high.

To solve the former problem, the coefficient multiplication table may be composed of a rewritable RAM so that the multiplication result data (that is, the multiplication coefficient to be used) can be variably set for each device. However, even in this case, the latter problem that the memory capacity for the table becomes huge cannot be improved. In addition, hardware and software are required to rewrite the data in the RAM table,
The cost is higher than that of the ROM table.

The present invention has been made in view of the above-mentioned conventional problems, and an object thereof is to correct a color balance of a color image in which a correction coefficient can be easily changed with a simple and low-cost circuit configuration. To provide a device.

[0010]

A color balance correction apparatus according to the present invention comprises a data multiplexer for sequentially supplying image signals of respective colors to one input of a multiplication circuit, and a corrected image for one color from image signals of respective colors. A coefficient register group for storing a total of nine correction coefficients for three colors for one color to obtain a signal, and three correction coefficients for each color from the coefficient register group are switched in synchronization with the data multiplexer. A coefficient multiplexer for sequentially supplying the other input of the multiplying circuit to the other input, and an addition output circuit section for adding three multiplication results for one color from the multiplying circuit and outputting the result as a corrected image signal for one color. Circuit means for writing an arbitrary correction coefficient in the coefficient register group.

[0011]

The above-mentioned equations (1) and (2) are stored in the coefficient register group.
Nine correction factors K11, K12, K13, K21, K in (3)
22, K23, K31, K32, K33 are written. Also, formula (1)
(2) Nine times of multiplication in (3) will be sequentially executed by the multiplication circuit. Furthermore, equations (1) and (2)
The addition for each (3) is sequentially performed in the addition output circuit unit, and the corrected image signals Rout, Gout, Bout are sequentially generated.

[0012]

FIG. 2 shows a schematic structure of a color balance correction apparatus according to an embodiment of the present invention. In the figure, CPU
Reference numeral 4 is the center of an image processing system in which this color balance correction device is included, and this device is also basically controlled by the CPU 4. The 8-bit input image signals Rin, Gin, and Bin for each of the three colors provided in parallel are sequentially and repeatedly switched by the multiplexer 10 and supplied to one input of the multiplication circuit 40.

Further, nine correction coefficients K11, K12, K13, K21,
Nine 8-bit registers 21 to 29 are provided to store K22, K23, K31, K32, and K33 (the whole is referred to as a register group 20). These register groups 20 have a CPU
According to 4, 9 correction coefficients K11 to K33 are written in each (of course, rewritable).

All nine correction coefficients K11 to K33 set in the register group 20 are input to the multiplexer 30, sequentially and repeatedly switched by the multiplexer 30 and supplied to the other input of the multiplication circuit 40. Two
The two multiplexers 10 and 30 are synchronously switched and controlled by the timing controller 90, and
The multiplication circuit 40, the addition circuit 50, and the register 7 which will be described next
The operations of 0 and 80 are also synchronously controlled by the timing controller 90.

Image signals Rin, Gi from the multiplexer 10
When n and Bin are sequentially input to the multiplication circuit 40 once, the correction coefficients K11, K12, and K13 are sequentially input to the multiplication circuit 40 from the multiplexer 30, and three times of multiplication (Rin × K11) (G
in × K12) (Bin × K13) is executed. The multiplication results for three times are cumulatively added by the adding circuit 50 and the register 70, and the resulting data Rout = Rin × K11 + Gin × K12
+ Bin × K13, that is, the corrected image signal Rou for one color
t is output via the register 80.

Next, the multiplexer 10 outputs the image signal Ri.
When n, Gin, and Bin are sequentially output, the correction coefficients K21, K22, and K23 are sequentially output from the multiplexer 30, and Gout = Rin × K21 + Gin × K22 + Bin × K23 is calculated and output from the register 80. Further, in the next cycle, the image signals Rin, Gin,
When Bin is sequentially output, the correction coefficients K31, K32, and K33 are sequentially output from the multiplexer 30, and Bout = Rin × K31 + Gin × K32 + Bin × K33 is calculated and output from the register 80.

The above is the image signal for one sample Rin, Gin,
This is a one-cycle operation of the color balance correction processing for Bin, and this processing is repeated in synchronization with the input.

[0018]

As described above, in the color balance correction apparatus of the present invention, an appropriate correction coefficient is stored in a register having a very small capacity, and the input image signal and the correction coefficient of the register are stored in only one multiplication circuit. And are sequentially multiplied and cumulatively added,
Since the configuration is such that the correction processing of the image signals of each color is executed serially in time, it does not require a large capacity memory, the cost of circuit elements is lower than before, and some correction coefficients set in the register can be rewritten. Thus, appropriate and fine adjustment can be easily performed according to the characteristics of each camera.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a conventional representative color balance correction device.

FIG. 2 is a schematic configuration diagram of a color balance correction device according to an embodiment of the present invention.

[Explanation of symbols]

Rin, Gin, Bin input image signal Rout, Gout, Bout output image signal K11, K12, K13, K21, K22, K23, K31, K32, K33 correction coefficient 10 data multiplexer 20 register group 30 coefficient multiplexer 40 multiplication circuit

Claims (1)

[Claims] 1. A data multiplexer for sequentially supplying three-color separated and digitized image signals of each color to one input of a multiplication circuit, and for obtaining a corrected image signal for one color from the image signals of each color. The coefficient register group for storing a total of nine correction coefficients for three colors for one color, and the multiplication circuit for switching the three correction coefficients for each color from the coefficient register group in synchronization with the data multiplexer. A coefficient multiplexer for sequentially supplying the other input to the other input, an addition output circuit section for adding three multiplication results for one color from the multiplication circuit and outputting as a corrected image signal for one color, and the coefficient register A color balance correction device for a color image, comprising: a circuit means for writing an arbitrary correction coefficient to the group.