JP3220506B2 - Color image color balance correction device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a color image color balance correction device for correcting a color balance of an image output of a color camera using, for example, a CCD image sensor.

[0002]

2. Description of the Related Art FIG. 1 shows a conventional typical configuration of a color balance correction apparatus. In the figure, 1, 2, and 3 are R, G,
This is a circuit block for calculating the corrected image signals Rout, Gout, and Bout for each of the B colors.
Image signals Rin, Gin, Bin before correction of each of G and B colors are input in parallel. Since the blocks 1, 2, and 3 have the same circuit configuration, they are shown in an overlapped form, and the block 1 will be described below as a representative.

In this example, each of the image signals Rin, Gin, Bin has 8 bits. Block 1 includes three coefficient multiplication tables T1, T2, T3. The result of multiplying the image signal Rin by the correction coefficient K11 is stored in the table T1 in the form of a data table. The image signal G is stored in the table T2.
The result of multiplying in by the correction coefficient K12 is stored in the form of a data table. The result of multiplying the image signal Bin by the correction coefficient K13 is stored in the table T3 in the form of a data table.

The tables T1, T2, and T3 are composed of ROM (read only memory), and each of 16 bits × 256 which outputs 16 bits of data with respect to an input of 8 bits.
A word-sized memory. Each coefficient multiplication table T1, T
2. The multiplication data from T3 is divided into two addition circuits 11 and 12
And the result of addition is a corrected image signal Rout for one color. That is, in the circuit block 1, data processing represented by the following equation is performed.

(1) Rout = Rin × K11 + Gin × K12 + Bin × K13 The data processing of the following equation is performed by the circuit blocks 2 and 3 having exactly the same configuration to obtain Gout and Bout.

(2) Gout = Rin × K21 + Gin × K22 + Bin × K23 (3) Bout = Rin × K31 + Gin × K32 + Bin × K33

[0007]

In the conventional color balance correction device configured as described above, the processing function for multiplying the input data by a coefficient is stored in a ROM table.
The problem that the correction coefficients cannot be individually changed according to the characteristics of the camera used, and
A total of 9 ROMs with a capacity of 256 bits × 256 words are required.
There is a problem that the circuit cost becomes very high.

To solve the former problem, the coefficient multiplication table may be constituted by a rewritable RAM so that the multiplication result data (that is, the multiplication coefficient to be used) can be variably set for each device. However, even in this case, the latter problem that the memory capacity for the table becomes enormous is not improved. In addition, hardware and software for rewriting the data in the RAM table are required,
The cost is higher than in the case of the ROM table.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described conventional problems, and has as its object to correct the color balance of a color image so that a correction coefficient can be easily changed with a simple and low-cost circuit configuration. It is to provide a device.

[0010]

A color balance correction apparatus according to the present invention comprises a data multiplexer for sequentially supplying an image signal of each color to one input of a multiplying circuit, and a corrected image for one color from the image signal of each color. A coefficient register group for storing a total of nine correction coefficients for three colors and three colors for obtaining a signal; and three correction coefficients for each color from the coefficient register group which are switched in synchronization with the data multiplexer. A coefficient multiplexer for sequentially supplying the multiplication results to the other input of the multiplication circuit, and an addition output circuit section for adding three multiplication results for one color from the multiplication circuit and outputting the result as a corrected image signal for one color. Circuit means for writing an arbitrary correction coefficient into the coefficient register group.

[0011]

The above-mentioned equations (1) and (2) are stored in the coefficient register group.
Nine correction coefficients K11, K12, K13, K21, K in (3)
22, K23, K31, K32, and K33 are written. Equation (1)
(2) Nine multiplications in (3) are sequentially performed by the multiplication circuit. Further, equations (1) and (2)
The addition for each (3) is sequentially performed in the addition output circuit section, and corrected image signals Rout, Gout, and Bout are generated in order.

[0012]

FIG. 2 shows a schematic configuration of a color balance correction apparatus according to an embodiment of the present invention. In the figure, CPU
Reference numeral 4 denotes a center of an image processing system in which the color balance correction device is included, and this device is also basically controlled by the CPU 4. The input image signals Rin, Gin, Bin of each of the three colors, which are provided in parallel, are sequentially and repeatedly switched by the multiplexer 10 and supplied to one input of the multiplication circuit 40.

The nine correction coefficients K11, K12, K13, K21,
Nine 8-bit registers 21 to 29 are provided for storing K22, K23, K31, K32, and K33 (the whole is referred to as a register group 20). These registers 20 include a CPU
By means of (4), nine correction coefficients K11 to K33 are written in each of them (of course, they are rewritable).

The nine correction coefficients K11 to K33 set in the register group 20 are all input to the multiplexer 30, and are sequentially and repeatedly switched by the multiplexer 30 and supplied to the other input of the multiplication circuit 40. 2
The two multiplexers 10 and 30 are synchronously switched and controlled by a timing controller 90,
Multiplying circuit 40, adding circuit 50, and register 7, which will be described next,
The operations of 0 and 80 are also synchronously controlled by the timing controller 90.

The image signals Rin, Gi from the multiplexer 10
When n and Bin are sequentially input to the multiplication circuit 40 once, the correction coefficients K11, K12, and K13 are sequentially input to the multiplication circuit 40 from the multiplexer 30, and the multiplication (Rin × K11) (G
in × K12) (Bin × K13) is executed. The results of the three multiplications are accumulated by the adder circuit 50 and the register 70, and the resulting data Rout = Rin × K11 + Gin × K12
+ Bin × K13, that is, the corrected image signal Rou for one color
t is output via the register 80.

Next, the image signal Ri is output from the multiplexer 10.
When n, Gin, and Bin are sequentially output, the correction coefficients K21, K22, and K23 are sequentially output from the multiplexer 30, and Gout = Rin * K21 + Gin * K22 + Bin * K23 is calculated and output from the register 80. In the next cycle, the image signals Rin, Gin,
When Bin is sequentially output, the correction coefficients K31, K32, and K33 are sequentially output from the multiplexer 30, and Bout = Rin * K31 + Gin * K32 + Bin * K33 is calculated and output from the register 80.

The above is a description of the image signals Rin, Gin,
This is a one-cycle operation of the color balance correction processing for Bin, and this processing is repeated in synchronization with the input.

[0018]

As described above, in the color balance correction apparatus of the present invention, an appropriate correction coefficient is stored in a register having a very small capacity, and the input image signal and the correction coefficient of the register are stored in a single multiplication circuit. And multiply by
Since the correction process of each color image signal is executed in time series, a large capacity memory is not required, the circuit element cost is lower than before, and several correction coefficients set in the register can be rewritten. Thus, appropriate and fine adjustment can be easily performed in accordance with the characteristics of each camera.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a conventional typical color balance correction device.

FIG. 2 is a schematic configuration diagram of a color balance correction device according to an embodiment of the present invention;

[Explanation of symbols]

Rin, Gin, Bin Input image signal Rout, Gout, Bout Output image signal K11, K12, K13, K21, K22, K23, K31, K32, K33 Correction coefficient 10 Data multiplexer 20 Register group 30 Coefficient multiplexer 40 Multiplication circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-227293 (JP, A) JP-A-6-189120 (JP, A) JP-A-60-216670 (JP, A) 105279 (JP, U) (58) Field surveyed (Int. Cl. ⁷ , DB name) H04N 9/04-9/11 H04N 9/64-9/78

Claims (1)

(57) [Claims] 1. A data multiplexer for sequentially supplying image signals of three colors separated and digitized to one input of a multiplying circuit, and a corrected image signal for one color from the image signals of each color. A coefficient register group for storing nine correction coefficients for three colors of three colors, and a multiplication circuit for switching three correction coefficients for each color from the coefficient register group in synchronization with the data multiplexer. A multiplexer for supplying a coefficient to the other input of the multiplication circuit in order, an addition output circuit section for adding three multiplication results for one color from the multiplication circuit and outputting as a corrected image signal for one color, and the coefficient register Circuit means for writing an arbitrary correction coefficient into a group.