JPH05299651A - Mosfet with back gate material - Google Patents

Abstract

PURPOSE:To prevent conduction from a ground potential to a drain if an amplitude of a signal is deflected to a negative side and to eliminate a negative power source by reversely connecting a P-N junction between a substrate and an epitaxial layer 12 between a back gate electrode and a drain region. CONSTITUTION:If a mute control signal to be applied to a gate electrode 16 is ON in a MOSFET for constituting a muting circuit, an N-type channel layer responsive to a potential difference between a gate potential and a back gate potential is formed on an epitaxial layer 12 between a source region 13 and a drain region 14, the FET is saturated, and a potential of a drain is set to a ground potential. If the control signal is OFF, the channel layer is not formed. In this case, since a P-N junction 20 between the layer 12 and the region 14 and a Z P-N junction 21 between the layer 12 and a substrate 11 are inserted in an anti-series between a back gate electrode 19 and a drain 18, conduction from the ground potential is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a back gate terminal-equipped MOSFE capable of eliminating a negative power source for a back gate.
Regarding T.

[0002]

2. Description of the Related Art FIG. 2 shows a single MOSFET. In the figure, (1) is a P-type semiconductor substrate, and (2) and (3) are N-type.
⁺ Type source / drain region, (4) is a gate oxide film,
(5) is a polysilicon gate electrode, (6) and (7) are
Drain electrode. This MOSFET forms a channel on the surface of the substrate (1) by the potential applied to the gate electrode (5) and controls the current flowing between the source and drain by forming the channel. The formation of the channel is controlled by the potential applied to the gate electrode (5) and is also influenced by the potential of the substrate (1). The substrate (1) is called a back gate. Normally, the substrate (1) is used by short-circuiting to the source potential, but there is a method of applying a negative potential to the substrate (1) in view of circuit requirements.

For example, the AC signal with the DC component cut is M
Transmission ON / O by switching operation of OSFET
A muting circuit that performs FF corresponds to this. That is, it is a circuit in which an ON / OFF signal is applied to the gate, the source is grounded, and the drain is connected to the signal line. MOSF with this circuit grounded (short-circuited to source)
In the case of the ET, when the signal swings to the negative side in the OFF state (not muted), the PN junction between the substrate (1) and the drain region (3) is turned ON and the ground potential is changed to the drain region (3). The current will flow and distort the signal. If a negative potential larger than the signal amplitude is applied to the substrate (1), the PN junction between the substrate (1) and the drain region (3) will not turn on, and the signal will not be distorted.

[0004]

If the muting circuit can be composed of MOSFETs, there is an advantage that the mechanical switch becomes unnecessary and the reliability of the electronic equipment can be increased.
However, the need for a negative power source for the back gate has a drawback that the cost is increased accordingly.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and a MOSFET with a back gate terminal which can eliminate a negative power source by inserting a PN junction between the back gate and the substrate. Is provided.

[0006]

According to the present invention, the PN junction between the substrate (11) and the epitaxial layer (12) forms the back gate electrode (19).
Since it is connected in the reverse direction between the drain region (14) and the drain region (14), no current flows from the ground potential to the drain even when the signal amplitude swings to the negative side.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a sectional view showing a MOSFET of the present invention. In the figure, (11) is an N ⁺ type silicon single crystal semiconductor substrate, (12) is a P type epitaxial layer formed on the substrate (11), (13) and (14) are on the surface of the epitaxial layer (12). Formed N ⁺ type source
Drain region, (15) is an epitaxial layer (1
2) A gate insulating film made of a silicon oxide film covering the surface, (16) is a polysilicon gate electrode formed on the gate insulating film (15), and (17) and (18) are source layers.
Al source / drain electrodes contacting the drain regions (13) and (14), respectively (19) is the substrate (11)
Is a back gate electrode that contacts the back surface of the. An Al electrode for extraction is also formed on the gate electrode (16),
The source, drain, gate, and back gate are all led out with independent external connection leads. That is, this M
The OSFET is a 4-terminal element.

When a muting circuit is formed by this MOSFET, the drain is connected to the signal transmission line, the mute control signal is applied to the gate, and the ground potential (G
ND) is applied, and the ground potential (G
ND) is applied. When the control signal is ON (when muting), it depends on the potential difference between the gate potential and the back gate potential on the surface of the epitaxial layer (12) between the source / drain regions (13) and (14). An N-type channel layer is formed, and the FET operates in saturation to bring the drain potential to the ground potential. As a result, the signal on the line is not transmitted and the mute operation is performed.

On the contrary, when the control signal is OFF (no muting), the FET is turned OFF and no channel is formed between the source / drain regions (13) and (14). At this time, the PN junction (20) between the epitaxial layer (12) and the drain region (14), the epitaxial layer (12) and the substrate (11) are provided between the back gate electrode (19) and the drain electrode (18). ) PN junction (21)
Are inserted in series in the opposite direction. Therefore, even if the transmission signal has a negative potential, the PN junction (21) between the substrate (11) and the epitaxial layer (12) is reverse biased, and no current flows from the ground potential (GND). This relationship is the same until the potential difference between the signal amplitude and the ground potential exceeds the reverse breakdown voltage of the PN junction. Therefore, the positive side (+
The signal amplitude can be accurately transmitted from the side) to the negative side (-).

The reverse breakdown voltage of the PN junction (21) is determined by the impurity concentrations of the substrate (11) and the epitaxial layer (12). Since the impurity concentration of the epitaxial layer (12) can be controlled more accurately than the diffusion, the reverse breakdown voltage can be easily controlled.

[0011]

As described above, according to the present invention, the ground potential (GND) can be used for the back gate bias by inserting the PN junction (21). When configured, it has the advantage that the negative power supply can be omitted.

[Brief description of drawings]

FIG. 1 is a sectional view for explaining the structure of the present invention.

FIG. 2 is a sectional view for explaining a conventional example.

Claims (2)

[Claims] 1. A semiconductor region of one conductivity type, a semiconductor region of the opposite conductivity type forming a PN junction with the semiconductor region of the one conductivity type, and a semiconductor region of the one conductivity type formed on the surface of the semiconductor region of the opposite conductivity type. A source / drain region; a gate insulating film covering the surface of the semiconductor region of the opposite conductivity type; a gate electrode formed on the gate insulating film; A source / drain electrode that makes an ohmic contact, and makes an ohmic contact to the one conductivity type semiconductor region,
MOSFE with a back gate terminal, characterized in that it has a back gate electrode independent of the source electrode.
T. 2. The MOSFET with a back gate terminal according to claim 1, wherein the semiconductor region of one conductivity type is a silicon single crystal semiconductor substrate and the semiconductor region of the opposite conductivity type is an epitaxial layer.