JPH0529147A - Laminated chip transformer - Google Patents

Abstract

PURPOSE:To improve electromagnetic coupling coefficient of a first coil element and a second coil element by setting coil electrodes formed to insulating layers to almost equal coil diameter and setting width of coil electrodes of external layer to the width narrower than the coil electrodes of internal layer in order to reduce migration of magnetic flux at the external layer into the area between the electrodes. CONSTITUTION:A first coil element CL1 is formed by alternately laminating an insulating layer of a first class and an insulating layer of a second class and then connecting coil electrodes 6A to 6D of the insulating layer of the first class via through hole connectors provided on the insulating layer of the second class. Moreover, a second coil element CL2 is formed by connecting the coil electrodes 7A to 7C of the insulating layer of the second class via through holes provided on the insulating layer of the first class. The coil electrodes 6A to 6D, 7A to 7C formed on the insulating layers of the first and second classes are set to almost equal diameter respectively and the width of coil electrodes 6A, 7C of the external layer is set narrower than the width of the coil electrodes 6C, 7B of the internal layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated chip transformer which can be used as various transformers, common mode choke coils, baluns and the like.

[0002]

BACKGROUND OF THE INVENTION The applicant of the present invention has proposed a laminated chip transformer having the following structure in order to reduce the stray capacitance between the ring electrodes of the laminated chip transformer.

In this multilayer chip transformer, a plurality of insulating layers of a first type and a plurality of insulating layers of a second type in which a winding electrode of less than one turn is formed by a conductor film are alternately laminated to form a second layer. The first coil element is formed by connecting the ring electrodes of the first type of insulating layers to each other through the through-hole connector provided in the first type of insulating layer, and is provided in the first type of insulating layer. The second coil element is formed by connecting the ring-shaped electrodes of the second-type insulating layers via the through-hole connector (see FIG. 4).

FIG. 15 is a schematic cross-sectional view of the multilayer chip transformer 101 manufactured in this way. The first type coil electrodes 102A, 102B, 102C and the second coil electrodes 103A, 103B, 103C and the first coil element 1 are alternately laminated with winding diameters that are substantially equal to each other.
04 and the second coil element 105 are wound alternately.

[0005]

However, in the multilayer chip transformer 101, as shown in FIG. 15, the ring-shaped electrodes 102A to 102C and 103A to 1 of the respective layers are provided.
The width of 03C was constant. For this reason, in the vicinity of the wire ring electrodes (for example, 102C and 103A) of the outer layer portion, the wraparound of the magnetic flux φ between the electrodes becomes large, which is a major cause of lowering the electromagnetic coupling coefficient between the coil elements 104 and 105. Was there.

The present invention has been made in view of the above-mentioned drawbacks of the conventional example. An object of the present invention is to reduce the magnetic flux wraparound between electrodes in the outer layer portion of the multilayer chip transformer. To improve the electromagnetic coupling coefficient between the coil element and the second coil element.

[0007]

A multilayer chip transformer of the present invention comprises a plurality of insulating layers of a first type and a second type each having a winding electrode of less than one turn formed by a conductive film.
A stack in which the coil electrodes of each type 1 insulating layer are connected to each other to form a first coil element, and the coil electrodes of each type 2 insulating layer are connected to each other to form a second coil element In the chip transformer, except for the insulating layer where the input / output part of the coil element is formed, the first type insulating layer and the second type insulating layer are alternately laminated, and the through hole connection is provided in the second type insulating layer. A second type insulating layer through a through-hole connector provided in the first type insulating layer by connecting the ring-shaped electrodes of the first type insulating layer to each other via a child. Wire coil electrodes are connected to each other to form a second coil element, and the coil electrodes formed on the first and second insulating layers have substantially the same winding diameter, and the wire of the outer layer portion is It is characterized in that the width of the wheel electrode is made narrower than the width of the wire wheel electrode in the inner layer portion.

[0008]

In the present invention, since the first coil element and the second coil element are alternately wound, the distance between the coil electrodes of each coil element is twice the thickness of the insulating layer, The stray capacitance generated between the ring electrodes can be reduced. Further, since both coil elements are arranged alternately, the mutual induction coefficient also becomes large.

Further, in the present invention, the width of the wire ring electrode of the outer layer portion is made narrower than the width of the wire ring electrode of the inner layer portion, so that it is possible to suppress the inter-electrode wraparound of the magnetic flux in the outer layer portion. It was As a result, the coupling coefficient between the first coil element and the second coil element can be improved,
The transfer characteristics as a transformer can be improved.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A multilayer chip transformer 1 according to an embodiment of the present invention shown in FIGS. 1, 2 and 4 has an equivalent circuit as shown in FIG. 3 and is used as a pulse transformer or a common mode choke coil. It is what is done. The multilayer chip transformer 1 has four layers of ceramic insulating layers 2A, 2B, 2C and 2D that form a first coil element CL1 and three layers of ceramic insulating layers 3A, 3B and 3C that form a second coil element CL2. Are alternately laminated, and protective substrates 5 and 4 are further laminated on the upper and lower surfaces of the laminated body 17. On the surface of the insulating layer 2A of the first layer from the bottom (hereinafter, the layers are sequentially counted from the bottom layer), the conductive paste is printed in a constant width to form a part of the first coil element CL1. / 8-turn wire ring electrode 6A is wired, and one end of the wire ring electrode 6A becomes the external extraction electrode 8,
A flat terminal 9a is provided at the other end. On the surface of the second insulating layer 2B, a wire electrode 6B of about 3/4 turn forming a part of the first coil element CL1 is wired.
A through hole terminal 9c having a through hole structure is provided at one end of the coil electrode 6B so as to face the lower flat terminal 9a.
A flat terminal 10a is provided at the other end. Here, the through hole terminals 9c are printed and baked conductive paste around the upper surface of the through hole penetrating the insulating layer 2B, the inner circumference of the through hole hole and the lower surface of the through hole hole. Both the front and back surfaces of the insulating layer 2B can be electrically connected at the terminal 9c. A conductive paste is printed on the surface of the third insulating layer 3A to form a part of the second coil element CL2.
The wire electrode 7A of the turn is wired, and the wire electrode 7A
One end of is the external extraction electrode 11 and the other end is the flat terminal 1.
2a is provided. Further, the third insulating layer 3A is provided with a through-hole connector 10b having a through-hole structure corresponding to the flat terminal 10a in the lower layer. This through-hole connector 10b also has a structure similar to that of the through-hole terminal 9c, and is capable of conducting both front and back surfaces of the insulating layer 3A. On the surface of the fourth insulating layer 2C, approximately 3/4 which constitutes a part of the first coil element CL1.
The wheel electrode 6C of the turn is wired, and the wheel electrode 6C is
A through-hole terminal 10c having a through-hole structure is provided at one end facing the lower-layer through-hole connector 10b, and a flat terminal 13a is provided at the other end. further,
The insulating layer 2C is provided with a through-hole connector 12b facing the lower flat terminal 12a. Further, on the surface of the fifth insulating layer 3B, a coil electrode 7B having substantially 3/4 turns, which constitutes a part of the second coil element CL2 by the conductor film.
Are wired, and the through-hole terminal 1 is provided at one end of the ring electrode 7B so as to face the through-hole connector 12b in the lower layer.
2c is provided, and the flat terminal 14a is provided at the other end. Further, the insulating layer 3B is provided with a through hole connector 13b facing the lower flat terminal 13a. The first coil element CL1 is formed on the surface of the sixth insulating layer 2D.
Is provided with substantially one turn of the ring electrode 6D, and one end of the ring electrode 6D is provided with a through hole terminal 13c so as to face the lower layer through hole connector 13b. The end is the external extraction electrode 15,
Further, a through hole connector 14b is provided facing the lower flat terminal 14a. In addition, the seventh insulating layer 3
On the surface of C, approximately 3 forming the second coil element CL2 is formed.
A / 4 turn wire ring electrode 7C is provided, a through hole terminal 14c is provided at one end of the wire ring electrode 7C so as to face the lower layer through hole connector 14b, and the other end is connected to the external extraction electrode 16C. Has become.

Further, each of the above-mentioned coil electrodes 6A to 6D, 7A.
7C are designed such that the electrode width increases toward the inner layer portion. For example, the electrode widths of the ring electrodes 6A, 6B, 6C are the narrowest, the electrode widths of the coil electrodes 6C, 7B are the widest, and the electrode widths of the coil electrodes 7A, 6D are intermediate widths.

Therefore, the protective substrate 4 and the insulating layer 2 are
A, 2B, 3A, 2C, 3B, 2D, 3C and the protective substrate 5 are sequentially laminated from the bottom in a state of a green sheet, and they are pressure-bonded to each other and then fired. As a result, the protective substrates 4 and 5 and the insulating layers 2A to 2D and 3A to 3C are sintered and joined to form a laminated body 17, and a conductor film is embedded in each layer in the laminated body 17. Moreover, the ring-shaped electrodes 7A and 7B are connected via the through-hole connector 12b and the through-hole terminal 12c, and the line-shaped electrodes 7B and 7C are connected via the through-hole connector 14b and the through-hole terminal 14c. The second coil element CL2 is formed between the electrodes 11 and 16, and similarly the coil electrodes 6A and 6B are connected via the through hole terminal 9c, and the coil is connected via the through hole connector 10b and the through hole terminal 10c. The electrodes 6B and 6C are connected, the ring electrodes 6C and 6D are connected via the through hole connector 13b and the through hole terminal 13c, and the first coil element CL1 is formed between the external extraction electrodes 8 and 15. Thereafter, as shown in FIG. 2, a conductive paste is printed and baked on the exposed portions of the external extraction electrodes 8, 15 and 11, 16 to form the external electrodes 18, 19, 2.
0, 21 are formed. As a result, the multilayer chip transformer 1 having an equivalent circuit as shown in FIG. 3 is constructed.

In the multilayer chip transformer 1 thus manufactured, the first coil element CL1 and the second coil element CL2 are alternately arranged. Therefore, between the coil electrodes of the coil elements CL1 and CL2. Is twice the thickness of the insulating layer, which reduces the stray capacitance generated between the ring electrodes. Further, since the first coil element CL1 and the second coil element CL2 are alternately arranged, the mutual induction coefficient between the two coil elements CL1 and CL2 also becomes large.

FIG. 1 schematically shows a cross-sectional view of the multilayer chip transformer 1 manufactured as described above, which is composed of three layers of conductors 6A (6B), 6C and 6D. The coil element CL1 and the three-layer coil conductors 7A, 7B,
The second coil element CL2 composed of 7C is formed in the laminated body 17, and the wire loop conductors 6A (6B) to 6D forming the first coil element CL1 and the wire ring forming the second coil element CL2. The conductors 7A to 7C are arranged alternately. Here, the outermost layer of the ring-shaped electrodes 6A (6B), 7C has the narrowest width, and the innermost layer of the ring-shaped electrodes 6D, 6C,
The width of 7A is slightly wider, and the widths of the ring-shaped electrodes 6C and 7B in the inner layer are the widest. in this way,
By narrowing the widths of the ring-shaped electrodes 6A (6B) and 7C in the outer layer, the wraparound between the electrodes of the magnetic flux φ in the outer layer portion is significantly reduced, and the electromagnetic coupling coefficient between the coil elements CL1 and CL2 is reduced. It was possible to improve k.

Next, the effect obtained when the width of the wire ring electrode in the outer layer portion was made smaller than the width of the wire ring electrode in the inner layer portion as described above was examined by FEM (finite element method) simulation.
FIG. 5 shows a multilayer chip transformer 33 having a first coil element CL1 composed of two-layer coil conductors 31A and 31B and a second coil element CL2 composed of two-layer coil conductors 32A and 32B. The outer ring side coil electrodes (hereinafter referred to as outer layer electrodes) 31A, 32B of the multilayer chip transformer 33.
Of the first coil element CL1 and the second coil of the first coil element CL1 in each case by variously changing the width W1 of the first coil element CL1 and the width W2 of the inner-layer-side wire ring electrodes (hereinafter, referred to as inner layer electrodes) 31B and 32A. The self-inductance L2 of the element CL2, the mutual inductance M between the coil elements CL1 and CL2, and the electromagnetic coupling coefficient k were obtained.

In FIG. 6A, the width W2 of the inner layer electrodes 31B and 32A is 1900 μm and the width W1 of the outer layer electrodes 31A and 32B is 300 μm (electrode width ratio r = inner layer electrode width W).
2 / outer layer electrode width W1 = 6.33) The magnetic field in the laminated chip transformer (sample S1) was obtained by FEM simulation, and FIG. 6 (b) is a simplified representation thereof. In this case, the self-inductance of the first and second coil elements CL1 and CL2 is L1 = L2 = 0.12887 × 10 ⁻⁶ H Mutual inductance is M = 0.1199 × 10 ⁻⁶ H Electromagnetic coupling coefficient Was k = 93.15%.

Further, FIG. 7A shows the inner layer electrodes 31B and 3B.
Width W2 of 2A is 1450 μm, outer layer electrodes 31A, 32B
Width W1 was set to 300 μm (electrode width ratio r = 4.83)
The state of the magnetic field in the laminated chip transformer (sample S2) was obtained by FEM simulation, and FIG. 7B is a simplified representation thereof. In this case, the first and second coil elements CL1, CL2
, L1 = L2 = 0.9130 × 10 ⁻⁷ H Mutual inductance, M = 0.8509 × 10 ⁻⁷ H Electromagnetic coupling coefficient k = 93.19%.

Further, FIG. 8A shows the inner layer electrodes 31B and 3B.
The width W2 of 2 A is 950 μm, the width W1 of the outer layer electrodes 31A and 32B is 300 μm (electrode width ratio r = 3.17), and the magnetic field in the laminated chip transformer (sample S3) is obtained by FEM simulation. , FIG. 8 (b) is a simplified representation thereof. In this case, the first and second coil elements CL1, CL2
The self-inductance of L1 = L2 = 0.5360 × 10 ⁻⁷ H Mutual inductance was M = 0.4976 × 10 ⁻⁷ H The electromagnetic coupling coefficient was k = 92.83%.

Further, FIG. 9A shows the inner layer electrodes 31B,
Width W2 of 32A is 650 μm, outer layer electrodes 31A and 32B
Of the magnetic field in the laminated chip transformer (sample S4) having the width W1 of 300 μm (electrode width ratio = 2.17) was obtained by FEM simulation, and FIG. 9B shows it in a simplified manner. It is a thing. In this case, the self-inductance of the first coil element CL1 is L1 = 0.3290 × 10 ⁻⁷ H, the self-inductance of the second coil element CL2 is L2 = 0.3291 × 10 ⁻⁷ H, and the mutual inductance is , M = 0.03038 × 10 ⁻⁷ H The electromagnetic coupling coefficient was k = 92.33%.

When the electrode width ratio r is larger than 1 as shown in the samples S1 to S4 (embodiments of the present invention), the outer layer electrode 31A can be seen from FIGS. 6 (b) to 9 (b). , 32B, no magnetic flux φ wraps around the electrode.

On the other hand, FIG. 10A shows the inner layer electrodes 31B,
Width W2 of 32A is 300 μm, outer layer electrodes 31A and 32B
Has a width W1 of 300 μm (electrode width ratio r = 1.00)
The magnetic field in the laminated chip transformer (sample S5) was obtained by FEM simulation, and FIG. 10 (b) is a simplified representation thereof.
In this case, the first and second coil elements CL1, CL
The self-inductance of No. 2 was: L1 = L2 = 0.1605 × 10 ⁻⁷ H Mutual inductance, M = 0.1421 × 10 ⁻⁷ H The electromagnetic coupling coefficient was k = 88.53%.

Further, FIG. 11A shows the inner layer electrodes 31B,
Width W2 of 32A is 300 μm, outer layer electrodes 31A and 32B
Width W1 of 650 μm (electrode width ratio r = 0.46)
2) The state of the magnetic field in the laminated chip transformer (sample S6) was obtained by FEM simulation, and FIG. 11 (b) is a simplified representation thereof. In this case, the self-inductance of the first coil element CL1 is: L1 = 0.3277 × 10 ⁻⁷ H The self-inductance of the second coil element CL2 is: L2 = 0.3276 × 10 ⁻⁷ H Mutual inductance is , M = 0.26767 × 10 ⁻⁷ H The electromagnetic coupling coefficient was k = 84.45%.

Further, FIG. 12A shows the inner layer electrodes 31B,
Width W2 of 32A is 300 μm, outer layer electrodes 31A and 32B
Has a width W1 of 950 μm (electrode width ratio r = 0.31
6) The state of the magnetic field in the laminated chip transformer (sample S7) was obtained by FEM simulation, and FIG. 12 (b) is a simplified representation thereof. In this case, the first and second coil elements CL1,
The self-inductance of CL2 was L1 = L2 = 0.5323 × 10 ⁻⁷ H mutual inductance, M = 0.4344 × 10 ⁻⁷ H, and the electromagnetic coupling coefficient was k = 81.61%.

Further, FIG. 13A shows an inner layer electrode 31.
The width W2 of B and 32A is 300 μm, and the outer layer electrodes 31A and 3A are
The width W1 of 2B is set to 1900 μm (electrode width ratio r = 0.
158) The state of the magnetic field in the laminated chip transformer (sample S8) was obtained by FEM simulation, and FIG. 13 (b) is a simplified representation thereof. In this case, the first and second coil elements CL
The self-inductance of 1, CL2 was L1 = L2 = 0.1271 × 10 ⁻⁶ H Mutual inductance, M = 0.994 × 10 ⁻⁷ H The electromagnetic coupling coefficient was k = 78.61%.

When the electrode width ratio is 1 or less (r≤1) as shown in the samples S5 to S8 (comparative example), FIG.
As can be seen from FIGS. 13B to 13B, the outer layer electrode 31
The magnetic flux φ wraps around the electrodes near A and 32B.

Inner layer electrode width W of each of the samples S1 to S8
2, the outer layer electrode width W1, the electrode width ratio r, and the electromagnetic coupling coefficient k are collectively shown in Table 1 below.

[0027]

[Table 1]

Further, FIG. 14 illustrates the relationship between the electromagnetic coupling coefficient k and the electrode width ratio r obtained by the samples S1 to S8.

As described above, when the electrode width ratio r is greater than 1, it is possible to suppress the inter-electrode wraparound of the magnetic flux in the vicinity of the outer layer electrode, and the larger the electrode width ratio r, the first coil element. CL1 and the second coil element CL
It was shown that the electromagnetic coupling coefficient k with 2 can be increased.

In the above sample, each coil element has a two-layer structure, but the same result can be obtained by further increasing the number of electrode layers (or the number of turns).

In the above embodiment, the case of the pulse transformer or the common mode choke coil was explained, but in the present invention, one end of the first coil element and one end of the second coil element are commonly connected. It may be a terminal type two-distribution transformer or the like.

[0032]

According to the present invention, the stray capacitance generated between the coil electrodes can be reduced, and the mutual induction coefficient between both coil elements can be increased.

Further, according to the present invention, by making the width of the wire ring electrode of the outer layer portion narrower than the width of the wire ring electrode of the inner layer portion, it is possible to suppress the magnetic flux wraparound between the electrodes in the outer layer portion. .. As a result, the electromagnetic coupling coefficient between the first coil element and the second coil element can be improved, the power conversion efficiency of the transformer can be improved, and the transfer characteristic can be improved.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing a laminated chip transformer according to an embodiment of the present invention.

FIG. 2 is a perspective view of the above embodiment.

FIG. 3 is an equivalent circuit diagram of the above embodiment.

FIG. 4 is a plan view showing a state before laminating each insulating layer in the above-mentioned embodiment.

FIG. 5 is a schematic cross-sectional view showing the structures of Samples S1 to S8 and their inner layer electrode widths and outer layer electrode widths.

6 (a) and 6 (b) are diagrams showing a state of a magnetic field in Sample 1 (Example).

7 (a) and 7 (b) are diagrams showing a state of a magnetic field in Sample 2 (Example).

8A and 8B are diagrams showing the state of a magnetic field in Sample 3 (Example).

9 (a) and 9 (b) are diagrams showing a magnetic field in Sample 4 (Example).

10A and 10B are diagrams showing the state of a magnetic field in sample 5 (comparative example).

11 (a) and 11 (b) are diagrams showing a magnetic field in Sample 6 (Comparative Example).

12 (a) and 12 (b) are diagrams showing a magnetic field in Sample 7 (Comparative Example).

13 (a) and 13 (b) are diagrams showing a magnetic field in Sample 8 (Comparative Example).

FIG. 14 is a diagram showing the relationship between the electrode width ratio and the electromagnetic coupling coefficient obtained from each of the above samples S1 to S8.

FIG. 15 is a schematic cross-sectional view of a layered chip transformer according to a conventional example.

[Explanation of symbols]

 2A to 2D Insulating layer 3A to 3C Insulating layer 6A to 6D Wire ring electrodes 7A to 7C forming first coil element Wire ring electrodes 10b, 12b, 13b, 14b forming second coil element Through hole connector CL1 First coil element CL2 Second coil element

Claims (1)

Claim: What is claimed is: 1. A plurality of insulating layers of the first type and the second type each having a winding electrode of less than one turn formed by a conductive film are laminated to form an insulating layer of the first type. In the multilayer chip transformer in which the first coil element is formed by connecting the wire ring electrodes to each other and the second coil element is formed by connecting the wire ring electrodes of the second type insulating layers, Except for the insulating layer in which the input / output section is formed, the first type insulating layer and the second type insulating layer are alternately laminated, and the first type via the through-hole connector provided in the second type insulating layer. Connecting the ring electrodes of the insulating layer to form the first coil element, and connecting the ring electrodes of the second type of insulating layer to each other through the through-hole connector provided in the first type of insulating layer. To form the second coil element, and the coil electrodes formed on the first and second types of insulating layers are approximately equal to each other. With the have winding diameter, multilayer chip transformer, characterized in that set to be the width of the line wheels electrodes of the outer layer portions narrower than the width of the line wheels electrode of the inner layer portion.