JP2958804B2 - Multilayer chip common mode choke coil - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a multilayer chip common mode choke coil.

[Background Art] As shown in FIG. 5, a commonly used common mode choke coil D is a fired toroid 1
And two sets of windings 2 and 3 on the core, etc., and a capacitor C ₃ ,
It has become connected to C ₄ structure.

However, since such a common mode choke coil D has two sets of windings 2, 3 and four lead wires, a complicated winding process is required, and the manufacturing efficiency is low. The mode choke coil D itself has a disadvantage that the size thereof is large and the cost is high.

Therefore, a laminated common mode choke coil E as shown in FIG. 6 has been proposed. Referring to FIG. 6, reference numerals 11a to 11h denote a group of ferrite green sheets for constituting one of the coils 12, and Ag or Ag and Pd are formed on the surface of each ferrite green sheet 11a to 11h.
Less than one turn of internal conductor patterns 13a to 13h which become a part of one of the coils 12 by an electrode paste mainly composed of
Is printed. Similarly, 14a-14h is the other coil
A group of ferrite green sheets for forming 15, wherein the surface of each ferrite green sheet 14 a to 14 h is printed with an internal conductor pattern 16 a to 16 h of less than one turn which becomes a part of the other coil 15 by electrode paste. I have. Ferrite green sheets 11a-11h and 14a of both groups
14h are alternately stacked in the order shown in FIG. 6, and the connection terminals of the same group of internal conductor patterns 13a to 13h (or 16a to 16h) are connected to different groups of ferrite green sheets 14a to 14g.
(Or 11b to 11h) provided through holes 17a to 17g
(Or 18b to 18h), and two coils 12, 15 are formed by the same group of internal conductor patterns 13a to 13h or 16a to 16h, respectively. Each coil 12,
Both ends of 15 are connected to extraction electrodes 19 and 20 arranged at the corners of the green sheets 11a, 11h, 14a and 14h. Furthermore, both ferrite green sheets 11a to 11h, 14a to 14h
An outer ferrite green sheet 21 on which no internal conductor pattern is printed is laminated on the upper and lower sides of the laminate. The ferrite green sheets 11a-1a thus laminated
1h, 14a to 14h and the outer ferrite green sheet 21
After the pressing, firing is performed, and as shown in FIG. 7, an electrode paste is printed and baked on the outer surface of the laminated chip 22 made of a magnetic sheet, and the external electrodes 23 and 24 electrically connected to the extraction electrodes 19 and 20 are formed. Is formed.

Thus, in the laminated chip 22 made of a magnetic material sheet,
Two coils 12, 15 are formed in a state of being wound around each other, and an equivalent electric circuit diagram thereof is shown in FIG.

[Problem to be Solved by the Invention] The multilayer chip common mode choke coil E having the above structure has a low operating frequency of 10 MHz or less.
It functions as shown in the equivalent circuit diagram of FIG.

However, since the coils 12 and 15 are only separated by one ferrite sheet, the operating frequency is 10
Becomes above MHz, stray capacitance C _s that exist distributed constant between the two coils 12 and 15 is not gradually be ignored, functions as a common mode choke coil is disadvantageously lowered. The cause of this problem, in the conventional laminated chip common mode choke coil E, as shown in FIG. 9, in the high frequency region, through the stray capacitance C _s which occur distributed constant between the two coils 12 and 15 This is because a current i flows between the coils 12 and 15 and the coil does not work as an inductor at all.

In addition, this multilayer chip common mode choke coil E
However, at the time of use, it was necessary to use an external capacitor between both ends of each of the coils 12 and 15.

The present invention has been made in view of the above-described drawbacks of the conventional example, and has as its object to reduce stray capacitance generated in a distributed manner between two coils, while utilizing stray capacitance. To provide a multilayer chip common mode choke coil in which a capacitor can be formed between both ends of the coil.

[Means for Solving the Problems] The multilayer chip common mode choke coil of the present invention comprises:
A magnetic material sheet and an internal conductor pattern are laminated, a laminated chip is formed by the laminated magnetic material sheets, and two internal coils are formed in the laminated chip by the internal conductor pattern, and an internal conductor pattern forming one coil is formed. And a multilayer chip common mode choke coil in which the internal conductor patterns constituting the other coil are alternately arranged,
A high dielectric constant layer is formed on any one of the inner conductor patterns in the middle between the outermost layer inner conductor pattern forming one coil and the outermost layer inner conductor pattern forming the other coil, and each end of both coils is formed. It is characterized in that the capacitance between the parts is increased, the interlayer distance between the internal conductor patterns of both coils in the intermediate layer is increased, and the stray capacitance between the coils in the intermediate layer is reduced.

[Operation] In the present invention, the interlayer distance between the internal conductor patterns of the two coils in the intermediate layer is increased to reduce the stray capacitance (line-to-line distributed capacitance) generated in a distributed manner between the two coils in the intermediate portion. Therefore, it is possible to prevent a current from flowing between the two coils through this line-to-line distributed capacitance, and particularly to improve the function of the common mode choke coil as an inductor in a high frequency range.

In addition, since a high dielectric constant layer is provided between the internal conductor patterns of both coils, a large stray capacitance can be generated between the ends of both coils. By using this stray capacitance as a capacitor, a separate capacitor can be used. Can be unnecessary. Therefore, it is possible to reduce the time and effort for mounting and reduce the number of components, thereby reducing the cost and size.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 shows a state before lamination of a common mode choke coil A in one embodiment of the present invention. The construction of this embodiment is similar to that of the second conventional example E shown in FIGS.
Is similar to that of the second conventional example E, the same reference numerals are given to the same parts, the description is omitted, and the description will focus on the differences.

As shown in FIG. 1, a dielectric paste having a dielectric constant higher than that of ferrite is applied on the inner conductor pattern 16a printed on the upper surface of the ferrite green sheet 14a of the first layer constituting the coil 15 by coating. A dielectric layer 31 is formed. Similarly, the inner conductor pattern 1 printed on the upper surface of the lowermost ferrite green sheet 14h constituting the coil 15
A dielectric paste having a higher dielectric constant than ferrite is applied also on 6h to form a high dielectric constant layer 32. The composition of these high dielectric layers 31 and 32 is expressed as Pb (M _1/3 Nb _2/3 ) O ₃ when M is a divalent transition metal, and the detailed composition will be described later. Therefore, when the common mode choke coil A is manufactured by stacking and firing and integrating the ferrite green sheets, as shown in FIG. 2, the internal conductor pattern 13a of the first layer of the coil 12 and the first A high dielectric constant layer 31 is interposed between the internal conductor pattern 16a of the coil and the internal conductor pattern 13h of the lowermost layer of the coil 12 and the internal conductor pattern 16h of the lowermost layer of the coil 15 similarly. The dielectric layer 32 is sandwiched between the internal conductor patterns 13
between a and 16a and between the internal conductor patterns 13h and 16h,
Large capacitances C ₁ and C ₂ are respectively formed. That is, as shown in the equivalent circuit of FIG.
Capacitances C1 and C2 are formed between the respective ends of the 15. However, the extraction electrodes 19 and 20, the through holes 17a and 33, and the end 34 of the internal conductor pattern 16h are not coated with the dielectric paste and are not covered with the high dielectric constant layers 31 and 32.

On the other hand, the second layer and the coil 15
Ferrite green sheets from the first layer to the second layer from below
11b to 11g and 14a to 14g have a larger thickness than the conventional ferrite green sheet. As a result, the inner conductor pattern 16a of the first layer of the coil 15 and the inner conductor pattern 13b of the second layer of the coil 12 are formed. , Between the second-layer internal conductor pattern 13b of the coil 12 and the second-layer internal conductor pattern 16b of the coil 15,..., From below the coil 15 to the second-layer internal conductor pattern 16g and the coil 12 , The distance between the respective layers between the inner conductor pattern 13h of the first layer and the first layer is wider than that of the prior art, whereby the line stray capacitance C _S generated in the conventional multilayer chip common mode choke coil is reduced. The occurrence is prevented. In addition, as a method of reducing the inter-line stray capacitance of these intermediate portions, in addition to the method of increasing the thickness of the ferrite green sheet of the intermediate portion as described above, a through-hole green sheet is inserted between the ferrite green sheets. Alternatively, the distance between the internal conductors may be increased. That is, one or a plurality of through-hole green sheets are sandwiched between the ferrite green sheets between the ferrite green sheet 14a of the first layer of the coil 15 and the ferrite green sheet 11h of the lowermost layer of the coil 12 to form the through-hole green sheet. May be connected to each other at necessary connection points of the internal conductor pattern shown in FIG.

FIG. 3 is an equivalent circuit diagram of the laminated chip common mode choke coil A formed as described above, and the capacitors C ₁ and C ₂ are provided between the respective ends of the coil 12 and the coil 15. Are formed, and the line-to-line distribution capacitance is eliminated.

The values of the capacities C ₁ and C ₂ are based on the ferrite green sheet 11.
a, 11h thickness, internal conductor patterns 13a, 16a, 13h, 16h
Can be adjusted according to the electrode width, the dielectric constant of the dielectric paste, and the like.

Next, the composition of the dielectric paste used to form the high dielectric constant layer will be described. As typified by Pb (Ni _1/3 Nb _2/3 ) O ₃ , Pb (M _1/3 Nb _2/3 ) O ₃ generally sinters at a low temperature, has a high dielectric constant, Some things go beyond. However, even if these are simply applied as a dielectric paste between opposing internal electrode patterns, the stray capacitance between the internal electrode patterns does not increase because of the presence of ferrite green.

Therefore, in a Pb (M _1/3 Nb _2/3 ) O ₃ dielectric paste, this dielectric paste and a ferrite green sheet (for example, a Ni—Cu—Zn ferrite) are easily diffused. Thus, the inventors considered that the composition of the dielectric paste was shifted. That is, in the Pb (M _1/3 Nb _2/3 ) O ₃ system, the molar ratio of a component equivalent to M is a chemical logical quantity.
If it is less than 1/3, the transition metal in the ferrite diffuses into the dielectric paste when the dielectric paste applied on the internal conductor pattern is laminated with the ferrite green sheet and fired by this operation At the same time, the transition metal in the dielectric paste also easily diffuses into the ferrite green sheet, resulting in a layer in which the dielectric paste and the ferrite green sheet are diffused with each other. Therefore, the dielectric paste for forming a high dielectric constant layer, Pb (M _1/3 Nb _2/3) than O ₃ reduced the molar ratio of M Pb (M _1/3 Nb _2/3 ) were used O ₃ based dielectric paste. As a result, the dielectric constant between each end of the coil 12 and the coil 15 increased, and large capacitances C ₁ and C ₂ could be obtained.

For example, FIG. 4 shows that the composition of the dielectric paste is Pb (Ni
_{1 / 3−x} Nb _2/3 ) O _{3−x / 3} , the value of x was varied from 0 to 1/3, and the results of measuring the dielectric constant when using the dielectric paste of each composition are shown. ing. As is clear from this, when x was increased to decrease the Ni component, the dielectric constant gradually increased and the capacitance C increased. Further, in this one measurement example, the capacity could be changed in a range of about two digits by changing the molar ratio of the transition metal, and the capacity could be designed in this range.

[Effects of the Invention] In the present invention, it is possible to prevent a current from flowing between the two coils through a line-distributed capacitance generated between the intermediate portions of the two coils. High frequency characteristics could be improved.

In addition, since a high dielectric constant layer is provided between the internal conductor patterns of both coils between the ends of both coils, a large stray capacitance can be generated between the ends of both coils,
The use of this stray capacitance as a capacitor eliminates the need for a separate capacitor. Therefore, it is possible to reduce the time and effort for mounting and reduce the number of components to reduce the cost and size.

[Brief description of the drawings]

FIG. 1 is a perspective view of an embodiment of the present invention before lamination and firing, FIG. 2 is an enlarged cross-sectional view showing a part of a laminated chip common mode choke coil of the same, and FIG. FIG. 4 is a circuit diagram, FIG. 4 is a diagram showing a relationship between a change in composition of a Pb (Ni _1/3 Nb _2/3 ) O ₃ -based dielectric paste and capacitance, FIG. 5 is a schematic diagram of a conventional example, and FIG. FIG. 7 is a perspective view showing a laminated chip common mode choke coil of another conventional example before lamination and firing, FIG. 7 is an external perspective view of the same, FIG. 8 is an equivalent circuit diagram of the same, and FIG. It is a figure showing a problem. 11a to 11h: Ferrite green sheet 12: Coil 13a to 13h: Internal conductor pattern 14a to 14h: Ferrite green sheet 15: Coil 16a to 16h: Internal conductor pattern 22: Laminated chip

Claims (1)

(57) [Claims] A magnetic material sheet and an internal conductor pattern are laminated, a laminated chip is formed by the laminated magnetic material sheets, two coils are formed in the laminated chip by the internal conductor pattern, and one coil is formed. In a multilayer chip common mode choke coil in which the internal conductor patterns constituting the other coil and the internal conductor patterns constituting the other coil are alternately arranged, the innermost conductor pattern constituting the outermost layer constituting the one coil and the outermost layer constituting the other coil A high dielectric constant layer is formed on one of the internal conductor patterns in the middle of the internal conductor pattern to increase the capacitance between the ends of the two coils, and the interlayer distance between the internal conductor patterns of the two coils in the intermediate layer Characterized in that the stray capacitance between the two coils in the intermediate layer is reduced, Le.