JPH0528872B2 - - Google Patents
Info
- Publication number
- JPH0528872B2 JPH0528872B2 JP20414387A JP20414387A JPH0528872B2 JP H0528872 B2 JPH0528872 B2 JP H0528872B2 JP 20414387 A JP20414387 A JP 20414387A JP 20414387 A JP20414387 A JP 20414387A JP H0528872 B2 JPH0528872 B2 JP H0528872B2
- Authority
- JP
- Japan
- Prior art keywords
- address
- frame memory
- memory
- buffer
- frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000872 buffer Substances 0.000 claims description 69
- 238000006243 chemical reaction Methods 0.000 claims description 18
- 238000010586 diagram Methods 0.000 description 15
- 238000000034 method Methods 0.000 description 8
- XBDRAUPLGHAFCU-UHFFFAOYSA-N 3-[6-amino-5-(6-ethoxynaphthalen-2-yl)pyridin-3-yl]-n-[2-(dimethylamino)ethyl]benzamide Chemical compound C1=CC2=CC(OCC)=CC=C2C=C1C(C(=NC=1)N)=CC=1C1=CC=CC(C(=O)NCCN(C)C)=C1 XBDRAUPLGHAFCU-UHFFFAOYSA-N 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000009877 rendering Methods 0.000 description 1
Landscapes
- Image Input (AREA)
- Digital Computer Display Output (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20414387A JPS6448174A (en) | 1987-08-19 | 1987-08-19 | Frame memory address converting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20414387A JPS6448174A (en) | 1987-08-19 | 1987-08-19 | Frame memory address converting circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6448174A JPS6448174A (en) | 1989-02-22 |
| JPH0528872B2 true JPH0528872B2 (de) | 1993-04-27 |
Family
ID=16485547
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20414387A Granted JPS6448174A (en) | 1987-08-19 | 1987-08-19 | Frame memory address converting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6448174A (de) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4859552B2 (ja) * | 2006-06-21 | 2012-01-25 | 株式会社ダイゾー | エアゾール製品 |
-
1987
- 1987-08-19 JP JP20414387A patent/JPS6448174A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6448174A (en) | 1989-02-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5388207A (en) | Architecutre for a window-based graphics system | |
| US5170468A (en) | Graphics system with shadow ram update to the color map | |
| RU2134447C1 (ru) | Устройство пересылки данных и видеоигровое устройство, в котором оно используется | |
| US7602389B2 (en) | Graphic processing apparatus and method | |
| US4763119A (en) | Image processing system for area filling of graphics | |
| US5056044A (en) | Graphics frame buffer with programmable tile size | |
| US5025249A (en) | Pixel lookup in multiple variably-sized hardware virtual colormaps in a computer video graphics system | |
| US5815169A (en) | Frame memory device for graphics allowing simultaneous selection of adjacent horizontal and vertical addresses | |
| US4849747A (en) | Display data transfer control apparatus applicable for display unit | |
| EP0240410A2 (de) | Bildelementenverabeitungseinheit | |
| US5029105A (en) | Programmable pipeline for formatting RGB pixel data into fields of selected size | |
| JPH04222069A (ja) | グラフィックス表示システム及び方法 | |
| US5404448A (en) | Multi-pixel access memory system | |
| EP0658858B1 (de) | Graphisches Rechnersystem | |
| JPH0377530B2 (de) | ||
| EP0525986B1 (de) | Gerät mit schneller Kopierung zwischen Rasterpuffern in einem Anzeigesystem mit Doppel-Pufferspeichern | |
| JPH0535879B2 (de) | ||
| US5539873A (en) | Picture storage apparatus and graphic engine apparatus | |
| JPH0528872B2 (de) | ||
| US5895502A (en) | Data writing and reading method for a frame memory having a plurality of memory portions each having a plurality of banks | |
| US5255366A (en) | Address processing unit for a graphics controller | |
| US6677950B1 (en) | Graphics computer | |
| JPS58136093A (ja) | 表示制御装置 | |
| JPS63304293A (ja) | 表示メモリ制御回路 | |
| JP3278853B2 (ja) | 図形描画装置 |