JPH0527864A - Power failure compensating structure for microcomputer equipment - Google Patents

Abstract

PURPOSE:To prevent a control instruction from being performed at a wrong time in the case the power failure occurs within the power failure compensation time by stopping a high frequency oscillation part with a power failure signal and simultaneously supplying a system clock signal from a low frequency oscillation part. CONSTITUTION:When a supply of voltage V1 from an external power source is stopped, lithium battery E in place of a voltage regulator F maintaines the output voltage V2 of regulated power supply circuit B. But a low signal is inputted in the input port A7 of a microcomputer board A by a voltage detection element G. An arithmetic processing part M recognizes that an external power source is interrupted via the input port A7, switches so that the common terminal of a signal switching part P is connected to the side of time clock terminal A5, turns a crystal oscillator K1 off, executes an arithmetic processing by 32kHz clock signal of a crystal oscillator K2 and a timer processing part N executes the arithmetic processing by the 32kHz clock signal of the crystal oscillator K2. Therefore, the clock of a microcomputer equipment for timer control itself does not stop and current consumption is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power failure compensation structure for microcomputer equipment.

[0002]

2. Description of the Related Art A conventional power failure compensation structure for a timer control microcomputer device is designed to extend a backup time of a RAM (random access memory) at the time of power failure from a power failure compensation battery to a RAM (random access memory) of a microcomputer board. ) Only backed up. Therefore, the arithmetic processing unit of the microcomputer board, the clock processing unit, the high-frequency oscillator for supplying the system clock signal for driving the microcomputer, and
The low-frequency oscillator that supplies the clock signal for clocking by the microcomputer was turned off.

[0003]

Therefore, in the conventional microcomputer device for timer control which needs to perform the timekeeping process by the microcomputer, even if the power failure is within the power failure compensation time,
Although the data saved in the RAM is saved during the power failure period, the clock processing of the microcomputer device itself stops because the clocking process stops. Therefore, even if the microcomputer device for timer control starts operating again after the power is restored, the clock of the microcomputer device for timer control itself is delayed by the power failure time.
Therefore, even if there is a power failure within the power failure compensation time, the timer-controlled microcomputer device will output a control instruction at a wrong time if there is a power failure.

The present invention has been made in order to solve the above problems, and an object of the present invention is to measure the time and the RA of a microcomputer without shortening the power failure compensation time.
Another object of the present invention is to provide a power failure compensation structure for a microcomputer device that can back up M and does not output a control instruction at a wrong time if there is a power failure within the power failure compensation time.

[0005]

In order to solve the above-mentioned problems, the present invention supplies a high-frequency oscillator for supplying a system clock signal for driving a microcomputer and a clock signal for clocking by the microcomputer. Microcomputer device for timer control, which includes a low-frequency oscillator, a voltage detector that monitors the voltage of the external power supply for driving the microcomputer and outputs a power failure signal, and a power failure compensation battery for backing up the microcomputer in the event of a power failure In the power failure compensation structure, the high frequency oscillator is stopped by a power failure signal from the voltage detector, and the system clock signal is supplied from the low frequency oscillator.

[0006]

With the above configuration, when the voltage of the external power supply for driving the microcomputer drops, the voltage detection unit detects the drop in the voltage of the external power supply and outputs a power failure signal. Then, the high-frequency oscillator that supplies the system clock signal for driving the microcomputer is stopped, and the clock signal from the low-frequency oscillator is supplied as the system clock signal for driving the microcomputer.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a power failure compensation structure for a microcomputer device according to the present invention will be described below with reference to FIG.

FIG. 1 is a circuit block diagram showing a main part of a power failure compensation structure of a timer control microcomputer device. As shown in FIG. 1, the microcomputer board A of the microcomputer device for timer control has power supply terminals A _1, A for receiving power supply.
₂ and a system clock terminal A _3, A for generating a system clock signal for driving a microcomputer
And _4, a timing clock terminal A _5, A ₆ for generating a timing clock signal for timing process by the microcomputer, an input port A ₇ for receiving a power failure signal will be described later.
Further, the microcomputer board A includes an arithmetic processing unit M, a clock processing unit N, and a signal switching unit P that switches an input signal by the logic processing of the arithmetic processing unit M.

DC voltage V which is always stable₂The micom baud
Stabilized power supply circuit B that supplies to
V₁Power supply terminal B that receives the supply of_1,B₂And the specified output voltage
Pressure V ₂Output terminal B for outputting_3,B_FourAnd the power failure signal described later
Power failure signal terminal B that outputs_FiveIt has and. Also, cheap
The regulated power supply circuit B has a voltage V₁To the predetermined output voltage V₂Sir
Voltage regulator F and backflow prevention diode D
And the voltage V₁Back up the microcomputer board A in case of power failure
Charging / discharging battery equivalent to the battery for power failure compensation.
Tumor battery E and voltage V₁Of power failure signal
From the voltage detection element G corresponding to the voltage detection unit that outputs
It is configured.

Next, the connection relationship will be described. In the stabilized power supply circuit B, the input terminal of the voltage regulator F is connected to the power supply terminal B _1, and the output terminal of the voltage regulator F is connected to the anode of the diode D. The cathode of the diode D is connected to the output terminal B ₃ via the resistor R ₁ . The positive electrode of the lithium battery E is connected to the output terminal B ₃ via the resistor R ₂ . The input terminal of the voltage detection element G is connected to the power supply terminal B _1, and the output terminal of the voltage detection element G is connected to the power failure signal terminal B ₅ . Also, the output terminal B ₃
A pull-up resistor R ₃ is connected between the power failure signal terminal B ₅ and the power failure signal terminal B ₅ . The power supply terminal B ₂ , the output terminal B ₄ , the common terminal of the voltage regulator F, the negative electrode of the lithium battery E, and the common terminal of the voltage detection element G are grounded.

The microcomputer board A has a system clock.
Lock terminal A_3,A_FourA crystal equivalent to the high-frequency oscillator
Resonator K₁(2MH_Z) Is connected and clock clock terminal A
_Five,A ₆A crystal oscillator K corresponding to a low-frequency oscillator
₂(32KH_Z) Is connected. In addition, system black
Terminal A₃The clock signal of
Clock clock terminal A_FiveThe clock signal of
It is connected to the clock processing unit N and the other input of the signal switching unit P is connected.
It is connected to the force section. The common part of the signal switching unit P is a calculation process.
It is connected to the part M.

The microcomputer board A and the stabilized power supply circuit B are connected as follows. That is, the power supply terminal A ₁ is the output terminal B ₃ , and the power supply terminal A ₂ is the output terminal B 3.
₄ , the input port A ₇ is connected to the power failure signal terminal B ₅ , respectively.

Therefore, the power failure compensation structure of the timer controlling microcomputer device shown in FIG. 1 operates as follows. That is, when the predetermined voltage V ₁ is stably supplied from the external power source, the voltage regulator F charges the lithium battery E through the diode D and outputs the predetermined voltage from the output terminal B ₃ of the stabilized power circuit B. Output V ₂ . Further, since the predetermined voltage V ₁ is supplied from the external power supply, the voltage detection element G maintains the power failure signal terminal B ₅ of the stabilized power supply circuit B at High. In other words, microcomputer board A
A high signal is input to the input port A ₇ of.

The arithmetic processing unit M constantly monitors the input port A ₇ . When a high signal is input to the input port A ₇ , the arithmetic processing unit M maintains the signal switching unit P in a state in which the common terminal of the signal switching unit P is connected to the system clock terminal A ₃ side. That is, the arithmetic processing unit M performs arithmetic processing with a clock signal of 2 MH _Z crystal oscillator K _1,
Timer processing unit N performs time counting process with a clock signal of 32KH _Z crystal oscillator K _2.

If the supply of the voltage V ₁ from the external power supply is stopped for some reason, the voltage regulator F cannot output the predetermined voltage V _2, and instead of the voltage regulator F, the lithium battery E uses the stabilized power supply circuit B. Output voltage V
Keep ₂ However, since the supply of the voltage V ₁ from the external power supply is stopped, the voltage detection element G sets the power failure signal terminal B ₅ of the stabilized power supply circuit B to Low. That is, the Low signal is input to the input port A ₇ of the microcomputer board A.

Then, the arithmetic processing unit M recognizes that the external power supply has failed through the input port A ₇ , and the arithmetic processing unit M
Switches the signal switching unit P so that the common terminal of the signal switching unit P is connected to the clock terminal A ₅ side. That is,
The crystal oscillator K ₁ is turned off, the arithmetic processing unit M executes arithmetic processing with the clock signal of 32 KH _Z of the crystal oscillator K ₂ , and the clock processing unit N uses the clock signal of 32 KH _Z of the crystal oscillator K _2. Executes timing processing. Then, although the arithmetic processing speed of the arithmetic processing unit M is reduced, the arithmetic processing unit M can maintain the ability to arithmetically process the data from the timing processing unit N, and even if the external power source is interrupted, the microcomputer device for timer control itself. The clock keeps counting up. The system clock signal for the microcomputer board A with the current consumption of the crystal oscillator K ₁ is eliminated from 2 MH _Z 3
Since reduced to 2KH _Z, the amount of current consumption microcomputer board A is lowered.

When the supply of the power supply voltage V ₁ from the external power supply is resumed, the voltage regulator F charges the lithium battery E and outputs a predetermined voltage V ₂ from the output terminal B ₃ of the stabilized power supply circuit B. To do. Further, the voltage detection element G sets the power failure signal terminal B ₅ of the stabilized power supply circuit B to High. That is, the High signal is input to the input port A ₇ of the microcomputer board A. Then, the arithmetic processing unit M switches the signal switching unit P to a state in which the common terminal of the signal switching unit P is connected to the system clock terminal A ₃ side. That is, the arithmetic processing unit M performs arithmetic processing with a clock signal of 2 MH _Z crystal oscillator K _1, timing process unit N performs time counting process with a clock signal of 32KH _Z crystal oscillator K _2.

Therefore, even if there is a power failure in the power supply voltage V ₁ of the external power supply, in the power failure compensation structure of the microcomputer device for timer control shown in FIG. 1, only the RAM of the microcomputer board A is backed up by the lithium battery E. Compared with the conventional power outage compensation structure of the microcomputer device for timer control, if the power outage compensation time is not so short, and if the power outage is within the power outage compensation time, the control instruction is output at a wrong time. Is gone.

The present invention is not limited to the embodiment, and the lithium battery E may be a large-capacity capacitor, and the operational relationship between the voltage detection element G and the signal switching section P is the logic processing of the arithmetic processing section M. It is needless to say that the input signal may be switched by the contact of the relay by using the relay as an exciting coil of the voltage detection element instead of switching the input signal by. Further, the microcomputer board A may be a monolithic IC.

[0020]

Since the power failure compensation structure of the microcomputer device of the present invention is configured as described above, the power failure compensation time does not become so short, and if the power failure is within the power failure compensation time, the time will be incorrect. It is possible to provide a power failure compensation structure for a microcomputer device that does not output a control instruction.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing a main part of an embodiment of a power failure compensation structure for a microcomputer device according to the present invention.

[Explanation of symbols] E Battery for power failure compensation G Voltage detector K ₁ High frequency oscillator K ₂ Low frequency oscillator V ₁ External power supply voltage

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[Procedure amendment]

[Submission date] November 1, 1991

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction content]

Next, the connection relationship will be described. In the stabilized power supply circuit B, the input terminal of the voltage regulator F is connected to the power supply terminal B _1, and the output terminal of the voltage regulator F is connected to the anode of the diode D. The cathode of the diode D is connected to the output terminal B _3. The positive electrode of the lithium battery E is connected to the output terminal B ₃ via the resistor R ₂ . The input terminal of the voltage detection element G is connected to the power supply terminal B _1, and the output terminal of the voltage detection element G is connected to the power failure signal terminal B ₅ . Also, output terminal B ₃ and power failure signal terminal B ₅
A pull-up resistor R ₃ is connected between the and. Then, the power supply terminal B ₂ , the output terminal B ₄ , the voltage regulator F
, The negative terminal of the lithium battery E, and the common terminal of the voltage detecting element G are grounded.

[Procedure Amendment 2]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 1

[Correction method] Change

[Correction content]

[Figure 1]

Claims (1)

Claim: What is claimed is: 1. A high frequency oscillating section for supplying a system clock signal for driving a microcomputer, a low frequency oscillating section for supplying a clocking clock signal for performing time counting processing by a microcomputer, and a microcomputer for driving a microcomputer. In a power failure compensation structure of a microcomputer device for timer control, comprising a voltage detection section that monitors a voltage of an external power source and outputs a power failure signal, and a power failure compensation battery for backing up the microcomputer in the event of a power failure, the voltage detection section is provided. A power failure compensation structure for a microcomputer device, characterized in that the high frequency oscillator is stopped by a power failure signal from the system clock signal and the system clock signal is supplied from the low frequency oscillator.