JPH07191780A - Clock device - Google Patents

Abstract

PURPOSE:To restart a clock operation from a correct time when power supply is stopped and, then, restarted without providing a back-up battery with large capacitance or a sub-clock signal generating circuit. CONSTITUTION:A system control circuit 25 executes reading based on terminal voltage data h indicating the voltage of one terminal of a capacitor C1, generates a control signal i and supplies it to a read-only storage circuit 29 so that characteristic data j is read from the read-only storage circuit 29. The system control circuit 25 generates electric discharge time data indicating time in which the capacitor C1 executes electric discharge from characteristic data j and supplies it to a clocking circuit 26 as addition data k. Thus, the clocking operation can be restarted from the correct time when power supply is stopped and, then, restarted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timepiece device capable of performing a timekeeping operation at an accurate time even when power supply is stopped and then restarted, and more particularly to a timepiece device capable of reducing manufacturing cost.

[0002]

2. Description of the Related Art Generally, in an electronic device having a timer reservation mechanism such as a VTR or an audio tape recorder, an AC generated from an AC power supply voltage (hereinafter referred to as an AC power supply voltage) is used.
It has a built-in clock device that keeps time by counting pulse signals and clock signals created by the vibration of crystal oscillators. An electronic device with such a built-in clock device has a power supply from the outside in order to enable the timekeeping operation at an accurate time when the power supply from the outside is stopped and restarted due to a power failure or the like. As supplied,
The high-frequency clock signal or AC pulse signal from the main clock signal generation circuit is used to operate the microcomputer of the timepiece device at a large current and at high speed. The microcomputer of the timepiece device is operated at a low current and a low speed by using the signal of the low clock signal and the power source supplied by the backup battery.

In such a conventional timepiece device, when the power supply is stopped, the backup battery operates with a small amount of electric power, so that it can operate for a long time, and the power supply is resumed in the case of a normal power failure. However, it is necessary to provide a large-capacity backup battery and a sub-clock signal generation circuit, which increases the manufacturing cost of electronic equipment incorporating such a timepiece device. .

[0004]

In the conventional timepiece device described above, a large capacity backup battery and a sub clock signal generation circuit must be provided in order to continue the timing operation when the power supply is stopped. However, the manufacturing cost of the electronic device incorporating such a timepiece device is increased.

In view of the above, the present invention eliminates the above-mentioned problems, and provides a timing operation from an accurate time when power supply is stopped and restarted without providing a large-capacity backup battery or a sub-clock signal generation circuit. The purpose is to provide a timepiece device that can be restarted.

[0006]

The timepiece device of the present invention according to the present invention creates and outputs a DC voltage having a predetermined voltage value from a power supply voltage from a power supply and outputs energy by the power supply voltage from the power supply. And a power supply circuit that creates and outputs a DC voltage showing a predetermined voltage value from the stored energy when the power supply voltage is no longer supplied from the power supply, and whether or not the power supply voltage is supplied from the power supply. A detection circuit for detecting a power supply voltage, a capacitor charged by the power supply voltage from the power supply circuit, and a switching element provided on a path for supplying the power supply voltage from the power supply circuit to the capacitor and turning on / off the supply of the power supply voltage to the capacitor When,
A discharge circuit that gradually discharges the electric charge stored in the capacitor when the switching element is turned off, a clock circuit that clocks time using the DC voltage from the power supply circuit as a power supply, the terminal voltage of the capacitor, and the switching When the detection result of the detection circuit indicates that the power supply voltage is being supplied from the power supply circuit, the storage circuit that stores the data indicating the relationship with the time when the element has been turned off is used to measure the time. In addition, the switching element is turned on, and when the detection result of the detection circuit does not indicate that the power supply voltage is being supplied from the power supply, the time counting circuit is stopped and the switching element is turned off. However, if the detection result of the detection circuit is switched from the state showing that the power supply voltage is being supplied from the power source to the state not showing, The switching element than the terminal voltage of the serial capacitor calculates the time that has been turned off, the calculated time the counting circuit is characterized by comprising a system control circuit for adding the time measured.

[0007]

According to such a configuration, when the detection result of the detection circuit is switched from the state showing that the power supply voltage is being supplied from the power source to the state not showing, the system control circuit causes the terminal of the capacitor to The time during which the switching element is off is calculated from the voltage, and this calculated time is added to the time at which the time counting circuit is provided, so that power can be supplied without providing a large-capacity backup battery or sub clock signal generation circuit. When stopped and restarted, the timing operation can be restarted from the correct time.

[0008]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a timepiece device according to the present invention.

In FIG. 1, reference numeral 11 is an input terminal to which an AC power supply voltage a from a commercial AC power supply is introduced, and the AC power supply voltage a introduced to the input terminal 11 is supplied to a power supply circuit 12. The power supply circuit 12 converts the supplied AC power supply voltage a into a DC power supply voltage (hereinafter referred to as DC power supply voltage) b and supplies the DC power supply voltage b to the input terminal 21 of the microcomputer 20, and at the same frequency as the AC power supply voltage a. The pulse c is supplied to the input terminal 22 of the microcomputer 20. Further, the power supply circuit 12 is backed up by a small-capacity capacitor, and even when the supply of the AC power supply voltage a is stopped, the DC power supply voltage b and the AC pulse are kept until the energy stored in the capacitor becomes a predetermined value or less. c can be supplied to the microcomputer 20.

The microcomputer 20 is composed of a one-chip microcomputer, uses the DC power supply voltage b as a power supply voltage, and whether the AC power supply voltage a is normally supplied to the power supply circuit 12 based on the AC pulse c. That is, the power supply voltage is output from the output terminal 23 and the voltage value of the output terminal 23 is detected based on the detection result.

Output terminal 23 of the microcomputer 20
Is connected to one terminal of the capacitor C1. The other terminal of the capacitor is connected to the reference potential point. One terminal of the capacitor C1 is connected to the other terminal of the capacitor C1 via the discharge circuit 13 including a resistor having a large resistance value.

The microcomputer 20 will be described in detail below.

The DC power supply voltage b from the power supply circuit 12 introduced to the input terminal 21 is the power failure detection circuit 24, the system control circuit 25, the clock circuit 26, the clock signal generation circuit 27,
It is supplied as a power supply voltage to an analog / digital conversion circuit (hereinafter referred to as an A / D conversion circuit) 28 and a read-only storage circuit 29, and is also led to one terminal of the switch SW1. The other terminal of the switch SW1 is connected to the input terminal of the A / D conversion circuit 28 and also the output terminal 23.
Connected to.

The AC pulse c from the power supply circuit 12 guided to the input terminal 21 is supplied to the power failure detection circuit 24 and the time counting circuit 26. The power failure detection circuit 24 supplies the power failure detection signal d indicating the energized state to the system control circuit 25 when the AC pulse c is supplied as a normal pulse signal,
When the AC pulse b is not supplied as a normal pulse signal, that is, after the pulse of the AC pulse b is supplied, the cycle of the commercial AC power supply (for example, 1/60 seconds in the case of a 60 Hz commercial AC power supply) elapses. Even if the pulse is not supplied, the power failure detection signal d indicating a power failure is supplied to the system control circuit 25.

The system control circuit 25 includes the power failure detection circuit 2
The ON / OFF control signal e is created based on the power failure detection signal d from 4 and is supplied to the control signal input terminal of the switch SW1 to control the ON / OFF of the switch SW1.

Further, the system control circuit 25 creates an oscillation control signal f based on the DC power supply voltage b from the power failure detection circuit 24 and supplies it to the clock signal generation circuit 27.

The clock signal generation circuit 27 starts or stops the oscillation based on the oscillation control signal f and supplies the system control circuit 25 with a system clock signal g which serves as a reference for the operation of the system control circuit 25.

The A / D conversion circuit 28 converts the voltage of the output terminal 23 into digital terminal voltage data h and supplies it to the system control circuit 25.

The system control circuit 25 includes the power failure detection circuit 2
4 based on the power failure detection signal d from the A / D conversion circuit 28
From the terminal voltage data h, read control signal i is created based on the terminal voltage data h, and the read control signal i is supplied to the read-only memory circuit 29. The read-only memory circuit 29 stores the characteristic data j indicating the characteristics of the discharge time and the terminal voltage of the capacitor C1 when the capacitor C1 is charged by the DC power supply voltage b and then the charge of the capacitor Cl is discharged by the discharge circuit 13. The characteristic data j that has been stored and is read out based on a read control signal from the system control circuit 25 is supplied to the system control circuit 25.

The system control circuit 25 creates discharge time data indicating the time at which the capacitor C1 has discharged from the characteristic data j from the read-only memory circuit 29, and based on the power failure detection signal d from the power failure detection circuit 24. At the timing, the discharge time data is set as the addition data k and the clock circuit 26
Supply to.

The clock circuit 26 divides the AC pulse c from the input terminal 22 to clock the time, and when the added data k is supplied, the added data k is added at the clocked time.
Is added to measure the time, and time data m indicating the measured time is supplied to the system control circuit 25. Based on the power failure detection signal d from the power failure detection circuit 24, the system control circuit 25 displays the time data m on a time display means such as a liquid crystal panel (not shown) or supplies it to a timer reservation circuit.

The operation of such an embodiment will be described below.

First, when the AC power supply voltage a from the circuit commercial AC power supply is stable in a state where it is supplied to the power supply circuit 12 (energized state), the DC power supply voltage b from the power supply circuit 12 is constant. Indicates a voltage value of 0 or more (for example, 12V),
Since the AC pulse c from the power supply circuit 12 becomes a normal pulse signal, the power failure detection circuit 24 supplies the system control circuit 25 with the power failure detection signal d indicating the energized state. As a result, the system control circuit 25 causes the clock signal generation circuit 2 to
Since the oscillation control signal f for oscillating 7 is supplied,
The clock signal generation circuit 27 uses the system clock signal g
Is supplied to the system control circuit 25. Further, the system control circuit 25 controls the switch SW1 to be on, and the capacitor C1 is charged so that one end thereof has the same voltage value as the DC power supply voltage b. On the other hand, the clock circuit 26 clocks the time by the AC pulse c from the input terminal 22, and supplies the system control circuit 25 with the time data m indicating the clocked time. In addition, the system control circuit 25 displays the time data m on a time display means such as a liquid crystal panel (not shown) or supplies it to a timer reservation circuit.

Next, when the AC power supply voltage a from the AC power supply is switched from the energized state to the state where the power supply circuit 12 is not operated (power failure state), the power supply circuit 12 is backed up by a small-capacity capacitor, The DC power supply voltage b from the circuit 12 maintains a constant voltage value of 0 or more, and each circuit of the microcomputer 20 operates. In this state,
Since the AC pulse signal c from the power supply circuit 12 is in a non-signal DC state, the power failure detection circuit 24 supplies the power failure detection signal d indicating the power failure state to the system control circuit 25. As a result, the system control circuit 25 controls the switch SW1 to be off. Then, discharging of the electric charge stored in the capacitor C1 starts. At the same time, the timing circuit 26
Since the AC pulse c is in the DC state, the time is measured and stopped, and the time at the time of stopping is held. After that, the system control circuit 25 supplies the oscillation control signal f for stopping the clock signal generation circuit 27. Therefore, the clock signal generation circuit 27 does not supply the system clock signal g to the system control circuit 25, and the system The control circuit 25 is stopped. In such a state, the time counting circuit 26 is stopped only by holding the time at the time of the stop, so that the energy stored in the backup capacitor of the power supply circuit 12 does not exceed the predetermined value. It will take a few days. Then, the power supply circuit 12 can supply the DC power supply voltage b to the microcomputer 20 for a few days after the power failure.

Next, when the energy stored in the backup capacitor of the power supply circuit 12 is switched from the power failure state to the energized state by the time the energy becomes less than a predetermined value, the DC power supply voltage b from the power supply circuit 12 becomes , And maintains a constant voltage value of 0 or more, and each circuit of the microcomputer 20 operates. In this state, the AC pulse signal c from the power supply circuit 12 becomes a normal pulse signal, so the power failure detection circuit 24
Supplies a power failure detection signal d indicating the energized state to the system control circuit 25. As a result, first, the system control circuit 25 causes the clock signal generation circuit 27 to oscillate. Then, the clock signal generation circuit 27 supplies the system clock signal g to the system control circuit 25. Next, the system control circuit 25 reads the terminal voltage data h indicating the voltage of one terminal of the capacitor C1 from the A / D conversion circuit 28, and the read control signal i based on the terminal voltage data h.
Is created and supplied to the read-only memory circuit 29. The read-only memory circuit 29 reads the characteristic data j based on the read control signal i and supplies it to the system control circuit 25. As a result, the system control circuit 25 creates discharge time data indicating the time at which the capacitor C1 has discharged from the characteristic data j from the read-only memory circuit 29, and supplies the discharge time data to the clock circuit 26 as addition data k. To do. As a result, the clock circuit 26 adds the time indicated by the addition data k to the time at the time of the stop, and the input terminal 2
The time measurement by the AC pulse c from 2 is restarted, and the time data m indicating the time measured is supplied to the system control circuit 25. The system control circuit 25 displays the time data m on a time display means such as a liquid crystal panel (not shown) or supplies a timer reservation circuit. Next, the system control circuit 2
Reference numeral 5 controls ON of the switch SW1. As a result, the charging of the capacitor C1 is started, and the voltage at one end of the capacitor C1 rises to the same voltage value as the DC power supply voltage b. As a result, a stable state is achieved in the above-described energized state.

According to such an embodiment, the clock circuit 26 operates at an accurate time when the power supply is stopped and restarted without providing a large-capacity backup battery or a sub clock signal generation circuit. Therefore, the manufacturing cost can be reduced without degrading the quality of the timepiece device used for the VTR or the like.

FIG. 2 is a block diagram showing another embodiment of the timepiece device according to the present invention. The same components as those in FIG. 1 are designated by the same reference numerals and the description thereof is omitted.

In FIG. 2, the difference in this embodiment lies in that the microcomputer 40 has a discharge time and a capacitor C1.
A writable storage circuit 49 is provided as a means for storing the characteristic data indicating the characteristic of the terminal voltage of the capacitor C1, and the system control circuit 45 creates the characteristic data n indicating the characteristic of the discharge time and the terminal voltage of the capacitor C1. That is, it is stored in the storage circuit 49.

More specifically, when the power failure detection signal d of the power failure detection circuit 24 indicates energization, the system control circuit 45 causes the time counting circuit 26 to time the time and turns on the switch SW1 to completely remove the capacitor C1. Switch SW1 is turned off after charging to the A / D conversion circuit 2
Based on the terminal voltage data h indicating the voltage of one terminal of the capacitor C1 from 8 and the time data m from the timing circuit 26, characteristic data n indicating the characteristics of the discharge time and the terminal voltage of the capacitor C1 is created. It is stored in the storage circuit 49.

According to this embodiment, the same effect as that of the embodiment shown in FIG. 1 is obtained, and the power supply is stopped even if the characteristics of the capacitor change with time or an error occurs during manufacturing. When it restarts, the clock circuit 26
Can perform the timekeeping operation of.

In the embodiment shown in FIG. 2, the A / D conversion circuit 2
Based on the terminal voltage data h from 8 and the time data from the clock circuit 26, characteristic data n indicating the characteristics of the discharge time and the terminal voltage of the capacitor C1 is created and stored in the memory circuit 49. Basic characteristic data, which is the basis of the characteristic data, is stored in advance in the memory circuit, the basic characteristic data is read, correction data indicating the difference from the basic characteristic data is created, and the correction data is stored in the memory circuit. The discharge time data indicating the time when the capacitor C1 has discharged may be created from the basic characteristic data.
Further, in this case, a circuit for storing the correction data may be separately provided.

Further, in the embodiment shown in FIGS. 1 and 2, the power failure detection circuit 24, the system control circuit 25 (the system control circuit 45 in the case of FIG. 2), the clock circuit 26, the clock signal generation circuit 27, and the A / D conversion. The circuit 28 and the read-only memory circuit 29 (memory circuit 49 in FIG. 2) are composed of a microcomputer, but if they are equivalent circuits having the same function regardless of the microcomputer, they may be composed of other parts such as discrete parts. May be.

Further, in the embodiment shown in FIGS. 1 and 2, the power failure detection circuit 24 detects whether the power failure state or the energized state is based on the AC pulse c from the power supply circuit. The AC power supply voltage from the input terminal 11 may be detected to detect the power failure state or the energized state.

Further, in the embodiment shown in FIGS. 1 and 2, the clock circuit counts the time by counting the AC pulse c from the power supply circuit, but it counts the clock from the clock signal generating circuit 27. You may do it.

Further, in the embodiments of FIGS. 1 and 2, the power supply circuit uses a commercial AC power supply as a power supply, but a power supply circuit using a battery as a power supply may be used. As a result, even when the battery is depleted or the battery is replaced, if the power is supplied from the battery, the timekeeping operation of the timekeeping circuit can be restarted in an accurate time.

[0037]

According to such a configuration, the clocking operation can be restarted from an accurate time when the power supply is stopped and restarted without providing a large capacity backup battery or a sub clock signal generation circuit. Therefore, the cost can be reduced without degrading the quality of the timepiece device used for the VTR or the like.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a timepiece device according to the invention.

FIG. 2 is a block diagram showing another embodiment of the timepiece device according to the invention.

[Explanation of symbols]

 12 power supply circuit 13 discharge circuit 20 microcomputer 24 power failure detection circuit 25 system control circuit 26 clock circuit 27 clock signal generation circuit 28 A / D conversion circuit 29 read-only memory circuit C1 capacitor

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[Procedure amendment]

[Submission date] February 3, 1994

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Correction target item name] All drawings

[Correction method] Change

[Correction content]

[Figure 1]

[Fig. 2]

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location G06F 1/00 341 R

Claims (2)

[Claims] 1. When a direct current voltage having a predetermined voltage value is created and output from a power supply voltage from a power supply, energy is stored by the power supply voltage from the power supply, and the power supply voltage is no longer supplied from the power supply. A power supply circuit that creates and outputs a DC voltage indicating a predetermined voltage value from the stored energy, a detection circuit that detects whether or not the power supply voltage is supplied from the power supply, and a power supply voltage that charges the power supply circuit. And a switching element that is provided in the path that supplies the power supply voltage from the power supply circuit to this capacitor and that turns on and off the supply of the power supply voltage to the capacitor, and the capacitor that is stored when this switching element is turned off. A discharging circuit that gradually discharges the electric charge, a clock circuit that clocks time by using the DC voltage from the power supply circuit as a power source, In the case where the storage circuit stores data indicating the relationship between the terminal voltage of the capacitor and the time when the switching element is off, and the detection result of the detection circuit indicates that the power supply voltage is supplied from the power supply, Stops the timekeeping circuit when the timekeeping circuit is timed and the switching element is turned on, and the detection result of the detection circuit does not indicate that the power supply voltage is being supplied from the power supply. When the switching element is turned off and the detection result of the detection circuit is switched from the state showing that the power source voltage is being supplied from the power source to the state not showing it, the switching is performed from the terminal voltage of the capacitor. A system control circuit for calculating the time when the element is turned off and adding the calculated time to the time measured by the clock circuit is provided. Characteristic clock device. 2. When the detection result of the detection circuit indicates that a power supply voltage is being supplied from a power supply, the system control circuit completely charges the capacitor and then turns off the switching element, By detecting the terminal voltage of the capacitor, data indicating the relationship between the terminal voltage of the capacitor and the time during which the switching element is turned off is created and stored in the storage circuit. The timepiece device according to claim 1.