JPH05275480A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent decrease of performance of an inductance, the change of characteristics due to mold stress, and the decrease of reliability level. CONSTITUTION:A metal wiring 2 formed on the surface of an IC chip 1 is connected with a bonding pad 3 formed on the rear of the IC chip 1 via a through hole 1a penetrating the IC chip 1 in the thickness direction, a guard ring 4 is formed on the periphery of the IC chip 1, and a metal 5 sealing the surface of the IC chip 1 is bonded to the guard ring 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device used in a high frequency / high speed field.

[0002]

2. Description of the Related Art In recent years, semiconductor technology has made remarkable progress, and process technologies such as miniaturization technology and self-alignment technology are supporting the progress. Also in the field of high frequencies, Si bipolar and GaAs devices are becoming faster and more sophisticated.

Conventionally, the market in the high frequency field has rapidly expanded with the development of mobile communication and satellite broadcasting. There is a strong demand for cost reduction, and plastic packages have come to be used for the envelopes instead of expensive ceramics.

[0004]

However, when a device in the field of high frequency / high speed is packaged in a plastic package, the performance and the yield of the inductance of the air bridge wiring are reduced, the fluctuation of the element characteristics due to mold stress (DC, AC), and the moisture resistance. There is a problem in that the reliability level including the characteristics is lowered (particularly, since a good insulating film such as a thermal oxide film cannot be formed in a GaAs device, it is remarkable).

That is, in the case of inductance (L), Ga
In the MMIC of the As-based device, the L internal organ is generally used, and particularly in the case of a high frequency, the air bridge wiring is used to maintain the performance (AC). When this MMIC is put in a plastic package, the inductance is easily destroyed when the resin is formed, and the dielectric constant of the resin is larger than that of air, resulting in an increase in parasitic capacitance.

Further, when the characteristics change due to the mold stress, the characteristics of the diffusion resistance, the transistor (FET, BipTr, etc.) deteriorate due to the stress in the resin forming process. A particular problem is that not all the directions of fluctuation fluctuate in the same manner but some of them fluctuate at random, which deteriorates the pairability and the DC / AC characteristics.

Furthermore, when the reliability level is lowered, GaA
In the case of an s-based device, a good insulating film (a thermal oxide film referred to as Si) that holds the semiconductor interface cannot be formed. Therefore, even if the top protective film is laminated, if the envelope is molded, There is a problem in that moisture or the like easily reaches the device surface and easily causes corrosion or characteristic variation. In view of the above-mentioned problems, an object of the present invention is to provide a semiconductor device capable of preventing performance degradation of inductance, characteristic variation due to mold stress, and reliability level degradation.

[0008]

In order to achieve the above-mentioned object, the present invention provides a metal wiring formed on the front surface of the IC chip and a bonding pad formed on the back surface of the IC chip to the thickness of the IC chip. Connection is made through a through hole penetrating in the direction, a guard ring is formed at the peripheral end of the IC chip, and a metal for sealing the surface of the IC chip is bonded onto the guard ring to remount the IC chip. -Mounted on a dframe, the bonding pad and the lead frame are connected by a bonding wire, and the IC chip is resin-sealed.

The metal wiring formed on the front surface of the IC chip and the bonding pad formed on the back surface of the IC chip are connected to each other through a through hole penetrating the IC chip in the thickness direction, and the IC chip is formed. A cap metal for sealing the surface of the IC chip is adhered on the IC chip, the IC chip is mounted on a lead frame, and the bonding pad and the lead frame are connected by a bonding wire. A chip is resin-sealed.

[0010]

In the present invention, since the surface of the IC chip is completely sealed with metal (or cap metal), when the IC chip is sealed with resin, the resin does not penetrate into the surface of the IC chip and The moisture resistance of the IC chip surface is improved. In this case, the terminals for IC signals and power supplies are I
It is taken out from the back surface of the C chip.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the semiconductor device of the present invention will be described below with reference to FIGS. First, a semiconductor device according to the first embodiment will be described with reference to FIG.

That is, in the embodiment, 1 is a GaAs semiconductor substrate. Ga is formed on the GaAs semiconductor substrate 1.
As MESFET (not shown) and air bridge Au
The wiring 2 is formed and the MMIC chip is configured.
Further, the GaAs semiconductor substrate 1 has an air bridge Au.
A through hole 1a is formed to reach the back surface of the GaAs semiconductor substrate 1 from directly under the wiring 2 and the GaAs semiconductor substrate 1 is formed.
Au wiring 3 is formed in the back surface bonding pad portion of the through hole 1a on the back surface and in the through hole 1a. Also, G
The air bridge A is provided on the peripheral edge of the surface of the semiconductor substrate 1.
Guard ring 4 which is higher than the height of u wiring 2 and is made of an insulating material
Are formed. A cap metal 5 is adhered to the upper surface of the guard ring 4 so as to cover the GaAs MESFET and the air bridge Au wiring 2, and the surface of the MMIC chip is completely sealed. The MMIC chip is mounted on the mount portion of the lead frame 7, the wire bonding portion of the lead frame 7 and the Au wiring 3 are connected by the bonding wire 6, and the MMIC chip is resin-sealed by the molding resin 8.

Next, a method of manufacturing a semiconductor device having such a structure will be described with reference to FIG.

First, a well-known G is formed on the GaAs semiconductor substrate 1.
An air bridge Au having a thickness of 2 μm and a gap thickness of 3 μm is formed as a final metal wiring by forming an MMIC chip by using an aAs MESFET process such as ion implantation, annealing, CVD deposition, etching and metal formation.
The wiring 2 is formed (see FIG. 2a).

After that, the GaAs semiconductor substrate 1 is etched, and GaA is immediately under the air bridge Au wiring 2.
s A through hole 1a reaching the back surface of the semiconductor substrate 1 is formed. Subsequently, the Au wiring 3 is formed in the back surface bonding pad portion of the through hole 1a on the back surface of the semiconductor substrate 1 and in the through hole 1a by a plating method, and the terminal (pad) of the MMIC chip is formed.
Are formed (see FIG. 2b).

Next, a guard ring 4 made of an insulating material and having a height higher than the height of the air bridge Au wiring 2, for example, a height of about 10 μm, is formed at the peripheral edge of the MMIC chip. Then, an adhesive is applied to the upper surface of the guard ring 4 and GaA
A cap metal 5 is bonded so as to cover the sMESFET and the air bridge Au wiring 2, and the surface of the MMIC chip is sealed (see FIG. 2c).

Thereafter, the MMIC chip is mounted on the mount portion of the lead frame 7, and the bonding wire 6 is attached.
To the wire bonding portion of the lead frame 7 and Au.
Connect to the wiring 3. Then, the MMIC chip is resin-sealed with the molding resin 8 (see FIG. 1).

Next, a semiconductor device according to the second embodiment will be described with reference to FIG.

That is, in the embodiment, 1 is a GaAs semiconductor substrate. Ga is formed on the GaAs semiconductor substrate 1.
As MESFET (not shown) and air bridge Au
The wiring 2 is formed. In addition, the GaAs semiconductor substrate 1
GaAs from directly under the air bridge Au wiring 2
A through hole 1a reaching the back surface of the semiconductor substrate 1 is formed. Furthermore, the through hole 1 on the back surface of the GaAs semiconductor substrate 1
a on the backside bonding pad portion of a and in the through hole 1a
The u wiring 3 is formed. At the peripheral edge of the surface of the GaAs semiconductor substrate 1, a cap metal 9 having a reverse concave shape higher than the height of the air bridge Au wiring 2 is formed in GaAs MESF.
It is adhered so as to cover the ET and the air bridge Au wiring 2, and completely seals the surface of the MMIC chip. The MMIC chip is mounted on the mount portion of the lead frame 7, the wire bonding portion of the lead frame 7 and the Au wiring 3 are connected by the bonding wire 6, and the MMIC chip is resin-sealed by the molding resin 8. ..

Thus, according to this embodiment, the surface of the MMIC chip is completely sealed by the cap metals 5 and 9. Therefore, when the MMIC chip is resin-sealed, the mold resin 8 is not applied to the surface of the MMIC chip. Moisture resistance of the surface of the MMIC chip is improved while not invading. At this time, terminals such as IC signals and power supplies are taken out from the Au wiring 3 on the back surface of the MMIC chip.

[0021]

As described above, according to the present invention, it is possible to significantly reduce the deterioration of the performance of the inductance (L) and the reduction of the yield, the characteristic variation due to the mold stress, the deterioration of the reliability level such as the moisture resistance, and the high frequency MMIC. , Mold resin sealing can be performed without degrading the performance and characteristics of high-speed IC and high-frequency / high-speed transistor.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device of the present invention.

FIG. 2 is a cross-sectional view of a manufacturing process of a semiconductor device of the present invention.

FIG. 3 is a cross-sectional view of another semiconductor device of the present invention.

[Explanation of symbols]

 1 GaAs Semiconductor Substrate 1a Through Hole 2 Air Bridge Au Wiring 3 Au Wiring 4 Guard Ring 5, 9 Cap Metal 6 Bonding Wire 7 Lead Frame 8 Mold Resin

Claims (2)

[Claims] 1. A metal wiring formed on a front surface of an IC chip and a bonding pad formed on a back surface of the IC chip are connected through a through hole penetrating the IC chip in a thickness direction, and the IC chip is formed. A guard ring is formed at the peripheral end of the IC chip, a metal for sealing the surface of the IC chip is adhered onto the guard ring, the IC chip is mounted on a lead frame, and the bonding pad and the lead are connected. -A semiconductor device characterized in that the IC chip is resin-sealed by connecting it to a lead frame by a bonding wire. 2. A metal wiring formed on the front surface of the IC chip and a bonding pad formed on the back surface of the IC chip are connected via a through hole penetrating the IC chip in the thickness direction, and the IC chip A cap metal for sealing the surface of the IC chip is adhered on the IC chip, the IC chip is mounted on a lead frame, and the bonding pad and the lead frame are connected by a bonding wire. A semiconductor device in which a chip is resin-sealed.